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author | Jan Beulich <jbeulich@suse.com> | 2022-08-03 08:59:46 +0200 |
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committer | Jan Beulich <jbeulich@suse.com> | 2022-08-03 08:59:46 +0200 |
commit | 2c735193b829aff44b37244205334bf71be9b814 (patch) | |
tree | 619913e5ccd9959b8868ee013b74bdd9d869837b | |
parent | 8aaafe957ceee581e691d2f7f984cb40c58f2b5e (diff) | |
download | fsf-binutils-gdb-2c735193b829aff44b37244205334bf71be9b814.zip fsf-binutils-gdb-2c735193b829aff44b37244205334bf71be9b814.tar.gz fsf-binutils-gdb-2c735193b829aff44b37244205334bf71be9b814.tar.bz2 |
x86: also use D for MOVBE
First of all rename the meanwhile misleading Opcode_SIMD_FloatD, as it
has also been used for KMOV* and BNDMOV. Then simplify the condition
selecting which form if "reversing" to use - except for the MOV to/from
control/debug/test registers all extended opcode space insns use bit 0
(rather than bit 1) to indicate the direction (from/to memory) of an
operation. With that, D can simply be set on the first of the two
templates, while the other can be dropped.
-rw-r--r-- | gas/config/tc-i386.c | 14 | ||||
-rw-r--r-- | opcodes/i386-opc.h | 2 | ||||
-rw-r--r-- | opcodes/i386-opc.tbl | 3 | ||||
-rw-r--r-- | opcodes/i386-tbl.h | 17 |
4 files changed, 10 insertions, 26 deletions
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c index 15520e5..78dad4e 100644 --- a/gas/config/tc-i386.c +++ b/gas/config/tc-i386.c @@ -3572,7 +3572,7 @@ build_vex_prefix (const insn_template *t) if (i.tm.opcode_modifier.d) i.tm.base_opcode ^= (i.tm.base_opcode & 0xee) != 0x6e - ? Opcode_SIMD_FloatD : Opcode_SIMD_IntD; + ? Opcode_ExtD : Opcode_SIMD_IntD; else /* Use the next insn. */ install_template (&t[1]); } @@ -6753,13 +6753,13 @@ match_template (char mnem_suffix) found_reverse_match = Opcode_VexW; goto check_operands_345; } - else if (operand_types[0].bitfield.xmmword - || operand_types[i.operands - 1].bitfield.xmmword - || operand_types[0].bitfield.class == RegMMX - || operand_types[i.operands - 1].bitfield.class == RegMMX - || is_any_vex_encoding(t)) + else if (t->opcode_modifier.opcodespace != SPACE_BASE + && (t->opcode_modifier.opcodespace != SPACE_0F + /* MOV to/from CR/DR/TR, as an exception, follow + the base opcode space encoding model. */ + || (t->base_opcode | 7) != 0x27)) found_reverse_match = (t->base_opcode & 0xee) != 0x6e - ? Opcode_SIMD_FloatD : Opcode_SIMD_IntD; + ? Opcode_ExtD : Opcode_SIMD_IntD; else found_reverse_match = Opcode_D; if (t->opcode_modifier.floatr) diff --git a/opcodes/i386-opc.h b/opcodes/i386-opc.h index f79ffb7..248e576 100644 --- a/opcodes/i386-opc.h +++ b/opcodes/i386-opc.h @@ -928,7 +928,7 @@ typedef struct insn_template unset if Regmem --> Reg. */ #define Opcode_FloatR 0x8 /* Bit to swap src/dest for float insns. */ #define Opcode_FloatD 0x400 /* Direction bit for float insns. */ -#define Opcode_SIMD_FloatD 0x1 /* Direction bit for SIMD fp insns. */ +#define Opcode_ExtD 0x1 /* Direction bit for extended opcode space insns. */ #define Opcode_SIMD_IntD 0x10 /* Direction bit for SIMD int insns. */ /* The next value is arbitrary, as long as it's non-zero and distinct from all other values above. */ diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl index 6c89d5c..04159e1 100644 --- a/opcodes/i386-opc.tbl +++ b/opcodes/i386-opc.tbl @@ -161,8 +161,7 @@ movq, 0xf21, None, Cpu64, D|RegMem|Size64|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSu mov, 0xf24, None, Cpu386|CpuNo64, D|RegMem|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|No_qSuf|No_ldSuf, { Test, Reg32 } // Move after swapping the bytes -movbe, 0x0f38f0, None, CpuMovbe, Modrm|No_bSuf|No_sSuf|No_ldSuf, { Word|Dword|Qword|Unspecified|BaseIndex, Reg16|Reg32|Reg64 } -movbe, 0x0f38f1, None, CpuMovbe, Modrm|No_bSuf|No_sSuf|No_ldSuf, { Reg16|Reg32|Reg64, Word|Dword|Qword|Unspecified|BaseIndex } +movbe, 0x0f38f0, None, CpuMovbe, D|Modrm|No_bSuf|No_sSuf|No_ldSuf, { Word|Dword|Qword|Unspecified|BaseIndex, Reg16|Reg32|Reg64 } // Move with sign extend. // "movsbl" & "movsbw" must not be unified into "movsb" to avoid diff --git a/opcodes/i386-tbl.h b/opcodes/i386-tbl.h index 88a0fb7..976cfc5 100644 --- a/opcodes/i386-tbl.h +++ b/opcodes/i386-tbl.h @@ -488,7 +488,7 @@ const insn_template i386_optab[] = { { 6, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } } }, { "movbe", 0xf0, 2, None, - { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0, + { 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, @@ -502,21 +502,6 @@ const insn_template i386_optab[] = 0, 0, 0, 0, 1, 0 } }, { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0 } } } }, - { "movbe", 0xf1, 2, None, - { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0 } }, - { { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 0, - 0, 0, 0, 0, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 1, 1, 0, 1, 0, - 0, 0, 0, 0, 1, 0 } } } }, { "movsbl", 0xbe, 2, None, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, |