x86: revert disassembler parts of "x86: Allow 16-bit register source for LAR and LSL"

This reverts the disassembler parts of 859aa2c86dc9 ("x86: Allow 16-bit
register source for LAR and LSL"), adjusting testcases as necessary.
That change was itself a partial revert of c9f5b96bdab0 ("x86: correct
handling of LAR and LSL"), without actually saying so. While the earlier
commit was properly agreed upon, the partial revert was not, and hence
should not have been committed. This is even more so that the revert
part of that change wasn't even necessary to address PR gas/29844.

7 files changed, 66 insertions, 54 deletions

diff --git a/gas/testsuite/gas/i386/i386-intel.d b/gas/testsuite/gas/i386/i386-intel.d
index 42f8669..e5e2b78 100644
--- a/gas/testsuite/gas/i386/i386-intel.d
+++ b/gas/testsuite/gas/i386/i386-intel.d
@@ -63,23 +63,23 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	0f b7 00             	movzx  eax,WORD PTR \[eax\]
 [ 	]*[a-f0-9]+:	0f c3 00             	movnti DWORD PTR \[eax\],eax
 [ 	]*[a-f0-9]+:	66 0f 02 d2          	lar    dx,dx
-[ 	]*[a-f0-9]+:	0f 02 d2             	lar    edx,dx
-[ 	]*[a-f0-9]+:	0f 02 d2             	lar    edx,dx
+[ 	]*[a-f0-9]+:	0f 02 d2             	lar    edx,edx
+[ 	]*[a-f0-9]+:	0f 02 d2             	lar    edx,edx
 [ 	]*[a-f0-9]+:	66 0f 02 12          	lar    dx,WORD PTR \[edx\]
 [ 	]*[a-f0-9]+:	0f 02 12             	lar    edx,WORD PTR \[edx\]
 [ 	]*[a-f0-9]+:	66 0f 03 d2          	lsl    dx,dx
-[ 	]*[a-f0-9]+:	0f 03 d2             	lsl    edx,dx
-[ 	]*[a-f0-9]+:	0f 03 d2             	lsl    edx,dx
+[ 	]*[a-f0-9]+:	0f 03 d2             	lsl    edx,edx
+[ 	]*[a-f0-9]+:	0f 03 d2             	lsl    edx,edx
 [ 	]*[a-f0-9]+:	66 0f 03 12          	lsl    dx,WORD PTR \[edx\]
 [ 	]*[a-f0-9]+:	0f 03 12             	lsl    edx,WORD PTR \[edx\]
 [ 	]*[a-f0-9]+:	66 0f 02 d2          	lar    dx,dx
-[ 	]*[a-f0-9]+:	0f 02 d2             	lar    edx,dx
-[ 	]*[a-f0-9]+:	0f 02 d2             	lar    edx,dx
+[ 	]*[a-f0-9]+:	0f 02 d2             	lar    edx,edx
+[ 	]*[a-f0-9]+:	0f 02 d2             	lar    edx,edx
 [ 	]*[a-f0-9]+:	66 0f 02 12          	lar    dx,WORD PTR \[edx\]
 [ 	]*[a-f0-9]+:	0f 02 12             	lar    edx,WORD PTR \[edx\]
 [ 	]*[a-f0-9]+:	66 0f 03 d2          	lsl    dx,dx
-[ 	]*[a-f0-9]+:	0f 03 d2             	lsl    edx,dx
-[ 	]*[a-f0-9]+:	0f 03 d2             	lsl    edx,dx
+[ 	]*[a-f0-9]+:	0f 03 d2             	lsl    edx,edx
+[ 	]*[a-f0-9]+:	0f 03 d2             	lsl    edx,edx
 [ 	]*[a-f0-9]+:	66 0f 03 12          	lsl    dx,WORD PTR \[edx\]
 [ 	]*[a-f0-9]+:	0f 03 12             	lsl    edx,WORD PTR \[edx\]
 #pass
diff --git a/gas/testsuite/gas/i386/i386.d b/gas/testsuite/gas/i386/i386.d
index b5a5565..d532110 100644
--- a/gas/testsuite/gas/i386/i386.d
+++ b/gas/testsuite/gas/i386/i386.d
@@ -62,23 +62,23 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	0f b7 00             	movzwl \(%eax\),%eax
 [ 	]*[a-f0-9]+:	0f c3 00             	movnti %eax,\(%eax\)
 [ 	]*[a-f0-9]+:	66 0f 02 d2          	lar    %dx,%dx
-[ 	]*[a-f0-9]+:	0f 02 d2             	lar    %dx,%edx
-[ 	]*[a-f0-9]+:	0f 02 d2             	lar    %dx,%edx
+[ 	]*[a-f0-9]+:	0f 02 d2             	lar    %edx,%edx
+[ 	]*[a-f0-9]+:	0f 02 d2             	lar    %edx,%edx
 [ 	]*[a-f0-9]+:	66 0f 02 12          	lar    \(%edx\),%dx
 [ 	]*[a-f0-9]+:	0f 02 12             	lar    \(%edx\),%edx
 [ 	]*[a-f0-9]+:	66 0f 03 d2          	lsl    %dx,%dx
-[ 	]*[a-f0-9]+:	0f 03 d2             	lsl    %dx,%edx
-[ 	]*[a-f0-9]+:	0f 03 d2             	lsl    %dx,%edx
+[ 	]*[a-f0-9]+:	0f 03 d2             	lsl    %edx,%edx
+[ 	]*[a-f0-9]+:	0f 03 d2             	lsl    %edx,%edx
 [ 	]*[a-f0-9]+:	66 0f 03 12          	lsl    \(%edx\),%dx
 [ 	]*[a-f0-9]+:	0f 03 12             	lsl    \(%edx\),%edx
 [ 	]*[a-f0-9]+:	66 0f 02 d2          	lar    %dx,%dx
-[ 	]*[a-f0-9]+:	0f 02 d2             	lar    %dx,%edx
-[ 	]*[a-f0-9]+:	0f 02 d2             	lar    %dx,%edx
+[ 	]*[a-f0-9]+:	0f 02 d2             	lar    %edx,%edx
+[ 	]*[a-f0-9]+:	0f 02 d2             	lar    %edx,%edx
 [ 	]*[a-f0-9]+:	66 0f 02 12          	lar    \(%edx\),%dx
 [ 	]*[a-f0-9]+:	0f 02 12             	lar    \(%edx\),%edx
 [ 	]*[a-f0-9]+:	66 0f 03 d2          	lsl    %dx,%dx
-[ 	]*[a-f0-9]+:	0f 03 d2             	lsl    %dx,%edx
-[ 	]*[a-f0-9]+:	0f 03 d2             	lsl    %dx,%edx
+[ 	]*[a-f0-9]+:	0f 03 d2             	lsl    %edx,%edx
+[ 	]*[a-f0-9]+:	0f 03 d2             	lsl    %edx,%edx
 [ 	]*[a-f0-9]+:	66 0f 03 12          	lsl    \(%edx\),%dx
 [ 	]*[a-f0-9]+:	0f 03 12             	lsl    \(%edx\),%edx
 #pass
diff --git a/gas/testsuite/gas/i386/intel-intel.d b/gas/testsuite/gas/i386/intel-intel.d
index 609781f..73fbdf8 100644
--- a/gas/testsuite/gas/i386/intel-intel.d
+++ b/gas/testsuite/gas/i386/intel-intel.d
@@ -699,11 +699,11 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	0f 4b 90 90 90 90 90 	cmovnp edx,DWORD PTR \[eax-0x6f6f6f70\]
 [ 	]*[a-f0-9]+:	66 0f 4a 90 90 90 90 90 	cmovp  dx,WORD PTR \[eax-0x6f6f6f70\]
 [ 	]*[a-f0-9]+:	66 0f 4b 90 90 90 90 90 	cmovnp dx,WORD PTR \[eax-0x6f6f6f70\]
-[ 	]*[a-f0-9]+:	0f 02 c0 +	lar    eax,ax
+[ 	]*[a-f0-9]+:	0f 02 c0 +	lar    eax,eax
 [ 	]*[a-f0-9]+:	66 0f 02 c0 +	lar    ax,ax
 [ 	]*[a-f0-9]+:	0f 02 00 +	lar    eax,WORD PTR \[eax\]
 [ 	]*[a-f0-9]+:	66 0f 02 00 +	lar    ax,WORD PTR \[eax\]
-[ 	]*[a-f0-9]+:	0f 03 c0 +	lsl    eax,ax
+[ 	]*[a-f0-9]+:	0f 03 c0 +	lsl    eax,eax
 [ 	]*[a-f0-9]+:	66 0f 03 c0 +	lsl    ax,ax
 [ 	]*[a-f0-9]+:	0f 03 00 +	lsl    eax,WORD PTR \[eax\]
 [ 	]*[a-f0-9]+:	66 0f 03 00 +	lsl    ax,WORD PTR \[eax\]
diff --git a/gas/testsuite/gas/i386/intel.d b/gas/testsuite/gas/i386/intel.d
index 65e79e6..374f875 100644
--- a/gas/testsuite/gas/i386/intel.d
+++ b/gas/testsuite/gas/i386/intel.d
@@ -698,11 +698,11 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	0f 4b 90 90 90 90 90 	cmovnp -0x6f6f6f70\(%eax\),%edx
 [ 	]*[a-f0-9]+:	66 0f 4a 90 90 90 90 90 	cmovp  -0x6f6f6f70\(%eax\),%dx
 [ 	]*[a-f0-9]+:	66 0f 4b 90 90 90 90 90 	cmovnp -0x6f6f6f70\(%eax\),%dx
-[ 	]*[a-f0-9]+:	0f 02 c0             	lar    %ax,%eax
+[ 	]*[a-f0-9]+:	0f 02 c0             	lar    %eax,%eax
 [ 	]*[a-f0-9]+:	66 0f 02 c0          	lar    %ax,%ax
 [ 	]*[a-f0-9]+:	0f 02 00             	lar    \(%eax\),%eax
 [ 	]*[a-f0-9]+:	66 0f 02 00          	lar    \(%eax\),%ax
-[ 	]*[a-f0-9]+:	0f 03 c0             	lsl    %ax,%eax
+[ 	]*[a-f0-9]+:	0f 03 c0             	lsl    %eax,%eax
 [ 	]*[a-f0-9]+:	66 0f 03 c0          	lsl    %ax,%ax
 [ 	]*[a-f0-9]+:	0f 03 00             	lsl    \(%eax\),%eax
 [ 	]*[a-f0-9]+:	66 0f 03 00          	lsl    \(%eax\),%ax
diff --git a/gas/testsuite/gas/i386/x86_64-intel.d b/gas/testsuite/gas/i386/x86_64-intel.d
index b919dc0..a2d5668 100644
--- a/gas/testsuite/gas/i386/x86_64-intel.d
+++ b/gas/testsuite/gas/i386/x86_64-intel.d
@@ -259,34 +259,34 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	8b 04 25 00 00 00 00 	mov    eax,DWORD PTR (ds:)?0x0
 [ 	]*[a-f0-9]+:	48 89 0c 25 00 00 00 00 	mov    QWORD PTR (ds:)?0x0,rcx
 [ 	]*[a-f0-9]+:	66 0f 02 d2          	lar    dx,dx
-[ 	]*[a-f0-9]+:	0f 02 d2             	lar    edx,dx
-[ 	]*[a-f0-9]+:	48 0f 02 d2          	lar    rdx,dx
-[ 	]*[a-f0-9]+:	0f 02 d2             	lar    edx,dx
-[ 	]*[a-f0-9]+:	48 0f 02 d2          	lar    rdx,dx
+[ 	]*[a-f0-9]+:	0f 02 d2             	lar    edx,edx
+[ 	]*[a-f0-9]+:	48 0f 02 d2          	lar    rdx,rdx
+[ 	]*[a-f0-9]+:	0f 02 d2             	lar    edx,edx
+[ 	]*[a-f0-9]+:	48 0f 02 d2          	lar    rdx,rdx
 [ 	]*[a-f0-9]+:	66 0f 02 12          	lar    dx,WORD PTR \[rdx\]
 [ 	]*[a-f0-9]+:	0f 02 12             	lar    edx,WORD PTR \[rdx\]
 [ 	]*[a-f0-9]+:	48 0f 02 12          	lar    rdx,WORD PTR \[rdx\]
 [ 	]*[a-f0-9]+:	66 0f 03 d2          	lsl    dx,dx
-[ 	]*[a-f0-9]+:	0f 03 d2             	lsl    edx,dx
-[ 	]*[a-f0-9]+:	48 0f 03 d2          	lsl    rdx,dx
-[ 	]*[a-f0-9]+:	0f 03 d2             	lsl    edx,dx
-[ 	]*[a-f0-9]+:	48 0f 03 d2          	lsl    rdx,dx
+[ 	]*[a-f0-9]+:	0f 03 d2             	lsl    edx,edx
+[ 	]*[a-f0-9]+:	48 0f 03 d2          	lsl    rdx,rdx
+[ 	]*[a-f0-9]+:	0f 03 d2             	lsl    edx,edx
+[ 	]*[a-f0-9]+:	48 0f 03 d2          	lsl    rdx,rdx
 [ 	]*[a-f0-9]+:	66 0f 03 12          	lsl    dx,WORD PTR \[rdx\]
 [ 	]*[a-f0-9]+:	0f 03 12             	lsl    edx,WORD PTR \[rdx\]
 [ 	]*[a-f0-9]+:	48 0f 03 12          	lsl    rdx,WORD PTR \[rdx\]
 [ 	]*[a-f0-9]+:	66 0f 02 d2          	lar    dx,dx
-[ 	]*[a-f0-9]+:	0f 02 d2             	lar    edx,dx
-[ 	]*[a-f0-9]+:	48 0f 02 d2          	lar    rdx,dx
-[ 	]*[a-f0-9]+:	0f 02 d2             	lar    edx,dx
-[ 	]*[a-f0-9]+:	48 0f 02 d2          	lar    rdx,dx
+[ 	]*[a-f0-9]+:	0f 02 d2             	lar    edx,edx
+[ 	]*[a-f0-9]+:	48 0f 02 d2          	lar    rdx,rdx
+[ 	]*[a-f0-9]+:	0f 02 d2             	lar    edx,edx
+[ 	]*[a-f0-9]+:	48 0f 02 d2          	lar    rdx,rdx
 [ 	]*[a-f0-9]+:	66 0f 02 12          	lar    dx,WORD PTR \[rdx\]
 [ 	]*[a-f0-9]+:	0f 02 12             	lar    edx,WORD PTR \[rdx\]
 [ 	]*[a-f0-9]+:	48 0f 02 12          	lar    rdx,WORD PTR \[rdx\]
 [ 	]*[a-f0-9]+:	66 0f 03 d2          	lsl    dx,dx
-[ 	]*[a-f0-9]+:	0f 03 d2             	lsl    edx,dx
-[ 	]*[a-f0-9]+:	48 0f 03 d2          	lsl    rdx,dx
-[ 	]*[a-f0-9]+:	0f 03 d2             	lsl    edx,dx
-[ 	]*[a-f0-9]+:	48 0f 03 d2          	lsl    rdx,dx
+[ 	]*[a-f0-9]+:	0f 03 d2             	lsl    edx,edx
+[ 	]*[a-f0-9]+:	48 0f 03 d2          	lsl    rdx,rdx
+[ 	]*[a-f0-9]+:	0f 03 d2             	lsl    edx,edx
+[ 	]*[a-f0-9]+:	48 0f 03 d2          	lsl    rdx,rdx
 [ 	]*[a-f0-9]+:	66 0f 03 12          	lsl    dx,WORD PTR \[rdx\]
 [ 	]*[a-f0-9]+:	0f 03 12             	lsl    edx,WORD PTR \[rdx\]
 [ 	]*[a-f0-9]+:	48 0f 03 12          	lsl    rdx,WORD PTR \[rdx\]
diff --git a/gas/testsuite/gas/i386/x86_64.d b/gas/testsuite/gas/i386/x86_64.d
index 398d2aa..3bd2c26 100644
--- a/gas/testsuite/gas/i386/x86_64.d
+++ b/gas/testsuite/gas/i386/x86_64.d
@@ -259,34 +259,34 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	8b 04 25 00 00 00 00 	mov    0x0,%eax
 [ 	]*[a-f0-9]+:	48 89 0c 25 00 00 00 00 	mov    %rcx,0x0
 [ 	]*[a-f0-9]+:	66 0f 02 d2          	lar    %dx,%dx
-[ 	]*[a-f0-9]+:	0f 02 d2             	lar    %dx,%edx
-[ 	]*[a-f0-9]+:	48 0f 02 d2          	lar    %dx,%rdx
-[ 	]*[a-f0-9]+:	0f 02 d2             	lar    %dx,%edx
-[ 	]*[a-f0-9]+:	48 0f 02 d2          	lar    %dx,%rdx
+[ 	]*[a-f0-9]+:	0f 02 d2             	lar    %edx,%edx
+[ 	]*[a-f0-9]+:	48 0f 02 d2          	lar    %rdx,%rdx
+[ 	]*[a-f0-9]+:	0f 02 d2             	lar    %edx,%edx
+[ 	]*[a-f0-9]+:	48 0f 02 d2          	lar    %rdx,%rdx
 [ 	]*[a-f0-9]+:	66 0f 02 12          	lar    \(%rdx\),%dx
 [ 	]*[a-f0-9]+:	0f 02 12             	lar    \(%rdx\),%edx
 [ 	]*[a-f0-9]+:	48 0f 02 12          	lar    \(%rdx\),%rdx
 [ 	]*[a-f0-9]+:	66 0f 03 d2          	lsl    %dx,%dx
-[ 	]*[a-f0-9]+:	0f 03 d2             	lsl    %dx,%edx
-[ 	]*[a-f0-9]+:	48 0f 03 d2          	lsl    %dx,%rdx
-[ 	]*[a-f0-9]+:	0f 03 d2             	lsl    %dx,%edx
-[ 	]*[a-f0-9]+:	48 0f 03 d2          	lsl    %dx,%rdx
+[ 	]*[a-f0-9]+:	0f 03 d2             	lsl    %edx,%edx
+[ 	]*[a-f0-9]+:	48 0f 03 d2          	lsl    %rdx,%rdx
+[ 	]*[a-f0-9]+:	0f 03 d2             	lsl    %edx,%edx
+[ 	]*[a-f0-9]+:	48 0f 03 d2          	lsl    %rdx,%rdx
 [ 	]*[a-f0-9]+:	66 0f 03 12          	lsl    \(%rdx\),%dx
 [ 	]*[a-f0-9]+:	0f 03 12             	lsl    \(%rdx\),%edx
 [ 	]*[a-f0-9]+:	48 0f 03 12          	lsl    \(%rdx\),%rdx
 [ 	]*[a-f0-9]+:	66 0f 02 d2          	lar    %dx,%dx
-[ 	]*[a-f0-9]+:	0f 02 d2             	lar    %dx,%edx
-[ 	]*[a-f0-9]+:	48 0f 02 d2          	lar    %dx,%rdx
-[ 	]*[a-f0-9]+:	0f 02 d2             	lar    %dx,%edx
-[ 	]*[a-f0-9]+:	48 0f 02 d2          	lar    %dx,%rdx
+[ 	]*[a-f0-9]+:	0f 02 d2             	lar    %edx,%edx
+[ 	]*[a-f0-9]+:	48 0f 02 d2          	lar    %rdx,%rdx
+[ 	]*[a-f0-9]+:	0f 02 d2             	lar    %edx,%edx
+[ 	]*[a-f0-9]+:	48 0f 02 d2          	lar    %rdx,%rdx
 [ 	]*[a-f0-9]+:	66 0f 02 12          	lar    \(%rdx\),%dx
 [ 	]*[a-f0-9]+:	0f 02 12             	lar    \(%rdx\),%edx
 [ 	]*[a-f0-9]+:	48 0f 02 12          	lar    \(%rdx\),%rdx
 [ 	]*[a-f0-9]+:	66 0f 03 d2          	lsl    %dx,%dx
-[ 	]*[a-f0-9]+:	0f 03 d2             	lsl    %dx,%edx
-[ 	]*[a-f0-9]+:	48 0f 03 d2          	lsl    %dx,%rdx
-[ 	]*[a-f0-9]+:	0f 03 d2             	lsl    %dx,%edx
-[ 	]*[a-f0-9]+:	48 0f 03 d2          	lsl    %dx,%rdx
+[ 	]*[a-f0-9]+:	0f 03 d2             	lsl    %edx,%edx
+[ 	]*[a-f0-9]+:	48 0f 03 d2          	lsl    %rdx,%rdx
+[ 	]*[a-f0-9]+:	0f 03 d2             	lsl    %edx,%edx
+[ 	]*[a-f0-9]+:	48 0f 03 d2          	lsl    %rdx,%rdx
 [ 	]*[a-f0-9]+:	66 0f 03 12          	lsl    \(%rdx\),%dx
 [ 	]*[a-f0-9]+:	0f 03 12             	lsl    \(%rdx\),%edx
 [ 	]*[a-f0-9]+:	48 0f 03 12          	lsl    \(%rdx\),%rdx
diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index e778e91..d31c696 100644
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -833,6 +833,8 @@ enum
   MOD_0F01_REG_3,
   MOD_0F01_REG_5,
   MOD_0F01_REG_7,
+  MOD_0F02,
+  MOD_0F03,
   MOD_0F12_PREFIX_0,
   MOD_0F12_PREFIX_2,
   MOD_0F13,
@@ -2115,8 +2117,8 @@ static const struct dis386 dis386_twobyte[] = {
   /* 00 */
   { REG_TABLE (REG_0F00 ) },
   { REG_TABLE (REG_0F01 ) },
-  { "larS",		{ Gv, Ew }, 0 },
-  { "lslS",		{ Gv, Ew }, 0 },
+  { MOD_TABLE (MOD_0F02) },
+  { MOD_TABLE (MOD_0F03) },
   { Bad_Opcode },
   { "syscall",		{ XX }, 0 },
   { "clts",		{ XX }, 0 },
@@ -8198,6 +8200,16 @@ static const struct dis386 mod_table[][2] = {
     { RM_TABLE (RM_0F01_REG_7_MOD_3) },
   },
   {
+    /* MOD_0F02 */
+    { "larS",		{ Gv, Mw }, 0 },
+    { "larS",		{ Gv, Ev }, 0 },
+  },
+  {
+    /* MOD_0F03 */
+    { "lslS",		{ Gv, Mw }, 0 },
+    { "lslS",		{ Gv, Ev }, 0 },
+  },
+  {
     /* MOD_0F12_PREFIX_0 */
     { "movlpX",		{ XM, EXq }, 0 },
     { "movhlps",	{ XM, EXq }, 0 },