diff options
author | Jose E. Marchesi <jose.marchesi@oracle.com> | 2023-05-10 17:54:50 +0200 |
---|---|---|
committer | Jose E. Marchesi <jose.marchesi@oracle.com> | 2023-05-10 20:52:22 +0200 |
commit | 617ba556f97f159834917b4dfb319772939dc853 (patch) | |
tree | 85646f06afef77f3ddf4cb519f6e310febdf48d1 | |
parent | 2b8c7766ea357ff9b22531d6fdf0c3bd69cc044f (diff) | |
download | fsf-binutils-gdb-617ba556f97f159834917b4dfb319772939dc853.zip fsf-binutils-gdb-617ba556f97f159834917b4dfb319772939dc853.tar.gz fsf-binutils-gdb-617ba556f97f159834917b4dfb319772939dc853.tar.bz2 |
opcodes: use CGEN_INSN_LGUINT for base instructions
This patch changes the opcodes CGEN support code in order to support
base instructions with opcodes past the least significative 32 bits.
Note that the masks have been adapted in a previous patch.
include/ChangeLog:
2023-05-10 Jose E. Marchesi <jose.marchesi@oracle.com>
* opcode/cgen.h (CGEN_IVALUE): Make room for 64-bit base values.
opcodes/ChangeLog:
2023-05-10 Jose E. Marchesi <jose.marchesi@oracle.com>
* cgen-dis.in (print_insn): Use CGEN_INSN_LGUINT for instruction
base values.
* cgen-dis.c (cgen_dis_lookup_insn): Likewise.
* cgen-opc.c (cgen_macro_insn_count): Likewise.
* epiphany-dis.c: Regenerate.
* fr30-dis.c: Likewise.
* frv-dis.c: Likewise.
* ip2k-dis.c: Likewise.
* iq2000-dis.c: Likewise.
* lm32-dis.c: Likewise.
* m32c-dis.c: Likewise.
* m32r-dis.c: Likewise.
* mep-dis.c: Likewise.
* mt-dis.c: Likewise.
* or1k-dis.c: Likewise.
* xstormy16-dis.c: Likewise.
-rw-r--r-- | include/ChangeLog | 4 | ||||
-rw-r--r-- | include/opcode/cgen.h | 10 | ||||
-rw-r--r-- | opcodes/ChangeLog | 19 | ||||
-rw-r--r-- | opcodes/bpf-dis.c | 2 | ||||
-rw-r--r-- | opcodes/cgen-dis.c | 2 | ||||
-rw-r--r-- | opcodes/cgen-dis.in | 2 | ||||
-rw-r--r-- | opcodes/cgen-opc.c | 8 | ||||
-rw-r--r-- | opcodes/epiphany-dis.c | 2 | ||||
-rw-r--r-- | opcodes/fr30-dis.c | 2 | ||||
-rw-r--r-- | opcodes/frv-dis.c | 2 | ||||
-rw-r--r-- | opcodes/ip2k-dis.c | 2 | ||||
-rw-r--r-- | opcodes/iq2000-dis.c | 2 | ||||
-rw-r--r-- | opcodes/lm32-dis.c | 2 | ||||
-rw-r--r-- | opcodes/m32c-dis.c | 2 | ||||
-rw-r--r-- | opcodes/m32r-dis.c | 2 | ||||
-rw-r--r-- | opcodes/mep-dis.c | 2 | ||||
-rw-r--r-- | opcodes/mt-dis.c | 2 | ||||
-rw-r--r-- | opcodes/or1k-dis.c | 2 | ||||
-rw-r--r-- | opcodes/xstormy16-dis.c | 2 |
19 files changed, 47 insertions, 24 deletions
diff --git a/include/ChangeLog b/include/ChangeLog index b157251..d38f507 100644 --- a/include/ChangeLog +++ b/include/ChangeLog @@ -1,3 +1,7 @@ +2023-05-10 Jose E. Marchesi <jose.marchesi@oracle.com> + + * opcode/cgen.h (CGEN_IVALUE): Make room for 64-bit base values. + 2023-03-23 Frederic Cambus <fred@statdns.com> * elf/common.h (PT_OPENBSD_MUTABLE): Define. diff --git a/include/opcode/cgen.h b/include/opcode/cgen.h index 6c0732b..9d638f0 100644 --- a/include/opcode/cgen.h +++ b/include/opcode/cgen.h @@ -928,7 +928,7 @@ typedef struct typedef struct { /* The opcode portion of the base insn. */ - CGEN_INSN_INT base_value; + CGEN_INSN_LGUINT base_value; #ifdef CGEN_MAX_EXTRA_OPCODE_OPERANDS /* Extra opcode values beyond base_value. */ @@ -1186,7 +1186,7 @@ extern CGEN_INSN_LIST * cgen_asm_lookup_insn instruction (the actually hashing done is up to the target). */ extern CGEN_INSN_LIST * cgen_dis_lookup_insn - (CGEN_CPU_DESC, const char *, CGEN_INSN_INT); + (CGEN_CPU_DESC, const char *, CGEN_INSN_LGUINT); /* FIXME: delete these two */ #define CGEN_DIS_LOOKUP_INSN(cd, buf, value) cgen_dis_lookup_insn ((cd), (buf), (value)) #define CGEN_DIS_NEXT_INSN(insn) ((insn)->next) @@ -1449,7 +1449,7 @@ extern int CGEN_SYM (get_mach) (const char *); /* Operand index computation. */ extern const CGEN_INSN * cgen_lookup_insn (CGEN_CPU_DESC, const CGEN_INSN * insn_, - CGEN_INSN_INT int_value_, unsigned char *bytes_value_, + CGEN_INSN_LGUINT int_value_, unsigned char *bytes_value_, int length_, CGEN_FIELDS *fields_, int alias_p_); extern void cgen_get_insn_operands (CGEN_CPU_DESC, const CGEN_INSN * insn_, @@ -1461,10 +1461,10 @@ extern const CGEN_INSN * cgen_lookup_get_insn_operands /* Cover fns to bfd_get/set. */ -extern CGEN_INSN_INT cgen_get_insn_value +extern CGEN_INSN_LGUINT cgen_get_insn_value (CGEN_CPU_DESC, unsigned char *, int, int); extern void cgen_put_insn_value - (CGEN_CPU_DESC, unsigned char *, int, CGEN_INSN_INT, int); + (CGEN_CPU_DESC, unsigned char *, int, CGEN_INSN_LGUINT, int); extern CGEN_INSN_INT cgen_get_base_insn_value (CGEN_CPU_DESC, unsigned char *, int); diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 890931e..d954bb9 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,22 @@ +2023-05-10 Jose E. Marchesi <jose.marchesi@oracle.com> + + * cgen-dis.in (print_insn): Use CGEN_INSN_LGUINT for instruction + base values. + * cgen-dis.c (cgen_dis_lookup_insn): Likewise. + * cgen-opc.c (cgen_macro_insn_count): Likewise. + * epiphany-dis.c: Regenerate. + * fr30-dis.c: Likewise. + * frv-dis.c: Likewise. + * ip2k-dis.c: Likewise. + * iq2000-dis.c: Likewise. + * lm32-dis.c: Likewise. + * m32c-dis.c: Likewise. + * m32r-dis.c: Likewise. + * mep-dis.c: Likewise. + * mt-dis.c: Likewise. + * or1k-dis.c: Likewise. + * xstormy16-dis.c: Likewise. + 2023-04-21 Tom Tromey <tromey@adacore.com> * i386-dis.c (OP_J): Check result of get16. diff --git a/opcodes/bpf-dis.c b/opcodes/bpf-dis.c index 0a34517..a1f2c71 100644 --- a/opcodes/bpf-dis.c +++ b/opcodes/bpf-dis.c @@ -367,7 +367,7 @@ print_insn (CGEN_CPU_DESC cd, bfd_byte *buf, unsigned int buflen) { - CGEN_INSN_INT insn_value; + CGEN_INSN_LGUINT insn_value; const CGEN_INSN_LIST *insn_list; CGEN_EXTRACT_INFO ex_info; int basesize; diff --git a/opcodes/cgen-dis.c b/opcodes/cgen-dis.c index 90746a8..917ce0a 100644 --- a/opcodes/cgen-dis.c +++ b/opcodes/cgen-dis.c @@ -232,7 +232,7 @@ build_dis_hash_table (CGEN_CPU_DESC cd) /* Return the first entry in the hash list for INSN. */ CGEN_INSN_LIST * -cgen_dis_lookup_insn (CGEN_CPU_DESC cd, const char * buf, CGEN_INSN_INT value) +cgen_dis_lookup_insn (CGEN_CPU_DESC cd, const char * buf, CGEN_INSN_LGUINT value) { unsigned int hash; diff --git a/opcodes/cgen-dis.in b/opcodes/cgen-dis.in index c144c7e..16f888f 100644 --- a/opcodes/cgen-dis.in +++ b/opcodes/cgen-dis.in @@ -202,7 +202,7 @@ print_insn (CGEN_CPU_DESC cd, bfd_byte *buf, unsigned int buflen) { - CGEN_INSN_INT insn_value; + CGEN_INSN_LGUINT insn_value; const CGEN_INSN_LIST *insn_list; CGEN_EXTRACT_INFO ex_info; int basesize; diff --git a/opcodes/cgen-opc.c b/opcodes/cgen-opc.c index 7141ffb..86d8975 100644 --- a/opcodes/cgen-opc.c +++ b/opcodes/cgen-opc.c @@ -355,13 +355,13 @@ cgen_macro_insn_count (CGEN_CPU_DESC cd) /* Cover function to read and properly byteswap an insn value. */ -CGEN_INSN_INT +CGEN_INSN_LGUINT cgen_get_insn_value (CGEN_CPU_DESC cd, unsigned char *buf, int length, int endian) { int big_p = (endian == CGEN_ENDIAN_BIG); int insn_chunk_bitsize = cd->insn_chunk_bitsize; - CGEN_INSN_INT value = 0; + CGEN_INSN_LGUINT value = 0; if (insn_chunk_bitsize != 0 && insn_chunk_bitsize < length) { @@ -397,7 +397,7 @@ void cgen_put_insn_value (CGEN_CPU_DESC cd, unsigned char *buf, int length, - CGEN_INSN_INT value, + CGEN_INSN_LGUINT value, int endian) { int big_p = (endian == CGEN_ENDIAN_BIG); @@ -446,7 +446,7 @@ cgen_put_insn_value (CGEN_CPU_DESC cd, const CGEN_INSN * cgen_lookup_insn (CGEN_CPU_DESC cd, const CGEN_INSN *insn, - CGEN_INSN_INT insn_int_value, + CGEN_INSN_LGUINT insn_int_value, /* ??? CGEN_INSN_BYTES would be a nice type name to use here. */ unsigned char *insn_bytes_value, int length, diff --git a/opcodes/epiphany-dis.c b/opcodes/epiphany-dis.c index 72ea8bc..a77b1c2 100644 --- a/opcodes/epiphany-dis.c +++ b/opcodes/epiphany-dis.c @@ -443,7 +443,7 @@ print_insn (CGEN_CPU_DESC cd, bfd_byte *buf, unsigned int buflen) { - CGEN_INSN_INT insn_value; + CGEN_INSN_LGUINT insn_value; const CGEN_INSN_LIST *insn_list; CGEN_EXTRACT_INFO ex_info; int basesize; diff --git a/opcodes/fr30-dis.c b/opcodes/fr30-dis.c index f0918b8..f200290 100644 --- a/opcodes/fr30-dis.c +++ b/opcodes/fr30-dis.c @@ -464,7 +464,7 @@ print_insn (CGEN_CPU_DESC cd, bfd_byte *buf, unsigned int buflen) { - CGEN_INSN_INT insn_value; + CGEN_INSN_LGUINT insn_value; const CGEN_INSN_LIST *insn_list; CGEN_EXTRACT_INFO ex_info; int basesize; diff --git a/opcodes/frv-dis.c b/opcodes/frv-dis.c index 4740ac4..d3901c9 100644 --- a/opcodes/frv-dis.c +++ b/opcodes/frv-dis.c @@ -561,7 +561,7 @@ print_insn (CGEN_CPU_DESC cd, bfd_byte *buf, unsigned int buflen) { - CGEN_INSN_INT insn_value; + CGEN_INSN_LGUINT insn_value; const CGEN_INSN_LIST *insn_list; CGEN_EXTRACT_INFO ex_info; int basesize; diff --git a/opcodes/ip2k-dis.c b/opcodes/ip2k-dis.c index 87ff75b..598b04f 100644 --- a/opcodes/ip2k-dis.c +++ b/opcodes/ip2k-dis.c @@ -453,7 +453,7 @@ print_insn (CGEN_CPU_DESC cd, bfd_byte *buf, unsigned int buflen) { - CGEN_INSN_INT insn_value; + CGEN_INSN_LGUINT insn_value; const CGEN_INSN_LIST *insn_list; CGEN_EXTRACT_INFO ex_info; int basesize; diff --git a/opcodes/iq2000-dis.c b/opcodes/iq2000-dis.c index 07fd2fc..3fc988d 100644 --- a/opcodes/iq2000-dis.c +++ b/opcodes/iq2000-dis.c @@ -354,7 +354,7 @@ print_insn (CGEN_CPU_DESC cd, bfd_byte *buf, unsigned int buflen) { - CGEN_INSN_INT insn_value; + CGEN_INSN_LGUINT insn_value; const CGEN_INSN_LIST *insn_list; CGEN_EXTRACT_INFO ex_info; int basesize; diff --git a/opcodes/lm32-dis.c b/opcodes/lm32-dis.c index b013eae..268d0f1 100644 --- a/opcodes/lm32-dis.c +++ b/opcodes/lm32-dis.c @@ -312,7 +312,7 @@ print_insn (CGEN_CPU_DESC cd, bfd_byte *buf, unsigned int buflen) { - CGEN_INSN_INT insn_value; + CGEN_INSN_LGUINT insn_value; const CGEN_INSN_LIST *insn_list; CGEN_EXTRACT_INFO ex_info; int basesize; diff --git a/opcodes/m32c-dis.c b/opcodes/m32c-dis.c index 950198a..c783510 100644 --- a/opcodes/m32c-dis.c +++ b/opcodes/m32c-dis.c @@ -1056,7 +1056,7 @@ print_insn (CGEN_CPU_DESC cd, bfd_byte *buf, unsigned int buflen) { - CGEN_INSN_INT insn_value; + CGEN_INSN_LGUINT insn_value; const CGEN_INSN_LIST *insn_list; CGEN_EXTRACT_INFO ex_info; int basesize; diff --git a/opcodes/m32r-dis.c b/opcodes/m32r-dis.c index 8cfd9fd..4bba1c1 100644 --- a/opcodes/m32r-dis.c +++ b/opcodes/m32r-dis.c @@ -444,7 +444,7 @@ print_insn (CGEN_CPU_DESC cd, bfd_byte *buf, unsigned int buflen) { - CGEN_INSN_INT insn_value; + CGEN_INSN_LGUINT insn_value; const CGEN_INSN_LIST *insn_list; CGEN_EXTRACT_INFO ex_info; int basesize; diff --git a/opcodes/mep-dis.c b/opcodes/mep-dis.c index 91ea29b..0da8a9a 100644 --- a/opcodes/mep-dis.c +++ b/opcodes/mep-dis.c @@ -1366,7 +1366,7 @@ print_insn (CGEN_CPU_DESC cd, bfd_byte *buf, unsigned int buflen) { - CGEN_INSN_INT insn_value; + CGEN_INSN_LGUINT insn_value; const CGEN_INSN_LIST *insn_list; CGEN_EXTRACT_INFO ex_info; int basesize; diff --git a/opcodes/mt-dis.c b/opcodes/mt-dis.c index a212198..8efaac8 100644 --- a/opcodes/mt-dis.c +++ b/opcodes/mt-dis.c @@ -452,7 +452,7 @@ print_insn (CGEN_CPU_DESC cd, bfd_byte *buf, unsigned int buflen) { - CGEN_INSN_INT insn_value; + CGEN_INSN_LGUINT insn_value; const CGEN_INSN_LIST *insn_list; CGEN_EXTRACT_INFO ex_info; int basesize; diff --git a/opcodes/or1k-dis.c b/opcodes/or1k-dis.c index e70c651..e6170d6 100644 --- a/opcodes/or1k-dis.c +++ b/opcodes/or1k-dis.c @@ -339,7 +339,7 @@ print_insn (CGEN_CPU_DESC cd, bfd_byte *buf, unsigned int buflen) { - CGEN_INSN_INT insn_value; + CGEN_INSN_LGUINT insn_value; const CGEN_INSN_LIST *insn_list; CGEN_EXTRACT_INFO ex_info; int basesize; diff --git a/opcodes/xstormy16-dis.c b/opcodes/xstormy16-dis.c index 0de29d6..a8da1e6 100644 --- a/opcodes/xstormy16-dis.c +++ b/opcodes/xstormy16-dis.c @@ -333,7 +333,7 @@ print_insn (CGEN_CPU_DESC cd, bfd_byte *buf, unsigned int buflen) { - CGEN_INSN_INT insn_value; + CGEN_INSN_LGUINT insn_value; const CGEN_INSN_LIST *insn_list; CGEN_EXTRACT_INFO ex_info; int basesize; |