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authorAlan Modra <amodra@gmail.com>2021-05-28 13:24:16 +0930
committerAlan Modra <amodra@gmail.com>2021-05-29 21:06:06 +0930
commit1ff6a3b8e562d09aec8dcf1d8b0ef67f271126fc (patch)
tree1873db0b13b3360f8a280dfbcc1195d0a4a49757
parentd6249f5f1cfc5c37bf026a90a031e8c6463f169b (diff)
downloadfsf-binutils-gdb-1ff6a3b8e562d09aec8dcf1d8b0ef67f271126fc.zip
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PowerPC table driven -Mraw disassembly
opcodes/ * ppc-dis.c (lookup_powerpc): Test deprecated field when -Many. Don't special case PPC_OPCODE_RAW. (lookup_prefix): Likewise. (lookup_vle, lookup_spe2): Similarly. Add dialect parameter and.. (print_insn_powerpc): ..update caller. * ppc-opc.c (EXT): Define. (powerpc_opcodes): Mark extended mnemonics with EXT. (prefix_opcodes, vle_opcodes): Likewise. (XISEL, XISEL_MASK): Add cr field and simplify. (powerpc_opcodes): Use XISEL with extended isel mnemonics and sort all isel variants to where the base mnemonic belongs. Sort dstt, dststt and dssall. gas/ * testsuite/gas/ppc/raw.s, * testsuite/gas/ppc/raw.d: New test. * testsuite/gas/ppc/ppc.exp: Run it.
Diffstat
-rw-r--r--gas/ChangeLog6
-rw-r--r--gas/testsuite/gas/ppc/ppc.exp1
-rw-r--r--gas/testsuite/gas/ppc/raw.d62
-rw-r--r--gas/testsuite/gas/ppc/raw.s52
-rw-r--r--opcodes/ChangeLog15
-rw-r--r--opcodes/ppc-dis.c48
-rw-r--r--opcodes/ppc-opc.c3206
7 files changed, 1755 insertions, 1635 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog
index 98c22ef..3e2e3c5 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,9 @@
+2021-05-29 Alan Modra <amodra@gmail.com>
+
+ * testsuite/gas/ppc/raw.s,
+ * testsuite/gas/ppc/raw.d: New test.
+ * testsuite/gas/ppc/ppc.exp: Run it.
+
2021-05-29 Maciej W. Rozycki <macro@orcam.me.uk>
* testsuite/gas/mips/c0.d: New test.
diff --git a/gas/testsuite/gas/ppc/ppc.exp b/gas/testsuite/gas/ppc/ppc.exp
index 560d927..b5ce36d 100644
--- a/gas/testsuite/gas/ppc/ppc.exp
+++ b/gas/testsuite/gas/ppc/ppc.exp
@@ -151,3 +151,4 @@ run_dump_test "rop-checks"
run_dump_test "dcbt"
run_dump_test "pr27676"
+run_dump_test "raw"
diff --git a/gas/testsuite/gas/ppc/raw.d b/gas/testsuite/gas/ppc/raw.d
new file mode 100644
index 0000000..fff9077
--- /dev/null
+++ b/gas/testsuite/gas/ppc/raw.d
@@ -0,0 +1,62 @@
+#as: -mpower10
+#objdump: -d -Mpower10 -Mraw
+#name: raw disassembly
+
+.*: file format .*
+
+Disassembly of section \.text:
+
+0+ <\.text>:
+ 0: (f0 64 24 90|90 24 64 f0) xxlor vs3,vs4,vs4
+ 4: (f0 64 25 10|10 25 64 f0) xxlnor vs3,vs4,vs4
+ 8: (f0 64 26 80|80 26 64 f0) xvcpsgnsp vs3,vs4,vs4
+ c: (10 64 24 84|84 24 64 10) vor v3,v4,v4
+ 10: (7c 83 23 78|78 23 83 7c) or r3,r4,r4
+ 14: (7c 83 20 f8|f8 20 83 7c) nor r3,r4,r4
+ 18: (4c a6 30 42|42 30 a6 4c) crnor 4\*cr1\+gt,4\*cr1\+eq,4\*cr1\+eq
+ 1c: (4c e7 39 82|82 39 e7 4c) crxor 4\*cr1\+so,4\*cr1\+so,4\*cr1\+so
+ 20: (4c 00 02 42|42 02 00 4c) creqv lt,lt,lt
+ 24: (4c 22 13 82|82 13 22 4c) cror gt,eq,eq
+ 28: (f0 64 20 50|50 20 64 f0) xxpermdi vs3,vs4,vs4,0
+ 2c: (f0 64 23 50|50 23 64 f0) xxpermdi vs3,vs4,vs4,3
+ 30: (f0 64 28 50|50 28 64 f0) xxpermdi vs3,vs4,vs5,0
+ 34: (f0 64 2b 50|50 2b 64 f0) xxpermdi vs3,vs4,vs5,3
+ 38: (f0 64 22 50|50 22 64 f0) xxpermdi vs3,vs4,vs4,2
+ 3c: (10 60 23 ca|ca 23 60 10) vctsxs v3,v4,0
+ 40: (38 60 00 7b|7b 00 60 38) addi r3,0,123
+ 44: (3c 80 01 c8|c8 01 80 3c) addis r4,0,456
+ 48: (43 20 ff f8|f8 ff 20 43) bc 25,lt,0x40
+ 4c: (41 80 00 04|04 00 80 41) bc 12,lt,0x50
+ 50: (4e 80 00 20|20 00 80 4e) bclr 20,lt,0
+ 54: (4c c0 04 20|20 04 c0 4c) bcctr 6,lt,0
+ 58: (4c 83 04 61|61 04 83 4c) bctarl 4,so,0
+ 5c: (4c 60 00 04|04 00 60 4c) addpcis r3,0
+ 60: (28 03 04 d2|d2 04 03 28) cmpli cr0,0,r3,1234
+ 64: (28 23 04 d2|d2 04 23 28) cmpli cr0,1,r3,1234
+ 68: (7c 03 20 00|00 20 03 7c) cmp cr0,0,r3,r4
+ 6c: (7c 23 20 00|00 20 23 7c) cmp cr0,1,r3,r4
+ 70: (7c 03 20 40|40 20 03 7c) cmpl cr0,0,r3,r4
+ 74: (7c 23 20 40|40 20 23 7c) cmpl cr0,1,r3,r4
+ 78: (30 64 ff d6|d6 ff 64 30) addic r3,r4,-42
+ 7c: (54 83 80 3e|3e 80 83 54) rlwinm r3,r4,16,0,31
+ 80: (78 83 06 a0|a0 06 83 78) rldicl r3,r4,0,58
+ 84: (60 00 00 00|00 00 00 60) ori r0,r0,0
+ 88: (68 00 00 00|00 00 00 68) xori r0,r0,0
+ 8c: (7e 03 20 08|08 20 03 7e) tw 16,r3,r4
+ 90: (7c 65 20 50|50 20 65 7c) subf r3,r5,r4
+ 94: (7c 65 20 11|11 20 65 7c) subfc\. r3,r5,r4
+ 98: (7c 83 00 66|66 00 83 7c) mfvsrd r3,vs4
+ 9c: (7c 83 00 67|67 00 83 7c) mfvsrd r3,vs36
+ a0: (7c 6f f1 20|20 f1 6f 7c) mtcrf 255,r3
+ a4: (7e 03 21 ec|ec 21 03 7e) dcbtst r3,r4,16
+ a8: (7c e3 21 ec|ec 21 e3 7c) dcbtst r3,r4,7
+ ac: (7d 03 21 ec|ec 21 03 7d) dcbtst r3,r4,8
+ b0: (7e 23 22 2c|2c 22 23 7e) dcbt r3,r4,17
+ b4: (7c 68 02 a6|a6 02 68 7c) mfspr r3,8
+ b8: (7c 69 02 a6|a6 02 69 7c) mfspr r3,9
+ bc: (7c 70 43 a6|a6 43 70 7c) mtspr 272,r3
+ c0: (7f 7b db 78|78 db 7b 7f) or r27,r27,r27
+ c4: (7f de f3 78|78 f3 de 7f) or r30,r30,r30
+ c8: (7c 20 04 ac|ac 04 20 7c) sync 1,0
+ cc: (06 02 00 00|00 00 02 06) paddi r3,0,-8589934592,0
+ d0: (38 60 00 00|00 00 60 38)
diff --git a/gas/testsuite/gas/ppc/raw.s b/gas/testsuite/gas/ppc/raw.s
new file mode 100644
index 0000000..f318da5
--- /dev/null
+++ b/gas/testsuite/gas/ppc/raw.s
@@ -0,0 +1,52 @@
+ xxmr 3,4
+ xxlnot 3,4
+ xvmovsp 3,4
+ vmr 3,4
+ mr 3,4
+ not 3,4
+ crnot 5,6
+ crclr 7
+ crset 0
+ crmove 1,2
+ xxspltd 3,4,0
+ xxspltd 3,4,1
+ xxmrghd 3,4,5
+ xxmrgld 3,4,5
+ xxswapd 3,4
+ vctsxs 3,4,0
+ li 3,123
+ lis 4,456
+ bdnz+ .-8
+ blt .+4
+ blr
+ bgectr-
+ bnutarl
+ lnia 3
+ cmplwi 3,1234
+ cmpldi 3,1234
+ cmpw 3,4
+ cmpd 3,4
+ cmplw 3,4
+ cmpld 3,4
+ subic 3,4,42
+ rotlwi 3,4,16
+ clrldi 3,4,58
+ nop
+ xnop
+ twlt 3,4
+ sub 3,4,5
+ subc. 3,4,5
+ mffprd 3,4
+ mfvrd 3,4
+ mtcr 3
+ dcbtstt 3,4
+ dcbtstct 3,4,7
+ dcbtstds 3,4,8
+ dcbna 3,4
+ mflr 3
+ mfctr 3
+ mtsprg0 3
+ yield
+ mdoom
+ lwsync
+ pli 3,-1<<33
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 3d87487..e6b5f3e 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,18 @@
+2021-05-29 Alan Modra <amodra@gmail.com>
+
+ * ppc-dis.c (lookup_powerpc): Test deprecated field when -Many.
+ Don't special case PPC_OPCODE_RAW.
+ (lookup_prefix): Likewise.
+ (lookup_vle, lookup_spe2): Similarly. Add dialect parameter and..
+ (print_insn_powerpc): ..update caller.
+ * ppc-opc.c (EXT): Define.
+ (powerpc_opcodes): Mark extended mnemonics with EXT.
+ (prefix_opcodes, vle_opcodes): Likewise.
+ (XISEL, XISEL_MASK): Add cr field and simplify.
+ (powerpc_opcodes): Use XISEL with extended isel mnemonics and sort
+ all isel variants to where the base mnemonic belongs. Sort dstt,
+ dststt and dssall.
+
2021-05-29 Maciej W. Rozycki <macro@orcam.me.uk>
* mips-opc.c (mips_builtin_opcodes): Reorder legacy COP0, COP2,
diff --git a/opcodes/ppc-dis.c b/opcodes/ppc-dis.c
index 739195a..f25909d 100644
--- a/opcodes/ppc-dis.c
+++ b/opcodes/ppc-dis.c
@@ -580,7 +580,7 @@ skip_optional_operands (const unsigned char *opindex,
static const struct powerpc_opcode *
lookup_powerpc (uint64_t insn, ppc_cpu_t dialect)
{
- const struct powerpc_opcode *opcode, *opcode_end, *last;
+ const struct powerpc_opcode *opcode, *opcode_end;
unsigned long op;
/* Get the major opcode of the instruction. */
@@ -588,7 +588,6 @@ lookup_powerpc (uint64_t insn, ppc_cpu_t dialect)
/* Find the first match in the opcode table for this major opcode. */
opcode_end = powerpc_opcodes + powerpc_opcd_indices[op + 1];
- last = NULL;
for (opcode = powerpc_opcodes + powerpc_opcd_indices[op];
opcode < opcode_end;
++opcode)
@@ -599,8 +598,8 @@ lookup_powerpc (uint64_t insn, ppc_cpu_t dialect)
if ((insn & opcode->mask) != opcode->opcode
|| ((dialect & PPC_OPCODE_ANY) == 0
- && ((opcode->flags & dialect) == 0
- || (opcode->deprecated & dialect) != 0)))
+ && (opcode->flags & dialect) == 0)
+ || (opcode->deprecated & dialect) != 0)
continue;
/* Check validity of operands. */
@@ -614,16 +613,10 @@ lookup_powerpc (uint64_t insn, ppc_cpu_t dialect)
if (invalid)
continue;
- if ((dialect & PPC_OPCODE_RAW) == 0)
- return opcode;
-
- /* The raw machine insn is one that is not a specialization. */
- if (last == NULL
- || (last->mask & ~opcode->mask) != 0)
- last = opcode;
+ return opcode;
}
- return last;
+ return NULL;
}
/* Find a match for INSN in the PREFIX opcode table. */
@@ -631,7 +624,7 @@ lookup_powerpc (uint64_t insn, ppc_cpu_t dialect)
static const struct powerpc_opcode *
lookup_prefix (uint64_t insn, ppc_cpu_t dialect)
{
- const struct powerpc_opcode *opcode, *opcode_end, *last;
+ const struct powerpc_opcode *opcode, *opcode_end;
unsigned long seg;
/* Get the opcode segment of the instruction. */
@@ -639,7 +632,6 @@ lookup_prefix (uint64_t insn, ppc_cpu_t dialect)
/* Find the first match in the opcode table for this major opcode. */
opcode_end = prefix_opcodes + prefix_opcd_indices[seg + 1];
- last = NULL;
for (opcode = prefix_opcodes + prefix_opcd_indices[seg];
opcode < opcode_end;
++opcode)
@@ -650,8 +642,8 @@ lookup_prefix (uint64_t insn, ppc_cpu_t dialect)
if ((insn & opcode->mask) != opcode->opcode
|| ((dialect & PPC_OPCODE_ANY) == 0
- && ((opcode->flags & dialect) == 0
- || (opcode->deprecated & dialect) != 0)))
+ && (opcode->flags & dialect) == 0)
+ || (opcode->deprecated & dialect) != 0)
continue;
/* Check validity of operands. */
@@ -665,22 +657,16 @@ lookup_prefix (uint64_t insn, ppc_cpu_t dialect)
if (invalid)
continue;
- if ((dialect & PPC_OPCODE_RAW) == 0)
- return opcode;
-
- /* The raw machine insn is one that is not a specialization. */
- if (last == NULL
- || (last->mask & ~opcode->mask) != 0)
- last = opcode;
+ return opcode;
}
- return last;
+ return NULL;
}
/* Find a match for INSN in the VLE opcode table. */
static const struct powerpc_opcode *
-lookup_vle (uint64_t insn)
+lookup_vle (uint64_t insn, ppc_cpu_t dialect)
{
const struct powerpc_opcode *opcode;
const struct powerpc_opcode *opcode_end;
@@ -711,7 +697,8 @@ lookup_vle (uint64_t insn)
insn2 = insn;
if (table_op_is_short)
insn2 >>= 16;
- if ((insn2 & table_mask) != table_opcd)
+ if ((insn2 & table_mask) != table_opcd
+ || (opcode->deprecated & dialect) != 0)
continue;
/* Check validity of operands. */
@@ -734,7 +721,7 @@ lookup_vle (uint64_t insn)
/* Find a match for INSN in the SPE2 opcode table. */
static const struct powerpc_opcode *
-lookup_spe2 (uint64_t insn)
+lookup_spe2 (uint64_t insn, ppc_cpu_t dialect)
{
const struct powerpc_opcode *opcode, *opcode_end;
unsigned op, xop, seg;
@@ -763,7 +750,8 @@ lookup_spe2 (uint64_t insn)
int invalid;
insn2 = insn;
- if ((insn2 & table_mask) != table_opcd)
+ if ((insn2 & table_mask) != table_opcd
+ || (opcode->deprecated & dialect) != 0)
continue;
/* Check validity of operands. */
@@ -916,7 +904,7 @@ print_insn_powerpc (bfd_vma memaddr,
}
if (opcode == NULL && (dialect & PPC_OPCODE_VLE) != 0)
{
- opcode = lookup_vle (insn);
+ opcode = lookup_vle (insn, dialect);
if (opcode != NULL && PPC_OP_SE_VLE (opcode->mask))
{
/* The operands will be fetched out of the 16-bit instruction. */
@@ -927,7 +915,7 @@ print_insn_powerpc (bfd_vma memaddr,
if (opcode == NULL && insn_length == 4)
{
if ((dialect & PPC_OPCODE_SPE2) != 0)
- opcode = lookup_spe2 (insn);
+ opcode = lookup_spe2 (insn, dialect);
if (opcode == NULL)
opcode = lookup_powerpc (insn, dialect & ~PPC_OPCODE_ANY);
if (opcode == NULL && (dialect & PPC_OPCODE_ANY) != 0)
diff --git a/opcodes/ppc-opc.c b/opcodes/ppc-opc.c
index 84b885a..e0593c8 100644
--- a/opcodes/ppc-opc.c
+++ b/opcodes/ppc-opc.c
@@ -4067,8 +4067,8 @@ const unsigned int num_powerpc_operands = (sizeof (powerpc_operands)
#define XFL_MASK XFL (0x3f, 0x3ff, 1)
/* An X form isel instruction. */
-#define XISEL(op, xop) (OP (op) | ((((uint64_t)(xop)) & 0x1f) << 1))
-#define XISEL_MASK XISEL(0x3f, 0x1f)
+#define XISEL(op, xop, cr) (OP (op) | ((xop) << 1) | ((cr) << 6))
+#define XISEL_MASK XISEL(0x3f, 0x1f, 0)
/* An XL form instruction with the LK field set to 0. */
#define XL(op, xop) (OP (op) | ((((uint64_t)(xop)) & 0x3ff) << 1))
@@ -4324,6 +4324,9 @@ const unsigned int num_powerpc_operands = (sizeof (powerpc_operands)
#define PPCHTM PPC_OPCODE_POWER8
#define E200Z4 PPC_OPCODE_E200Z4
#define PPCLSP PPC_OPCODE_LSP
+/* Used to mark extended mnemonic in deprecated field so that -Mraw
+ won't use this variant in disassembly. */
+#define EXT PPC_OPCODE_RAW
/* The opcode table.
@@ -4349,53 +4352,53 @@ const unsigned int num_powerpc_operands = (sizeof (powerpc_operands)
const struct powerpc_opcode powerpc_opcodes[] = {
{"attn", X(0,256), X_MASK, POWER4|PPCA2, PPC476|PPCVLE, {0}},
-{"tdlgti", OPTO(2,TOLGT), OPTO_MASK, PPC64, PPCVLE, {RA, SI}},
-{"tdllti", OPTO(2,TOLLT), OPTO_MASK, PPC64, PPCVLE, {RA, SI}},
-{"tdeqi", OPTO(2,TOEQ), OPTO_MASK, PPC64, PPCVLE, {RA, SI}},
-{"tdlgei", OPTO(2,TOLGE), OPTO_MASK, PPC64, PPCVLE, {RA, SI}},
-{"tdlnli", OPTO(2,TOLNL), OPTO_MASK, PPC64, PPCVLE, {RA, SI}},
-{"tdllei", OPTO(2,TOLLE), OPTO_MASK, PPC64, PPCVLE, {RA, SI}},
-{"tdlngi", OPTO(2,TOLNG), OPTO_MASK, PPC64, PPCVLE, {RA, SI}},
-{"tdgti", OPTO(2,TOGT), OPTO_MASK, PPC64, PPCVLE, {RA, SI}},
-{"tdgei", OPTO(2,TOGE), OPTO_MASK, PPC64, PPCVLE, {RA, SI}},
-{"tdnli", OPTO(2,TONL), OPTO_MASK, PPC64, PPCVLE, {RA, SI}},
-{"tdlti", OPTO(2,TOLT), OPTO_MASK, PPC64, PPCVLE, {RA, SI}},
-{"tdlei", OPTO(2,TOLE), OPTO_MASK, PPC64, PPCVLE, {RA, SI}},
-{"tdngi", OPTO(2,TONG), OPTO_MASK, PPC64, PPCVLE, {RA, SI}},
-{"tdnei", OPTO(2,TONE), OPTO_MASK, PPC64, PPCVLE, {RA, SI}},
-{"tdui", OPTO(2,TOU), OPTO_MASK, PPC64, PPCVLE, {RA, SI}},
+{"tdlgti", OPTO(2,TOLGT), OPTO_MASK, PPC64, PPCVLE|EXT, {RA, SI}},
+{"tdllti", OPTO(2,TOLLT), OPTO_MASK, PPC64, PPCVLE|EXT, {RA, SI}},
+{"tdeqi", OPTO(2,TOEQ), OPTO_MASK, PPC64, PPCVLE|EXT, {RA, SI}},
+{"tdlgei", OPTO(2,TOLGE), OPTO_MASK, PPC64, PPCVLE|EXT, {RA, SI}},
+{"tdlnli", OPTO(2,TOLNL), OPTO_MASK, PPC64, PPCVLE|EXT, {RA, SI}},
+{"tdllei", OPTO(2,TOLLE), OPTO_MASK, PPC64, PPCVLE|EXT, {RA, SI}},
+{"tdlngi", OPTO(2,TOLNG), OPTO_MASK, PPC64, PPCVLE|EXT, {RA, SI}},
+{"tdgti", OPTO(2,TOGT), OPTO_MASK, PPC64, PPCVLE|EXT, {RA, SI}},
+{"tdgei", OPTO(2,TOGE), OPTO_MASK, PPC64, PPCVLE|EXT, {RA, SI}},
+{"tdnli", OPTO(2,TONL), OPTO_MASK, PPC64, PPCVLE|EXT, {RA, SI}},
+{"tdlti", OPTO(2,TOLT), OPTO_MASK, PPC64, PPCVLE|EXT, {RA, SI}},
+{"tdlei", OPTO(2,TOLE), OPTO_MASK, PPC64, PPCVLE|EXT, {RA, SI}},
+{"tdngi", OPTO(2,TONG), OPTO_MASK, PPC64, PPCVLE|EXT, {RA, SI}},
+{"tdnei", OPTO(2,TONE), OPTO_MASK, PPC64, PPCVLE|EXT, {RA, SI}},
+{"tdui", OPTO(2,TOU), OPTO_MASK, PPC64, PPCVLE|EXT, {RA, SI}},
{"tdi", OP(2), OP_MASK, PPC64, PPCVLE, {TO, RA, SI}},
-{"twlgti", OPTO(3,TOLGT), OPTO_MASK, PPCCOM, PPCVLE, {RA, SI}},
-{"tlgti", OPTO(3,TOLGT), OPTO_MASK, PWRCOM, PPCVLE, {RA, SI}},
-{"twllti", OPTO(3,TOLLT), OPTO_MASK, PPCCOM, PPCVLE, {RA, SI}},
-{"tllti", OPTO(3,TOLLT), OPTO_MASK, PWRCOM, PPCVLE, {RA, SI}},
-{"tweqi", OPTO(3,TOEQ), OPTO_MASK, PPCCOM, PPCVLE, {RA, SI}},
-{"teqi", OPTO(3,TOEQ), OPTO_MASK, PWRCOM, PPCVLE, {RA, SI}},
-{"twlgei", OPTO(3,TOLGE), OPTO_MASK, PPCCOM, PPCVLE, {RA, SI}},
-{"tlgei", OPTO(3,TOLGE), OPTO_MASK, PWRCOM, PPCVLE, {RA, SI}},
-{"twlnli", OPTO(3,TOLNL), OPTO_MASK, PPCCOM, PPCVLE, {RA, SI}},
-{"tlnli", OPTO(3,TOLNL), OPTO_MASK, PWRCOM, PPCVLE, {RA, SI}},
-{"twllei", OPTO(3,TOLLE), OPTO_MASK, PPCCOM, PPCVLE, {RA, SI}},
-{"tllei", OPTO(3,TOLLE), OPTO_MASK, PWRCOM, PPCVLE, {RA, SI}},
-{"twlngi", OPTO(3,TOLNG), OPTO_MASK, PPCCOM, PPCVLE, {RA, SI}},
-{"tlngi", OPTO(3,TOLNG), OPTO_MASK, PWRCOM, PPCVLE, {RA, SI}},
-{"twgti", OPTO(3,TOGT), OPTO_MASK, PPCCOM, PPCVLE, {RA, SI}},
-{"tgti", OPTO(3,TOGT), OPTO_MASK, PWRCOM, PPCVLE, {RA, SI}},
-{"twgei", OPTO(3,TOGE), OPTO_MASK, PPCCOM, PPCVLE, {RA, SI}},
-{"tgei", OPTO(3,TOGE), OPTO_MASK, PWRCOM, PPCVLE, {RA, SI}},
-{"twnli", OPTO(3,TONL), OPTO_MASK, PPCCOM, PPCVLE, {RA, SI}},
-{"tnli", OPTO(3,TONL), OPTO_MASK, PWRCOM, PPCVLE, {RA, SI}},
-{"twlti", OPTO(3,TOLT), OPTO_MASK, PPCCOM, PPCVLE, {RA, SI}},
-{"tlti", OPTO(3,TOLT), OPTO_MASK, PWRCOM, PPCVLE, {RA, SI}},
-{"twlei", OPTO(3,TOLE), OPTO_MASK, PPCCOM, PPCVLE, {RA, SI}},
-{"tlei", OPTO(3,TOLE), OPTO_MASK, PWRCOM, PPCVLE, {RA, SI}},
-{"twngi", OPTO(3,TONG), OPTO_MASK, PPCCOM, PPCVLE, {RA, SI}},
-{"tngi", OPTO(3,TONG), OPTO_MASK, PWRCOM, PPCVLE, {RA, SI}},
-{"twnei", OPTO(3,TONE), OPTO_MASK, PPCCOM, PPCVLE, {RA, SI}},
-{"tnei", OPTO(3,TONE), OPTO_MASK, PWRCOM, PPCVLE, {RA, SI}},
-{"twui", OPTO(3,TOU), OPTO_MASK, PPCCOM, PPCVLE, {RA, SI}},
-{"tui", OPTO(3,TOU), OPTO_MASK, PWRCOM, PPCVLE, {RA, SI}},
+{"twlgti", OPTO(3,TOLGT), OPTO_MASK, PPCCOM, PPCVLE|EXT, {RA, SI}},
+{"tlgti", OPTO(3,TOLGT), OPTO_MASK, PWRCOM, PPCVLE|EXT, {RA, SI}},
+{"twllti", OPTO(3,TOLLT), OPTO_MASK, PPCCOM, PPCVLE|EXT, {RA, SI}},
+{"tllti", OPTO(3,TOLLT), OPTO_MASK, PWRCOM, PPCVLE|EXT, {RA, SI}},
+{"tweqi", OPTO(3,TOEQ), OPTO_MASK, PPCCOM, PPCVLE|EXT, {RA, SI}},
+{"teqi", OPTO(3,TOEQ), OPTO_MASK, PWRCOM, PPCVLE|EXT, {RA, SI}},
+{"twlgei", OPTO(3,TOLGE), OPTO_MASK, PPCCOM, PPCVLE|EXT, {RA, SI}},
+{"tlgei", OPTO(3,TOLGE), OPTO_MASK, PWRCOM, PPCVLE|EXT, {RA, SI}},
+{"twlnli", OPTO(3,TOLNL), OPTO_MASK, PPCCOM, PPCVLE|EXT, {RA, SI}},
+{"tlnli", OPTO(3,TOLNL), OPTO_MASK, PWRCOM, PPCVLE|EXT, {RA, SI}},
+{"twllei", OPTO(3,TOLLE), OPTO_MASK, PPCCOM, PPCVLE|EXT, {RA, SI}},
+{"tllei", OPTO(3,TOLLE), OPTO_MASK, PWRCOM, PPCVLE|EXT, {RA, SI}},
+{"twlngi", OPTO(3,TOLNG), OPTO_MASK, PPCCOM, PPCVLE|EXT, {RA, SI}},
+{"tlngi", OPTO(3,TOLNG), OPTO_MASK, PWRCOM, PPCVLE|EXT, {RA, SI}},
+{"twgti", OPTO(3,TOGT), OPTO_MASK, PPCCOM, PPCVLE|EXT, {RA, SI}},
+{"tgti", OPTO(3,TOGT), OPTO_MASK, PWRCOM, PPCVLE|EXT, {RA, SI}},
+{"twgei", OPTO(3,TOGE), OPTO_MASK, PPCCOM, PPCVLE|EXT, {RA, SI}},
+{"tgei", OPTO(3,TOGE), OPTO_MASK, PWRCOM, PPCVLE|EXT, {RA, SI}},
+{"twnli", OPTO(3,TONL), OPTO_MASK, PPCCOM, PPCVLE|EXT, {RA, SI}},
+{"tnli", OPTO(3,TONL), OPTO_MASK, PWRCOM, PPCVLE|EXT, {RA, SI}},
+{"twlti", OPTO(3,TOLT), OPTO_MASK, PPCCOM, PPCVLE|EXT, {RA, SI}},
+{"tlti", OPTO(3,TOLT), OPTO_MASK, PWRCOM, PPCVLE|EXT, {RA, SI}},
+{"twlei", OPTO(3,TOLE), OPTO_MASK, PPCCOM, PPCVLE|EXT, {RA, SI}},
+{"tlei", OPTO(3,TOLE), OPTO_MASK, PWRCOM, PPCVLE|EXT, {RA, SI}},
+{"twngi", OPTO(3,TONG), OPTO_MASK, PPCCOM, PPCVLE|EXT, {RA, SI}},
+{"tngi", OPTO(3,TONG), OPTO_MASK, PWRCOM, PPCVLE|EXT, {RA, SI}},
+{"twnei", OPTO(3,TONE), OPTO_MASK, PPCCOM, PPCVLE|EXT, {RA, SI}},
+{"tnei", OPTO(3,TONE), OPTO_MASK, PWRCOM, PPCVLE|EXT, {RA, SI}},
+{"twui", OPTO(3,TOU), OPTO_MASK, PPCCOM, PPCVLE|EXT, {RA, SI}},
+{"tui", OPTO(3,TOU), OPTO_MASK, PWRCOM, PPCVLE|EXT, {RA, SI}},
{"twi", OP(3), OP_MASK, PPCCOM, PPCVLE, {TO, RA, SI}},
{"ti", OP(3), OP_MASK, PWRCOM, PPCVLE, {TO, RA, SI}},
@@ -4645,9 +4648,9 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"evandc", VX (4, 530), VX_MASK, PPCSPE, 0, {RS, RA, RB}},
{"vsrdbi", VX (4, 534), VXSH_MASK, POWER10, 0, {VD, VA, VB, SH3}},
{"evxor", VX (4, 534), VX_MASK, PPCSPE, 0, {RS, RA, RB}},
-{"evmr", VX (4, 535), VX_MASK, PPCSPE, 0, {RS, RAB}},
+{"evmr", VX (4, 535), VX_MASK, PPCSPE, EXT, {RS, RAB}},
{"evor", VX (4, 535), VX_MASK, PPCSPE, 0, {RS, RA, RB}},
-{"evnot", VX (4, 536), VX_MASK, PPCSPE, 0, {RS, RAB}},
+{"evnot", VX (4, 536), VX_MASK, PPCSPE, EXT, {RS, RAB}},
{"evnor", VX (4, 536), VX_MASK, PPCSPE, 0, {RS, RA, RB}},
{"get", APU(4, 268,0), APU_RA_MASK, PPC405, 0, {RT, FSL}},
{"eveqv", VX (4, 537), VX_MASK, PPCSPE, 0, {RS, RA, RB}},
@@ -4849,7 +4852,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"vmulesb", VX (4, 776), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
{"evlhhesplat", VX (4, 777), VX_MASK, PPCSPE, 0, {RS, EVUIMM_2, RA}},
{"vcfux", VX (4, 778), VX_MASK, PPCVEC, 0, {VD, VB, UIMM}},
-{"vcuxwfp", VX (4, 778), VX_MASK, PPCVEC, 0, {VD, VB, UIMM}},
+{"vcuxwfp", VX (4, 778), VX_MASK, PPCVEC, EXT, {VD, VB, UIMM}},
{"vdivesq", VX (4, 779), VX_MASK, POWER10, 0, {VD, VA, VB}},
{"evlhhousplatx",VX(4, 780), VX_MASK, PPCSPE, 0, {RS, RA, RB}},
{"vspltisb", VX (4, 780), VXVB_MASK, PPCVEC, 0, {VD, SIMM}},
@@ -4894,7 +4897,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"vcmpgtsh", VXR(4, 838,0), VXR_MASK, PPCVEC, 0, {VD, VA, VB}},
{"vmulesh", VX (4, 840), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
{"vcfsx", VX (4, 842), VX_MASK, PPCVEC, 0, {VD, VB, UIMM}},
-{"vcsxwfp", VX (4, 842), VX_MASK, PPCVEC, 0, {VD, VB, UIMM}},
+{"vcsxwfp", VX (4, 842), VX_MASK, PPCVEC, EXT, {VD, VB, UIMM}},
{"vspltish", VX (4, 844), VXVB_MASK, PPCVEC, 0, {VD, SIMM}},
{"vinserth", VX (4, 845), VXUIMM4_MASK, PPCVEC3, 0, {VD, VB, UIMM4}},
{"vupkhpx", VX (4, 846), VXVA_MASK, PPCVEC, 0, {VD, VB}},
@@ -4913,7 +4916,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"vmulesw", VX (4, 904), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},
{"vmulhsw", VX (4, 905), VX_MASK, POWER10, 0, {VD, VA, VB}},
{"vctuxs", VX (4, 906), VX_MASK, PPCVEC, 0, {VD, VB, UIMM}},
-{"vcfpuxws", VX (4, 906), VX_MASK, PPCVEC, 0, {VD, VB, UIMM}},
+{"vcfpuxws", VX (4, 906), VX_MASK, PPCVEC, EXT, {VD, VB, UIMM}},
{"vdivesw", VX (4, 907), VX_MASK, POWER10, 0, {VD, VA, VB}},
{"vspltisw", VX (4, 908), VXVB_MASK, PPCVEC, 0, {VD, SIMM}},
{"vinsertw", VX (4, 909), VXUIMM4_MASK, PPCVEC3, 0, {VD, VB, UIMM4}},
@@ -4927,7 +4930,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"vmulesd", VX (4, 968), VX_MASK, POWER10, 0, {VD, VA, VB}},
{"vmulhsd", VX (4, 969), VX_MASK, POWER10, 0, {VD, VA, VB}},
{"vctsxs", VX (4, 970), VX_MASK, PPCVEC, 0, {VD, VB, UIMM}},
-{"vcfpsxws", VX (4, 970), VX_MASK, PPCVEC, 0, {VD, VB, UIMM}},
+{"vcfpsxws", VX (4, 970), VX_MASK, PPCVEC, EXT, {VD, VB, UIMM}},
{"vdivesd", VX (4, 971), VX_MASK, POWER10, 0, {VD, VA, VB}},
{"vinsertd", VX (4, 973), VXUIMM4_MASK, PPCVEC3, 0, {VD, VB, UIMM4}},
{"vupklpx", VX (4, 974), VXVA_MASK, PPCVEC, 0, {VD, VB}},
@@ -5017,7 +5020,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"bcdus.", VX (4,1153), VX_MASK, PPCVEC3, 0, {VD, VA, VB}},
{"vavguw", VX (4,1154), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
{"vabsduw", VX (4,1155), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},
-{"vmr", VX (4,1156), VX_MASK, PPCVEC, 0, {VD, VAB}},
+{"vmr", VX (4,1156), VX_MASK, PPCVEC, EXT, {VD, VAB}},
{"vor", VX (4,1156), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
{"vcmpnew.", VXR(4, 135,1), VXR_MASK, PPCVEC3, 0, {VD, VA, VB}},
{"vpmsumw", VX (4,1160), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},
@@ -5062,7 +5065,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"vavgsb", VX (4,1282), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
{"evmhessfaaw", VX (4,1283), VX_MASK, PPCSPE, 0, {RS, RA, RB}},
{"evmhousiaaw", VX (4,1284), VX_MASK, PPCSPE, 0, {RS, RA, RB}},
-{"vnot", VX (4,1284), VX_MASK, PPCVEC, 0, {VD, VAB}},
+{"vnot", VX (4,1284), VX_MASK, PPCVEC, EXT, {VD, VAB}},
{"vnor", VX (4,1284), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
{"evmhossiaaw", VX (4,1285), VX_MASK, PPCSPE, 0, {RS, RA, RB}},
{"udi4fcm.", APU(4, 643,0), APU_MASK, PPC405|PPC440, 0, {URT, URA, URB}},
@@ -5326,307 +5329,307 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"dozi", OP(9), OP_MASK, M601, PPCVLE, {RT, RA, SI}},
-{"cmplwi", OPL(10,0), OPL_MASK, PPCCOM, PPCVLE, {OBF, RA, UISIGNOPT}},
-{"cmpldi", OPL(10,1), OPL_MASK, PPC64, PPCVLE, {OBF, RA, UISIGNOPT}},
+{"cmplwi", OPL(10,0), OPL_MASK, PPCCOM, PPCVLE|EXT, {OBF, RA, UISIGNOPT}},
+{"cmpldi", OPL(10,1), OPL_MASK, PPC64, PPCVLE|EXT, {OBF, RA, UISIGNOPT}},
{"cmpli", OP(10), OP_MASK, PPC, PPCVLE, {BF, L32OPT, RA, UISIGNOPT}},
{"cmpli", OP(10), OP_MASK, PWRCOM, PPC|PPCVLE, {BF, RA, UISIGNOPT}},
-{"cmpwi", OPL(11,0), OPL_MASK, PPCCOM, PPCVLE, {OBF, RA, SI}},
-{"cmpdi", OPL(11,1), OPL_MASK, PPC64, PPCVLE, {OBF, RA, SI}},
+{"cmpwi", OPL(11,0), OPL_MASK, PPCCOM, PPCVLE|EXT, {OBF, RA, SI}},
+{"cmpdi", OPL(11,1), OPL_MASK, PPC64, PPCVLE|EXT, {OBF, RA, SI}},
{"cmpi", OP(11), OP_MASK, PPC, PPCVLE, {BF, L32OPT, RA, SI}},
{"cmpi", OP(11), OP_MASK, PWRCOM, PPC|PPCVLE, {BF, RA, SI}},
{"addic", OP(12), OP_MASK, PPCCOM, PPCVLE, {RT, RA, SI}},
{"ai", OP(12), OP_MASK, PWRCOM, PPCVLE, {RT, RA, SI}},
-{"subic", OP(12), OP_MASK, PPCCOM, PPCVLE, {RT, RA, NSI}},
+{"subic", OP(12), OP_MASK, PPCCOM, PPCVLE|EXT, {RT, RA, NSI}},
{"addic.", OP(13), OP_MASK, PPCCOM, PPCVLE, {RT, RA, SI}},
{"ai.", OP(13), OP_MASK, PWRCOM, PPCVLE, {RT, RA, SI}},
-{"subic.", OP(13), OP_MASK, PPCCOM, PPCVLE, {RT, RA, NSI}},
+{"subic.", OP(13), OP_MASK, PPCCOM, PPCVLE|EXT, {RT, RA, NSI}},
-{"li", OP(14), DRA_MASK, PPCCOM, PPCVLE, {RT, SI}},
-{"lil", OP(14), DRA_MASK, PWRCOM, PPCVLE, {RT, SI}},
+{"li", OP(14), DRA_MASK, PPCCOM, PPCVLE|EXT, {RT, SI}},
+{"lil", OP(14), DRA_MASK, PWRCOM, PPCVLE|EXT, {RT, SI}},
{"addi", OP(14), OP_MASK, PPCCOM, PPCVLE, {RT, RA0, SI}},
{"cal", OP(14), OP_MASK, PWRCOM, PPCVLE, {RT, D, RA0}},
-{"subi", OP(14), OP_MASK, PPCCOM, PPCVLE, {RT, RA0, NSI}},
-{"la", OP(14), OP_MASK, PPCCOM, PPCVLE, {RT, D, RA0}},
+{"subi", OP(14), OP_MASK, PPCCOM, PPCVLE|EXT, {RT, RA0, NSI}},
+{"la", OP(14), OP_MASK, PPCCOM, PPCVLE|EXT, {RT, D, RA0}},
-{"lis", OP(15), DRA_MASK, PPCCOM, PPCVLE, {RT, SISIGNOPT}},
-{"liu", OP(15), DRA_MASK, PWRCOM, PPCVLE, {RT, SISIGNOPT}},
+{"lis", OP(15), DRA_MASK, PPCCOM, PPCVLE|EXT, {RT, SISIGNOPT}},
+{"liu", OP(15), DRA_MASK, PWRCOM, PPCVLE|EXT, {RT, SISIGNOPT}},
{"addis", OP(15), OP_MASK, PPCCOM, PPCVLE, {RT, RA0, SISIGNOPT}},
{"cau", OP(15), OP_MASK, PWRCOM, PPCVLE, {RT, RA0, SISIGNOPT}},
-{"subis", OP(15), OP_MASK, PPCCOM, PPCVLE, {RT, RA0, NSISIGNOPT}},
-
-{"bdnz-", BBO(16,BODNZ,0,0), BBOATBI_MASK, PPCCOM, PPCVLE, {BDM}},
-{"bdnz+", BBO(16,BODNZ,0,0), BBOATBI_MASK, PPCCOM, PPCVLE, {BDP}},
-{"bdnz", BBO(16,BODNZ,0,0), BBOATBI_MASK, PPCCOM, PPCVLE, {BD}},
-{"bdn", BBO(16,BODNZ,0,0), BBOATBI_MASK, PWRCOM, PPCVLE, {BD}},
-{"bdnzl-", BBO(16,BODNZ,0,1), BBOATBI_MASK, PPCCOM, PPCVLE, {BDM}},
-{"bdnzl+", BBO(16,BODNZ,0,1), BBOATBI_MASK, PPCCOM, PPCVLE, {BDP}},
-{"bdnzl", BBO(16,BODNZ,0,1), BBOATBI_MASK, PPCCOM, PPCVLE, {BD}},
-{"bdnl", BBO(16,BODNZ,0,1), BBOATBI_MASK, PWRCOM, PPCVLE, {BD}},
-{"bdnza-", BBO(16,BODNZ,1,0), BBOATBI_MASK, PPCCOM, PPCVLE, {BDMA}},
-{"bdnza+", BBO(16,BODNZ,1,0), BBOATBI_MASK, PPCCOM, PPCVLE, {BDPA}},
-{"bdnza", BBO(16,BODNZ,1,0), BBOATBI_MASK, PPCCOM, PPCVLE, {BDA}},
-{"bdna", BBO(16,BODNZ,1,0), BBOATBI_MASK, PWRCOM, PPCVLE, {BDA}},
-{"bdnzla-", BBO(16,BODNZ,1,1), BBOATBI_MASK, PPCCOM, PPCVLE, {BDMA}},
-{"bdnzla+", BBO(16,BODNZ,1,1), BBOATBI_MASK, PPCCOM, PPCVLE, {BDPA}},
-{"bdnzla", BBO(16,BODNZ,1,1), BBOATBI_MASK, PPCCOM, PPCVLE, {BDA}},
-{"bdnla", BBO(16,BODNZ,1,1), BBOATBI_MASK, PWRCOM, PPCVLE, {BDA}},
-{"bdz-", BBO(16,BODZ,0,0), BBOATBI_MASK, PPCCOM, PPCVLE, {BDM}},
-{"bdz+", BBO(16,BODZ,0,0), BBOATBI_MASK, PPCCOM, PPCVLE, {BDP}},
-{"bdz", BBO(16,BODZ,0,0), BBOATBI_MASK, COM, PPCVLE, {BD}},
-{"bdzl-", BBO(16,BODZ,0,1), BBOATBI_MASK, PPCCOM, PPCVLE, {BDM}},
-{"bdzl+", BBO(16,BODZ,0,1), BBOATBI_MASK, PPCCOM, PPCVLE, {BDP}},
-{"bdzl", BBO(16,BODZ,0,1), BBOATBI_MASK, COM, PPCVLE, {BD}},
-{"bdza-", BBO(16,BODZ,1,0), BBOATBI_MASK, PPCCOM, PPCVLE, {BDMA}},
-{"bdza+", BBO(16,BODZ,1,0), BBOATBI_MASK, PPCCOM, PPCVLE, {BDPA}},
-{"bdza", BBO(16,BODZ,1,0), BBOATBI_MASK, COM, PPCVLE, {BDA}},
-{"bdzla-", BBO(16,BODZ,1,1), BBOATBI_MASK, PPCCOM, PPCVLE, {BDMA}},
-{"bdzla+", BBO(16,BODZ,1,1), BBOATBI_MASK, PPCCOM, PPCVLE, {BDPA}},
-{"bdzla", BBO(16,BODZ,1,1), BBOATBI_MASK, COM, PPCVLE, {BDA}},
-
-{"bge-", BBOCB(16,BOF,CBLT,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}},
-{"bge+", BBOCB(16,BOF,CBLT,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}},
-{"bge", BBOCB(16,BOF,CBLT,0,0), BBOATCB_MASK, COM, PPCVLE, {CR, BD}},
-{"bnl-", BBOCB(16,BOF,CBLT,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}},
-{"bnl+", BBOCB(16,BOF,CBLT,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}},
-{"bnl", BBOCB(16,BOF,CBLT,0,0), BBOATCB_MASK, COM, PPCVLE, {CR, BD}},
-{"bgel-", BBOCB(16,BOF,CBLT,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}},
-{"bgel+", BBOCB(16,BOF,CBLT,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}},
-{"bgel", BBOCB(16,BOF,CBLT,0,1), BBOATCB_MASK, COM, PPCVLE, {CR, BD}},
-{"bnll-", BBOCB(16,BOF,CBLT,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}},
-{"bnll+", BBOCB(16,BOF,CBLT,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}},
-{"bnll", BBOCB(16,BOF,CBLT,0,1), BBOATCB_MASK, COM, PPCVLE, {CR, BD}},
-{"bgea-", BBOCB(16,BOF,CBLT,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}},
-{"bgea+", BBOCB(16,BOF,CBLT,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}},
-{"bgea", BBOCB(16,BOF,CBLT,1,0), BBOATCB_MASK, COM, PPCVLE, {CR, BDA}},
-{"bnla-", BBOCB(16,BOF,CBLT,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}},
-{"bnla+", BBOCB(16,BOF,CBLT,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}},
-{"bnla", BBOCB(16,BOF,CBLT,1,0), BBOATCB_MASK, COM, PPCVLE, {CR, BDA}},
-{"bgela-", BBOCB(16,BOF,CBLT,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}},
-{"bgela+", BBOCB(16,BOF,CBLT,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}},
-{"bgela", BBOCB(16,BOF,CBLT,1,1), BBOATCB_MASK, COM, PPCVLE, {CR, BDA}},
-{"bnlla-", BBOCB(16,BOF,CBLT,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}},
-{"bnlla+", BBOCB(16,BOF,CBLT,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}},
-{"bnlla", BBOCB(16,BOF,CBLT,1,1), BBOATCB_MASK, COM, PPCVLE, {CR, BDA}},
-{"ble-", BBOCB(16,BOF,CBGT,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}},
-{"ble+", BBOCB(16,BOF,CBGT,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}},
-{"ble", BBOCB(16,BOF,CBGT,0,0), BBOATCB_MASK, COM, PPCVLE, {CR, BD}},
-{"bng-", BBOCB(16,BOF,CBGT,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}},
-{"bng+", BBOCB(16,BOF,CBGT,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}},
-{"bng", BBOCB(16,BOF,CBGT,0,0), BBOATCB_MASK, COM, PPCVLE, {CR, BD}},
-{"blel-", BBOCB(16,BOF,CBGT,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}},
-{"blel+", BBOCB(16,BOF,CBGT,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}},
-{"blel", BBOCB(16,BOF,CBGT,0,1), BBOATCB_MASK, COM, PPCVLE, {CR, BD}},
-{"bngl-", BBOCB(16,BOF,CBGT,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}},
-{"bngl+", BBOCB(16,BOF,CBGT,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}},
-{"bngl", BBOCB(16,BOF,CBGT,0,1), BBOATCB_MASK, COM, PPCVLE, {CR, BD}},
-{"blea-", BBOCB(16,BOF,CBGT,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}},
-{"blea+", BBOCB(16,BOF,CBGT,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}},
-{"blea", BBOCB(16,BOF,CBGT,1,0), BBOATCB_MASK, COM, PPCVLE, {CR, BDA}},
-{"bnga-", BBOCB(16,BOF,CBGT,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}},
-{"bnga+", BBOCB(16,BOF,CBGT,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}},
-{"bnga", BBOCB(16,BOF,CBGT,1,0), BBOATCB_MASK, COM, PPCVLE, {CR, BDA}},
-{"blela-", BBOCB(16,BOF,CBGT,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}},
-{"blela+", BBOCB(16,BOF,CBGT,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}},
-{"blela", BBOCB(16,BOF,CBGT,1,1), BBOATCB_MASK, COM, PPCVLE, {CR, BDA}},
-{"bngla-", BBOCB(16,BOF,CBGT,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}},
-{"bngla+", BBOCB(16,BOF,CBGT,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}},
-{"bngla", BBOCB(16,BOF,CBGT,1,1), BBOATCB_MASK, COM, PPCVLE, {CR, BDA}},
-{"bne-", BBOCB(16,BOF,CBEQ,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}},
-{"bne+", BBOCB(16,BOF,CBEQ,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}},
-{"bne", BBOCB(16,BOF,CBEQ,0,0), BBOATCB_MASK, COM, PPCVLE, {CR, BD}},
-{"bnel-", BBOCB(16,BOF,CBEQ,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}},
-{"bnel+", BBOCB(16,BOF,CBEQ,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}},
-{"bnel", BBOCB(16,BOF,CBEQ,0,1), BBOATCB_MASK, COM, PPCVLE, {CR, BD}},
-{"bnea-", BBOCB(16,BOF,CBEQ,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}},
-{"bnea+", BBOCB(16,BOF,CBEQ,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}},
-{"bnea", BBOCB(16,BOF,CBEQ,1,0), BBOATCB_MASK, COM, PPCVLE, {CR, BDA}},
-{"bnela-", BBOCB(16,BOF,CBEQ,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}},
-{"bnela+", BBOCB(16,BOF,CBEQ,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}},
-{"bnela", BBOCB(16,BOF,CBEQ,1,1), BBOATCB_MASK, COM, PPCVLE, {CR, BDA}},
-{"bns-", BBOCB(16,BOF,CBSO,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}},
-{"bns+", BBOCB(16,BOF,CBSO,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}},
-{"bns", BBOCB(16,BOF,CBSO,0,0), BBOATCB_MASK, COM, PPCVLE, {CR, BD}},
-{"bnu-", BBOCB(16,BOF,CBSO,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}},
-{"bnu+", BBOCB(16,BOF,CBSO,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}},
-{"bnu", BBOCB(16,BOF,CBSO,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BD}},
-{"bnsl-", BBOCB(16,BOF,CBSO,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}},
-{"bnsl+", BBOCB(16,BOF,CBSO,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}},
-{"bnsl", BBOCB(16,BOF,CBSO,0,1), BBOATCB_MASK, COM, PPCVLE, {CR, BD}},
-{"bnul-", BBOCB(16,BOF,CBSO,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}},
-{"bnul+", BBOCB(16,BOF,CBSO,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}},
-{"bnul", BBOCB(16,BOF,CBSO,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BD}},
-{"bnsa-", BBOCB(16,BOF,CBSO,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}},
-{"bnsa+", BBOCB(16,BOF,CBSO,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}},
-{"bnsa", BBOCB(16,BOF,CBSO,1,0), BBOATCB_MASK, COM, PPCVLE, {CR, BDA}},
-{"bnua-", BBOCB(16,BOF,CBSO,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}},
-{"bnua+", BBOCB(16,BOF,CBSO,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}},
-{"bnua", BBOCB(16,BOF,CBSO,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDA}},
-{"bnsla-", BBOCB(16,BOF,CBSO,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}},
-{"bnsla+", BBOCB(16,BOF,CBSO,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}},
-{"bnsla", BBOCB(16,BOF,CBSO,1,1), BBOATCB_MASK, COM, PPCVLE, {CR, BDA}},
-{"bnula-", BBOCB(16,BOF,CBSO,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}},
-{"bnula+", BBOCB(16,BOF,CBSO,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}},
-{"bnula", BBOCB(16,BOF,CBSO,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDA}},
-
-{"blt-", BBOCB(16,BOT,CBLT,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}},
-{"blt+", BBOCB(16,BOT,CBLT,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}},
-{"blt", BBOCB(16,BOT,CBLT,0,0), BBOATCB_MASK, COM, PPCVLE, {CR, BD}},
-{"bltl-", BBOCB(16,BOT,CBLT,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}},
-{"bltl+", BBOCB(16,BOT,CBLT,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}},
-{"bltl", BBOCB(16,BOT,CBLT,0,1), BBOATCB_MASK, COM, PPCVLE, {CR, BD}},
-{"blta-", BBOCB(16,BOT,CBLT,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}},
-{"blta+", BBOCB(16,BOT,CBLT,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}},
-{"blta", BBOCB(16,BOT,CBLT,1,0), BBOATCB_MASK, COM, PPCVLE, {CR, BDA}},
-{"bltla-", BBOCB(16,BOT,CBLT,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}},
-{"bltla+", BBOCB(16,BOT,CBLT,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}},
-{"bltla", BBOCB(16,BOT,CBLT,1,1), BBOATCB_MASK, COM, PPCVLE, {CR, BDA}},
-{"bgt-", BBOCB(16,BOT,CBGT,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}},
-{"bgt+", BBOCB(16,BOT,CBGT,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}},
-{"bgt", BBOCB(16,BOT,CBGT,0,0), BBOATCB_MASK, COM, PPCVLE, {CR, BD}},
-{"bgtl-", BBOCB(16,BOT,CBGT,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}},
-{"bgtl+", BBOCB(16,BOT,CBGT,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}},
-{"bgtl", BBOCB(16,BOT,CBGT,0,1), BBOATCB_MASK, COM, PPCVLE, {CR, BD}},
-{"bgta-", BBOCB(16,BOT,CBGT,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}},
-{"bgta+", BBOCB(16,BOT,CBGT,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}},
-{"bgta", BBOCB(16,BOT,CBGT,1,0), BBOATCB_MASK, COM, PPCVLE, {CR, BDA}},
-{"bgtla-", BBOCB(16,BOT,CBGT,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}},
-{"bgtla+", BBOCB(16,BOT,CBGT,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}},
-{"bgtla", BBOCB(16,BOT,CBGT,1,1), BBOATCB_MASK, COM, PPCVLE, {CR, BDA}},
-{"beq-", BBOCB(16,BOT,CBEQ,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}},
-{"beq+", BBOCB(16,BOT,CBEQ,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}},
-{"beq", BBOCB(16,BOT,CBEQ,0,0), BBOATCB_MASK, COM, PPCVLE, {CR, BD}},
-{"beql-", BBOCB(16,BOT,CBEQ,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}},
-{"beql+", BBOCB(16,BOT,CBEQ,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}},
-{"beql", BBOCB(16,BOT,CBEQ,0,1), BBOATCB_MASK, COM, PPCVLE, {CR, BD}},
-{"beqa-", BBOCB(16,BOT,CBEQ,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}},
-{"beqa+", BBOCB(16,BOT,CBEQ,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}},
-{"beqa", BBOCB(16,BOT,CBEQ,1,0), BBOATCB_MASK, COM, PPCVLE, {CR, BDA}},
-{"beqla-", BBOCB(16,BOT,CBEQ,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}},
-{"beqla+", BBOCB(16,BOT,CBEQ,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}},
-{"beqla", BBOCB(16,BOT,CBEQ,1,1), BBOATCB_MASK, COM, PPCVLE, {CR, BDA}},
-{"bso-", BBOCB(16,BOT,CBSO,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}},
-{"bso+", BBOCB(16,BOT,CBSO,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}},
-{"bso", BBOCB(16,BOT,CBSO,0,0), BBOATCB_MASK, COM, PPCVLE, {CR, BD}},
-{"bun-", BBOCB(16,BOT,CBSO,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}},
-{"bun+", BBOCB(16,BOT,CBSO,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}},
-{"bun", BBOCB(16,BOT,CBSO,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BD}},
-{"bsol-", BBOCB(16,BOT,CBSO,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}},
-{"bsol+", BBOCB(16,BOT,CBSO,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}},
-{"bsol", BBOCB(16,BOT,CBSO,0,1), BBOATCB_MASK, COM, PPCVLE, {CR, BD}},
-{"bunl-", BBOCB(16,BOT,CBSO,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}},
-{"bunl+", BBOCB(16,BOT,CBSO,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}},
-{"bunl", BBOCB(16,BOT,CBSO,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BD}},
-{"bsoa-", BBOCB(16,BOT,CBSO,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}},
-{"bsoa+", BBOCB(16,BOT,CBSO,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}},
-{"bsoa", BBOCB(16,BOT,CBSO,1,0), BBOATCB_MASK, COM, PPCVLE, {CR, BDA}},
-{"buna-", BBOCB(16,BOT,CBSO,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}},
-{"buna+", BBOCB(16,BOT,CBSO,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}},
-{"buna", BBOCB(16,BOT,CBSO,1,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDA}},
-{"bsola-", BBOCB(16,BOT,CBSO,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}},
-{"bsola+", BBOCB(16,BOT,CBSO,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}},
-{"bsola", BBOCB(16,BOT,CBSO,1,1), BBOATCB_MASK, COM, PPCVLE, {CR, BDA}},
-{"bunla-", BBOCB(16,BOT,CBSO,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDMA}},
-{"bunla+", BBOCB(16,BOT,CBSO,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDPA}},
-{"bunla", BBOCB(16,BOT,CBSO,1,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDA}},
-
-{"bdnzf-", BBO(16,BODNZF,0,0), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDM}},
-{"bdnzf+", BBO(16,BODNZF,0,0), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDP}},
-{"bdnzf", BBO(16,BODNZF,0,0), BBOY_MASK, PPCCOM, PPCVLE, {BI, BD}},
-{"bdnzfl-", BBO(16,BODNZF,0,1), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDM}},
-{"bdnzfl+", BBO(16,BODNZF,0,1), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDP}},
-{"bdnzfl", BBO(16,BODNZF,0,1), BBOY_MASK, PPCCOM, PPCVLE, {BI, BD}},
-{"bdnzfa-", BBO(16,BODNZF,1,0), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDMA}},
-{"bdnzfa+", BBO(16,BODNZF,1,0), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDPA}},
-{"bdnzfa", BBO(16,BODNZF,1,0), BBOY_MASK, PPCCOM, PPCVLE, {BI, BDA}},
-{"bdnzfla-", BBO(16,BODNZF,1,1), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDMA}},
-{"bdnzfla+", BBO(16,BODNZF,1,1), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDPA}},
-{"bdnzfla", BBO(16,BODNZF,1,1), BBOY_MASK, PPCCOM, PPCVLE, {BI, BDA}},
-{"bdzf-", BBO(16,BODZF,0,0), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDM}},
-{"bdzf+", BBO(16,BODZF,0,0), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDP}},
-{"bdzf", BBO(16,BODZF,0,0), BBOY_MASK, PPCCOM, PPCVLE, {BI, BD}},
-{"bdzfl-", BBO(16,BODZF,0,1), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDM}},
-{"bdzfl+", BBO(16,BODZF,0,1), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDP}},
-{"bdzfl", BBO(16,BODZF,0,1), BBOY_MASK, PPCCOM, PPCVLE, {BI, BD}},
-{"bdzfa-", BBO(16,BODZF,1,0), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDMA}},
-{"bdzfa+", BBO(16,BODZF,1,0), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDPA}},
-{"bdzfa", BBO(16,BODZF,1,0), BBOY_MASK, PPCCOM, PPCVLE, {BI, BDA}},
-{"bdzfla-", BBO(16,BODZF,1,1), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDMA}},
-{"bdzfla+", BBO(16,BODZF,1,1), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDPA}},
-{"bdzfla", BBO(16,BODZF,1,1), BBOY_MASK, PPCCOM, PPCVLE, {BI, BDA}},
-
-{"bf-", BBO(16,BOF,0,0), BBOAT_MASK, PPCCOM, PPCVLE, {BI, BDM}},
-{"bf+", BBO(16,BOF,0,0), BBOAT_MASK, PPCCOM, PPCVLE, {BI, BDP}},
-{"bf", BBO(16,BOF,0,0), BBOAT_MASK, PPCCOM, PPCVLE, {BI, BD}},
-{"bbf", BBO(16,BOF,0,0), BBOAT_MASK, PWRCOM, PPCVLE, {BI, BD}},
-{"bfl-", BBO(16,BOF,0,1), BBOAT_MASK, PPCCOM, PPCVLE, {BI, BDM}},
-{"bfl+", BBO(16,BOF,0,1), BBOAT_MASK, PPCCOM, PPCVLE, {BI, BDP}},
-{"bfl", BBO(16,BOF,0,1), BBOAT_MASK, PPCCOM, PPCVLE, {BI, BD}},
-{"bbfl", BBO(16,BOF,0,1), BBOAT_MASK, PWRCOM, PPCVLE, {BI, BD}},
-{"bfa-", BBO(16,BOF,1,0), BBOAT_MASK, PPCCOM, PPCVLE, {BI, BDMA}},
-{"bfa+", BBO(16,BOF,1,0), BBOAT_MASK, PPCCOM, PPCVLE, {BI, BDPA}},
-{"bfa", BBO(16,BOF,1,0), BBOAT_MASK, PPCCOM, PPCVLE, {BI, BDA}},
-{"bbfa", BBO(16,BOF,1,0), BBOAT_MASK, PWRCOM, PPCVLE, {BI, BDA}},
-{"bfla-", BBO(16,BOF,1,1), BBOAT_MASK, PPCCOM, PPCVLE, {BI, BDMA}},
-{"bfla+", BBO(16,BOF,1,1), BBOAT_MASK, PPCCOM, PPCVLE, {BI, BDPA}},
-{"bfla", BBO(16,BOF,1,1), BBOAT_MASK, PPCCOM, PPCVLE, {BI, BDA}},
-{"bbfla", BBO(16,BOF,1,1), BBOAT_MASK, PWRCOM, PPCVLE, {BI, BDA}},
-
-{"bdnzt-", BBO(16,BODNZT,0,0), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDM}},
-{"bdnzt+", BBO(16,BODNZT,0,0), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDP}},
-{"bdnzt", BBO(16,BODNZT,0,0), BBOY_MASK, PPCCOM, PPCVLE, {BI, BD}},
-{"bdnztl-", BBO(16,BODNZT,0,1), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDM}},
-{"bdnztl+", BBO(16,BODNZT,0,1), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDP}},
-{"bdnztl", BBO(16,BODNZT,0,1), BBOY_MASK, PPCCOM, PPCVLE, {BI, BD}},
-{"bdnzta-", BBO(16,BODNZT,1,0), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDMA}},
-{"bdnzta+", BBO(16,BODNZT,1,0), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDPA}},
-{"bdnzta", BBO(16,BODNZT,1,0), BBOY_MASK, PPCCOM, PPCVLE, {BI, BDA}},
-{"bdnztla-", BBO(16,BODNZT,1,1), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDMA}},
-{"bdnztla+", BBO(16,BODNZT,1,1), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDPA}},
-{"bdnztla", BBO(16,BODNZT,1,1), BBOY_MASK, PPCCOM, PPCVLE, {BI, BDA}},
-{"bdzt-", BBO(16,BODZT,0,0), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDM}},
-{"bdzt+", BBO(16,BODZT,0,0), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDP}},
-{"bdzt", BBO(16,BODZT,0,0), BBOY_MASK, PPCCOM, PPCVLE, {BI, BD}},
-{"bdztl-", BBO(16,BODZT,0,1), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDM}},
-{"bdztl+", BBO(16,BODZT,0,1), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDP}},
-{"bdztl", BBO(16,BODZT,0,1), BBOY_MASK, PPCCOM, PPCVLE, {BI, BD}},
-{"bdzta-", BBO(16,BODZT,1,0), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDMA}},
-{"bdzta+", BBO(16,BODZT,1,0), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDPA}},
-{"bdzta", BBO(16,BODZT,1,0), BBOY_MASK, PPCCOM, PPCVLE, {BI, BDA}},
-{"bdztla-", BBO(16,BODZT,1,1), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDMA}},
-{"bdztla+", BBO(16,BODZT,1,1), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BDPA}},
-{"bdztla", BBO(16,BODZT,1,1), BBOY_MASK, PPCCOM, PPCVLE, {BI, BDA}},
-
-{"bt-", BBO(16,BOT,0,0), BBOAT_MASK, PPCCOM, PPCVLE, {BI, BDM}},
-{"bt+", BBO(16,BOT,0,0), BBOAT_MASK, PPCCOM, PPCVLE, {BI, BDP}},
-{"bt", BBO(16,BOT,0,0), BBOAT_MASK, PPCCOM, PPCVLE, {BI, BD}},
-{"bbt", BBO(16,BOT,0,0), BBOAT_MASK, PWRCOM, PPCVLE, {BI, BD}},
-{"btl-", BBO(16,BOT,0,1), BBOAT_MASK, PPCCOM, PPCVLE, {BI, BDM}},
-{"btl+", BBO(16,BOT,0,1), BBOAT_MASK, PPCCOM, PPCVLE, {BI, BDP}},
-{"btl", BBO(16,BOT,0,1), BBOAT_MASK, PPCCOM, PPCVLE, {BI, BD}},
-{"bbtl", BBO(16,BOT,0,1), BBOAT_MASK, PWRCOM, PPCVLE, {BI, BD}},
-{"bta-", BBO(16,BOT,1,0), BBOAT_MASK, PPCCOM, PPCVLE, {BI, BDMA}},
-{"bta+", BBO(16,BOT,1,0), BBOAT_MASK, PPCCOM, PPCVLE, {BI, BDPA}},
-{"bta", BBO(16,BOT,1,0), BBOAT_MASK, PPCCOM, PPCVLE, {BI, BDA}},
-{"bbta", BBO(16,BOT,1,0), BBOAT_MASK, PWRCOM, PPCVLE, {BI, BDA}},
-{"btla-", BBO(16,BOT,1,1), BBOAT_MASK, PPCCOM, PPCVLE, {BI, BDMA}},
-{"btla+", BBO(16,BOT,1,1), BBOAT_MASK, PPCCOM, PPCVLE, {BI, BDPA}},
-{"btla", BBO(16,BOT,1,1), BBOAT_MASK, PPCCOM, PPCVLE, {BI, BDA}},
-{"bbtla", BBO(16,BOT,1,1), BBOAT_MASK, PWRCOM, PPCVLE, {BI, BDA}},
-
-{"bc-", B(16,0,0), B_MASK, PPCCOM, PPCVLE, {BOM, BI, BDM}},
-{"bc+", B(16,0,0), B_MASK, PPCCOM, PPCVLE, {BOP, BI, BDP}},
+{"subis", OP(15), OP_MASK, PPCCOM, PPCVLE|EXT, {RT, RA0, NSISIGNOPT}},
+
+{"bdnz-", BBO(16,BODNZ,0,0), BBOATBI_MASK, PPCCOM, PPCVLE|EXT, {BDM}},
+{"bdnz+", BBO(16,BODNZ,0,0), BBOATBI_MASK, PPCCOM, PPCVLE|EXT, {BDP}},
+{"bdnz", BBO(16,BODNZ,0,0), BBOATBI_MASK, PPCCOM, PPCVLE|EXT, {BD}},
+{"bdn", BBO(16,BODNZ,0,0), BBOATBI_MASK, PWRCOM, PPCVLE|EXT, {BD}},
+{"bdnzl-", BBO(16,BODNZ,0,1), BBOATBI_MASK, PPCCOM, PPCVLE|EXT, {BDM}},
+{"bdnzl+", BBO(16,BODNZ,0,1), BBOATBI_MASK, PPCCOM, PPCVLE|EXT, {BDP}},
+{"bdnzl", BBO(16,BODNZ,0,1), BBOATBI_MASK, PPCCOM, PPCVLE|EXT, {BD}},
+{"bdnl", BBO(16,BODNZ,0,1), BBOATBI_MASK, PWRCOM, PPCVLE|EXT, {BD}},
+{"bdnza-", BBO(16,BODNZ,1,0), BBOATBI_MASK, PPCCOM, PPCVLE|EXT, {BDMA}},
+{"bdnza+", BBO(16,BODNZ,1,0), BBOATBI_MASK, PPCCOM, PPCVLE|EXT, {BDPA}},
+{"bdnza", BBO(16,BODNZ,1,0), BBOATBI_MASK, PPCCOM, PPCVLE|EXT, {BDA}},
+{"bdna", BBO(16,BODNZ,1,0), BBOATBI_MASK, PWRCOM, PPCVLE|EXT, {BDA}},
+{"bdnzla-", BBO(16,BODNZ,1,1), BBOATBI_MASK, PPCCOM, PPCVLE|EXT, {BDMA}},
+{"bdnzla+", BBO(16,BODNZ,1,1), BBOATBI_MASK, PPCCOM, PPCVLE|EXT, {BDPA}},
+{"bdnzla", BBO(16,BODNZ,1,1), BBOATBI_MASK, PPCCOM, PPCVLE|EXT, {BDA}},
+{"bdnla", BBO(16,BODNZ,1,1), BBOATBI_MASK, PWRCOM, PPCVLE|EXT, {BDA}},
+{"bdz-", BBO(16,BODZ,0,0), BBOATBI_MASK, PPCCOM, PPCVLE|EXT, {BDM}},
+{"bdz+", BBO(16,BODZ,0,0), BBOATBI_MASK, PPCCOM, PPCVLE|EXT, {BDP}},
+{"bdz", BBO(16,BODZ,0,0), BBOATBI_MASK, COM, PPCVLE|EXT, {BD}},
+{"bdzl-", BBO(16,BODZ,0,1), BBOATBI_MASK, PPCCOM, PPCVLE|EXT, {BDM}},
+{"bdzl+", BBO(16,BODZ,0,1), BBOATBI_MASK, PPCCOM, PPCVLE|EXT, {BDP}},
+{"bdzl", BBO(16,BODZ,0,1), BBOATBI_MASK, COM, PPCVLE|EXT, {BD}},
+{"bdza-", BBO(16,BODZ,1,0), BBOATBI_MASK, PPCCOM, PPCVLE|EXT, {BDMA}},
+{"bdza+", BBO(16,BODZ,1,0), BBOATBI_MASK, PPCCOM, PPCVLE|EXT, {BDPA}},
+{"bdza", BBO(16,BODZ,1,0), BBOATBI_MASK, COM, PPCVLE|EXT, {BDA}},
+{"bdzla-", BBO(16,BODZ,1,1), BBOATBI_MASK, PPCCOM, PPCVLE|EXT, {BDMA}},
+{"bdzla+", BBO(16,BODZ,1,1), BBOATBI_MASK, PPCCOM, PPCVLE|EXT, {BDPA}},
+{"bdzla", BBO(16,BODZ,1,1), BBOATBI_MASK, COM, PPCVLE|EXT, {BDA}},
+
+{"bge-", BBOCB(16,BOF,CBLT,0,0), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDM}},
+{"bge+", BBOCB(16,BOF,CBLT,0,0), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDP}},
+{"bge", BBOCB(16,BOF,CBLT,0,0), BBOATCB_MASK, COM, PPCVLE|EXT, {CR, BD}},
+{"bnl-", BBOCB(16,BOF,CBLT,0,0), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDM}},
+{"bnl+", BBOCB(16,BOF,CBLT,0,0), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDP}},
+{"bnl", BBOCB(16,BOF,CBLT,0,0), BBOATCB_MASK, COM, PPCVLE|EXT, {CR, BD}},
+{"bgel-", BBOCB(16,BOF,CBLT,0,1), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDM}},
+{"bgel+", BBOCB(16,BOF,CBLT,0,1), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDP}},
+{"bgel", BBOCB(16,BOF,CBLT,0,1), BBOATCB_MASK, COM, PPCVLE|EXT, {CR, BD}},
+{"bnll-", BBOCB(16,BOF,CBLT,0,1), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDM}},
+{"bnll+", BBOCB(16,BOF,CBLT,0,1), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDP}},
+{"bnll", BBOCB(16,BOF,CBLT,0,1), BBOATCB_MASK, COM, PPCVLE|EXT, {CR, BD}},
+{"bgea-", BBOCB(16,BOF,CBLT,1,0), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDMA}},
+{"bgea+", BBOCB(16,BOF,CBLT,1,0), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDPA}},
+{"bgea", BBOCB(16,BOF,CBLT,1,0), BBOATCB_MASK, COM, PPCVLE|EXT, {CR, BDA}},
+{"bnla-", BBOCB(16,BOF,CBLT,1,0), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDMA}},
+{"bnla+", BBOCB(16,BOF,CBLT,1,0), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDPA}},
+{"bnla", BBOCB(16,BOF,CBLT,1,0), BBOATCB_MASK, COM, PPCVLE|EXT, {CR, BDA}},
+{"bgela-", BBOCB(16,BOF,CBLT,1,1), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDMA}},
+{"bgela+", BBOCB(16,BOF,CBLT,1,1), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDPA}},
+{"bgela", BBOCB(16,BOF,CBLT,1,1), BBOATCB_MASK, COM, PPCVLE|EXT, {CR, BDA}},
+{"bnlla-", BBOCB(16,BOF,CBLT,1,1), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDMA}},
+{"bnlla+", BBOCB(16,BOF,CBLT,1,1), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDPA}},
+{"bnlla", BBOCB(16,BOF,CBLT,1,1), BBOATCB_MASK, COM, PPCVLE|EXT, {CR, BDA}},
+{"ble-", BBOCB(16,BOF,CBGT,0,0), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDM}},
+{"ble+", BBOCB(16,BOF,CBGT,0,0), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDP}},
+{"ble", BBOCB(16,BOF,CBGT,0,0), BBOATCB_MASK, COM, PPCVLE|EXT, {CR, BD}},
+{"bng-", BBOCB(16,BOF,CBGT,0,0), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDM}},
+{"bng+", BBOCB(16,BOF,CBGT,0,0), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDP}},
+{"bng", BBOCB(16,BOF,CBGT,0,0), BBOATCB_MASK, COM, PPCVLE|EXT, {CR, BD}},
+{"blel-", BBOCB(16,BOF,CBGT,0,1), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDM}},
+{"blel+", BBOCB(16,BOF,CBGT,0,1), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDP}},
+{"blel", BBOCB(16,BOF,CBGT,0,1), BBOATCB_MASK, COM, PPCVLE|EXT, {CR, BD}},
+{"bngl-", BBOCB(16,BOF,CBGT,0,1), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDM}},
+{"bngl+", BBOCB(16,BOF,CBGT,0,1), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDP}},
+{"bngl", BBOCB(16,BOF,CBGT,0,1), BBOATCB_MASK, COM, PPCVLE|EXT, {CR, BD}},
+{"blea-", BBOCB(16,BOF,CBGT,1,0), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDMA}},
+{"blea+", BBOCB(16,BOF,CBGT,1,0), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDPA}},
+{"blea", BBOCB(16,BOF,CBGT,1,0), BBOATCB_MASK, COM, PPCVLE|EXT, {CR, BDA}},
+{"bnga-", BBOCB(16,BOF,CBGT,1,0), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDMA}},
+{"bnga+", BBOCB(16,BOF,CBGT,1,0), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDPA}},
+{"bnga", BBOCB(16,BOF,CBGT,1,0), BBOATCB_MASK, COM, PPCVLE|EXT, {CR, BDA}},
+{"blela-", BBOCB(16,BOF,CBGT,1,1), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDMA}},
+{"blela+", BBOCB(16,BOF,CBGT,1,1), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDPA}},
+{"blela", BBOCB(16,BOF,CBGT,1,1), BBOATCB_MASK, COM, PPCVLE|EXT, {CR, BDA}},
+{"bngla-", BBOCB(16,BOF,CBGT,1,1), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDMA}},
+{"bngla+", BBOCB(16,BOF,CBGT,1,1), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDPA}},
+{"bngla", BBOCB(16,BOF,CBGT,1,1), BBOATCB_MASK, COM, PPCVLE|EXT, {CR, BDA}},
+{"bne-", BBOCB(16,BOF,CBEQ,0,0), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDM}},
+{"bne+", BBOCB(16,BOF,CBEQ,0,0), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDP}},
+{"bne", BBOCB(16,BOF,CBEQ,0,0), BBOATCB_MASK, COM, PPCVLE|EXT, {CR, BD}},
+{"bnel-", BBOCB(16,BOF,CBEQ,0,1), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDM}},
+{"bnel+", BBOCB(16,BOF,CBEQ,0,1), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDP}},
+{"bnel", BBOCB(16,BOF,CBEQ,0,1), BBOATCB_MASK, COM, PPCVLE|EXT, {CR, BD}},
+{"bnea-", BBOCB(16,BOF,CBEQ,1,0), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDMA}},
+{"bnea+", BBOCB(16,BOF,CBEQ,1,0), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDPA}},
+{"bnea", BBOCB(16,BOF,CBEQ,1,0), BBOATCB_MASK, COM, PPCVLE|EXT, {CR, BDA}},
+{"bnela-", BBOCB(16,BOF,CBEQ,1,1), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDMA}},
+{"bnela+", BBOCB(16,BOF,CBEQ,1,1), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDPA}},
+{"bnela", BBOCB(16,BOF,CBEQ,1,1), BBOATCB_MASK, COM, PPCVLE|EXT, {CR, BDA}},
+{"bns-", BBOCB(16,BOF,CBSO,0,0), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDM}},
+{"bns+", BBOCB(16,BOF,CBSO,0,0), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDP}},
+{"bns", BBOCB(16,BOF,CBSO,0,0), BBOATCB_MASK, COM, PPCVLE|EXT, {CR, BD}},
+{"bnu-", BBOCB(16,BOF,CBSO,0,0), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDM}},
+{"bnu+", BBOCB(16,BOF,CBSO,0,0), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDP}},
+{"bnu", BBOCB(16,BOF,CBSO,0,0), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BD}},
+{"bnsl-", BBOCB(16,BOF,CBSO,0,1), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDM}},
+{"bnsl+", BBOCB(16,BOF,CBSO,0,1), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDP}},
+{"bnsl", BBOCB(16,BOF,CBSO,0,1), BBOATCB_MASK, COM, PPCVLE|EXT, {CR, BD}},
+{"bnul-", BBOCB(16,BOF,CBSO,0,1), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDM}},
+{"bnul+", BBOCB(16,BOF,CBSO,0,1), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDP}},
+{"bnul", BBOCB(16,BOF,CBSO,0,1), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BD}},
+{"bnsa-", BBOCB(16,BOF,CBSO,1,0), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDMA}},
+{"bnsa+", BBOCB(16,BOF,CBSO,1,0), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDPA}},
+{"bnsa", BBOCB(16,BOF,CBSO,1,0), BBOATCB_MASK, COM, PPCVLE|EXT, {CR, BDA}},
+{"bnua-", BBOCB(16,BOF,CBSO,1,0), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDMA}},
+{"bnua+", BBOCB(16,BOF,CBSO,1,0), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDPA}},
+{"bnua", BBOCB(16,BOF,CBSO,1,0), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDA}},
+{"bnsla-", BBOCB(16,BOF,CBSO,1,1), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDMA}},
+{"bnsla+", BBOCB(16,BOF,CBSO,1,1), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDPA}},
+{"bnsla", BBOCB(16,BOF,CBSO,1,1), BBOATCB_MASK, COM, PPCVLE|EXT, {CR, BDA}},
+{"bnula-", BBOCB(16,BOF,CBSO,1,1), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDMA}},
+{"bnula+", BBOCB(16,BOF,CBSO,1,1), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDPA}},
+{"bnula", BBOCB(16,BOF,CBSO,1,1), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDA}},
+
+{"blt-", BBOCB(16,BOT,CBLT,0,0), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDM}},
+{"blt+", BBOCB(16,BOT,CBLT,0,0), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDP}},
+{"blt", BBOCB(16,BOT,CBLT,0,0), BBOATCB_MASK, COM, PPCVLE|EXT, {CR, BD}},
+{"bltl-", BBOCB(16,BOT,CBLT,0,1), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDM}},
+{"bltl+", BBOCB(16,BOT,CBLT,0,1), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDP}},
+{"bltl", BBOCB(16,BOT,CBLT,0,1), BBOATCB_MASK, COM, PPCVLE|EXT, {CR, BD}},
+{"blta-", BBOCB(16,BOT,CBLT,1,0), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDMA}},
+{"blta+", BBOCB(16,BOT,CBLT,1,0), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDPA}},
+{"blta", BBOCB(16,BOT,CBLT,1,0), BBOATCB_MASK, COM, PPCVLE|EXT, {CR, BDA}},
+{"bltla-", BBOCB(16,BOT,CBLT,1,1), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDMA}},
+{"bltla+", BBOCB(16,BOT,CBLT,1,1), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDPA}},
+{"bltla", BBOCB(16,BOT,CBLT,1,1), BBOATCB_MASK, COM, PPCVLE|EXT, {CR, BDA}},
+{"bgt-", BBOCB(16,BOT,CBGT,0,0), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDM}},
+{"bgt+", BBOCB(16,BOT,CBGT,0,0), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDP}},
+{"bgt", BBOCB(16,BOT,CBGT,0,0), BBOATCB_MASK, COM, PPCVLE|EXT, {CR, BD}},
+{"bgtl-", BBOCB(16,BOT,CBGT,0,1), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDM}},
+{"bgtl+", BBOCB(16,BOT,CBGT,0,1), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDP}},
+{"bgtl", BBOCB(16,BOT,CBGT,0,1), BBOATCB_MASK, COM, PPCVLE|EXT, {CR, BD}},
+{"bgta-", BBOCB(16,BOT,CBGT,1,0), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDMA}},
+{"bgta+", BBOCB(16,BOT,CBGT,1,0), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDPA}},
+{"bgta", BBOCB(16,BOT,CBGT,1,0), BBOATCB_MASK, COM, PPCVLE|EXT, {CR, BDA}},
+{"bgtla-", BBOCB(16,BOT,CBGT,1,1), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDMA}},
+{"bgtla+", BBOCB(16,BOT,CBGT,1,1), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDPA}},
+{"bgtla", BBOCB(16,BOT,CBGT,1,1), BBOATCB_MASK, COM, PPCVLE|EXT, {CR, BDA}},
+{"beq-", BBOCB(16,BOT,CBEQ,0,0), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDM}},
+{"beq+", BBOCB(16,BOT,CBEQ,0,0), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDP}},
+{"beq", BBOCB(16,BOT,CBEQ,0,0), BBOATCB_MASK, COM, PPCVLE|EXT, {CR, BD}},
+{"beql-", BBOCB(16,BOT,CBEQ,0,1), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDM}},
+{"beql+", BBOCB(16,BOT,CBEQ,0,1), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDP}},
+{"beql", BBOCB(16,BOT,CBEQ,0,1), BBOATCB_MASK, COM, PPCVLE|EXT, {CR, BD}},
+{"beqa-", BBOCB(16,BOT,CBEQ,1,0), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDMA}},
+{"beqa+", BBOCB(16,BOT,CBEQ,1,0), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDPA}},
+{"beqa", BBOCB(16,BOT,CBEQ,1,0), BBOATCB_MASK, COM, PPCVLE|EXT, {CR, BDA}},
+{"beqla-", BBOCB(16,BOT,CBEQ,1,1), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDMA}},
+{"beqla+", BBOCB(16,BOT,CBEQ,1,1), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDPA}},
+{"beqla", BBOCB(16,BOT,CBEQ,1,1), BBOATCB_MASK, COM, PPCVLE|EXT, {CR, BDA}},
+{"bso-", BBOCB(16,BOT,CBSO,0,0), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDM}},
+{"bso+", BBOCB(16,BOT,CBSO,0,0), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDP}},
+{"bso", BBOCB(16,BOT,CBSO,0,0), BBOATCB_MASK, COM, PPCVLE|EXT, {CR, BD}},
+{"bun-", BBOCB(16,BOT,CBSO,0,0), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDM}},
+{"bun+", BBOCB(16,BOT,CBSO,0,0), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDP}},
+{"bun", BBOCB(16,BOT,CBSO,0,0), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BD}},
+{"bsol-", BBOCB(16,BOT,CBSO,0,1), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDM}},
+{"bsol+", BBOCB(16,BOT,CBSO,0,1), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDP}},
+{"bsol", BBOCB(16,BOT,CBSO,0,1), BBOATCB_MASK, COM, PPCVLE|EXT, {CR, BD}},
+{"bunl-", BBOCB(16,BOT,CBSO,0,1), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDM}},
+{"bunl+", BBOCB(16,BOT,CBSO,0,1), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDP}},
+{"bunl", BBOCB(16,BOT,CBSO,0,1), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BD}},
+{"bsoa-", BBOCB(16,BOT,CBSO,1,0), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDMA}},
+{"bsoa+", BBOCB(16,BOT,CBSO,1,0), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDPA}},
+{"bsoa", BBOCB(16,BOT,CBSO,1,0), BBOATCB_MASK, COM, PPCVLE|EXT, {CR, BDA}},
+{"buna-", BBOCB(16,BOT,CBSO,1,0), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDMA}},
+{"buna+", BBOCB(16,BOT,CBSO,1,0), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDPA}},
+{"buna", BBOCB(16,BOT,CBSO,1,0), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDA}},
+{"bsola-", BBOCB(16,BOT,CBSO,1,1), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDMA}},
+{"bsola+", BBOCB(16,BOT,CBSO,1,1), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDPA}},
+{"bsola", BBOCB(16,BOT,CBSO,1,1), BBOATCB_MASK, COM, PPCVLE|EXT, {CR, BDA}},
+{"bunla-", BBOCB(16,BOT,CBSO,1,1), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDMA}},
+{"bunla+", BBOCB(16,BOT,CBSO,1,1), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDPA}},
+{"bunla", BBOCB(16,BOT,CBSO,1,1), BBOATCB_MASK, PPCCOM, PPCVLE|EXT, {CR, BDA}},
+
+{"bdnzf-", BBO(16,BODNZF,0,0), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {BI, BDM}},
+{"bdnzf+", BBO(16,BODNZF,0,0), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {BI, BDP}},
+{"bdnzf", BBO(16,BODNZF,0,0), BBOY_MASK, PPCCOM, PPCVLE|EXT, {BI, BD}},
+{"bdnzfl-", BBO(16,BODNZF,0,1), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {BI, BDM}},
+{"bdnzfl+", BBO(16,BODNZF,0,1), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {BI, BDP}},
+{"bdnzfl", BBO(16,BODNZF,0,1), BBOY_MASK, PPCCOM, PPCVLE|EXT, {BI, BD}},
+{"bdnzfa-", BBO(16,BODNZF,1,0), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {BI, BDMA}},
+{"bdnzfa+", BBO(16,BODNZF,1,0), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {BI, BDPA}},
+{"bdnzfa", BBO(16,BODNZF,1,0), BBOY_MASK, PPCCOM, PPCVLE|EXT, {BI, BDA}},
+{"bdnzfla-", BBO(16,BODNZF,1,1), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {BI, BDMA}},
+{"bdnzfla+", BBO(16,BODNZF,1,1), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {BI, BDPA}},
+{"bdnzfla", BBO(16,BODNZF,1,1), BBOY_MASK, PPCCOM, PPCVLE|EXT, {BI, BDA}},
+{"bdzf-", BBO(16,BODZF,0,0), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {BI, BDM}},
+{"bdzf+", BBO(16,BODZF,0,0), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {BI, BDP}},
+{"bdzf", BBO(16,BODZF,0,0), BBOY_MASK, PPCCOM, PPCVLE|EXT, {BI, BD}},
+{"bdzfl-", BBO(16,BODZF,0,1), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {BI, BDM}},
+{"bdzfl+", BBO(16,BODZF,0,1), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {BI, BDP}},
+{"bdzfl", BBO(16,BODZF,0,1), BBOY_MASK, PPCCOM, PPCVLE|EXT, {BI, BD}},
+{"bdzfa-", BBO(16,BODZF,1,0), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {BI, BDMA}},
+{"bdzfa+", BBO(16,BODZF,1,0), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {BI, BDPA}},
+{"bdzfa", BBO(16,BODZF,1,0), BBOY_MASK, PPCCOM, PPCVLE|EXT, {BI, BDA}},
+{"bdzfla-", BBO(16,BODZF,1,1), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {BI, BDMA}},
+{"bdzfla+", BBO(16,BODZF,1,1), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {BI, BDPA}},
+{"bdzfla", BBO(16,BODZF,1,1), BBOY_MASK, PPCCOM, PPCVLE|EXT, {BI, BDA}},
+
+{"bf-", BBO(16,BOF,0,0), BBOAT_MASK, PPCCOM, PPCVLE|EXT, {BI, BDM}},
+{"bf+", BBO(16,BOF,0,0), BBOAT_MASK, PPCCOM, PPCVLE|EXT, {BI, BDP}},
+{"bf", BBO(16,BOF,0,0), BBOAT_MASK, PPCCOM, PPCVLE|EXT, {BI, BD}},
+{"bbf", BBO(16,BOF,0,0), BBOAT_MASK, PWRCOM, PPCVLE|EXT, {BI, BD}},
+{"bfl-", BBO(16,BOF,0,1), BBOAT_MASK, PPCCOM, PPCVLE|EXT, {BI, BDM}},
+{"bfl+", BBO(16,BOF,0,1), BBOAT_MASK, PPCCOM, PPCVLE|EXT, {BI, BDP}},
+{"bfl", BBO(16,BOF,0,1), BBOAT_MASK, PPCCOM, PPCVLE|EXT, {BI, BD}},
+{"bbfl", BBO(16,BOF,0,1), BBOAT_MASK, PWRCOM, PPCVLE|EXT, {BI, BD}},
+{"bfa-", BBO(16,BOF,1,0), BBOAT_MASK, PPCCOM, PPCVLE|EXT, {BI, BDMA}},
+{"bfa+", BBO(16,BOF,1,0), BBOAT_MASK, PPCCOM, PPCVLE|EXT, {BI, BDPA}},
+{"bfa", BBO(16,BOF,1,0), BBOAT_MASK, PPCCOM, PPCVLE|EXT, {BI, BDA}},
+{"bbfa", BBO(16,BOF,1,0), BBOAT_MASK, PWRCOM, PPCVLE|EXT, {BI, BDA}},
+{"bfla-", BBO(16,BOF,1,1), BBOAT_MASK, PPCCOM, PPCVLE|EXT, {BI, BDMA}},
+{"bfla+", BBO(16,BOF,1,1), BBOAT_MASK, PPCCOM, PPCVLE|EXT, {BI, BDPA}},
+{"bfla", BBO(16,BOF,1,1), BBOAT_MASK, PPCCOM, PPCVLE|EXT, {BI, BDA}},
+{"bbfla", BBO(16,BOF,1,1), BBOAT_MASK, PWRCOM, PPCVLE|EXT, {BI, BDA}},
+
+{"bdnzt-", BBO(16,BODNZT,0,0), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {BI, BDM}},
+{"bdnzt+", BBO(16,BODNZT,0,0), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {BI, BDP}},
+{"bdnzt", BBO(16,BODNZT,0,0), BBOY_MASK, PPCCOM, PPCVLE|EXT, {BI, BD}},
+{"bdnztl-", BBO(16,BODNZT,0,1), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {BI, BDM}},
+{"bdnztl+", BBO(16,BODNZT,0,1), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {BI, BDP}},
+{"bdnztl", BBO(16,BODNZT,0,1), BBOY_MASK, PPCCOM, PPCVLE|EXT, {BI, BD}},
+{"bdnzta-", BBO(16,BODNZT,1,0), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {BI, BDMA}},
+{"bdnzta+", BBO(16,BODNZT,1,0), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {BI, BDPA}},
+{"bdnzta", BBO(16,BODNZT,1,0), BBOY_MASK, PPCCOM, PPCVLE|EXT, {BI, BDA}},
+{"bdnztla-", BBO(16,BODNZT,1,1), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {BI, BDMA}},
+{"bdnztla+", BBO(16,BODNZT,1,1), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {BI, BDPA}},
+{"bdnztla", BBO(16,BODNZT,1,1), BBOY_MASK, PPCCOM, PPCVLE|EXT, {BI, BDA}},
+{"bdzt-", BBO(16,BODZT,0,0), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {BI, BDM}},
+{"bdzt+", BBO(16,BODZT,0,0), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {BI, BDP}},
+{"bdzt", BBO(16,BODZT,0,0), BBOY_MASK, PPCCOM, PPCVLE|EXT, {BI, BD}},
+{"bdztl-", BBO(16,BODZT,0,1), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {BI, BDM}},
+{"bdztl+", BBO(16,BODZT,0,1), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {BI, BDP}},
+{"bdztl", BBO(16,BODZT,0,1), BBOY_MASK, PPCCOM, PPCVLE|EXT, {BI, BD}},
+{"bdzta-", BBO(16,BODZT,1,0), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {BI, BDMA}},
+{"bdzta+", BBO(16,BODZT,1,0), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {BI, BDPA}},
+{"bdzta", BBO(16,BODZT,1,0), BBOY_MASK, PPCCOM, PPCVLE|EXT, {BI, BDA}},
+{"bdztla-", BBO(16,BODZT,1,1), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {BI, BDMA}},
+{"bdztla+", BBO(16,BODZT,1,1), BBOY_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {BI, BDPA}},
+{"bdztla", BBO(16,BODZT,1,1), BBOY_MASK, PPCCOM, PPCVLE|EXT, {BI, BDA}},
+
+{"bt-", BBO(16,BOT,0,0), BBOAT_MASK, PPCCOM, PPCVLE|EXT, {BI, BDM}},
+{"bt+", BBO(16,BOT,0,0), BBOAT_MASK, PPCCOM, PPCVLE|EXT, {BI, BDP}},
+{"bt", BBO(16,BOT,0,0), BBOAT_MASK, PPCCOM, PPCVLE|EXT, {BI, BD}},
+{"bbt", BBO(16,BOT,0,0), BBOAT_MASK, PWRCOM, PPCVLE|EXT, {BI, BD}},
+{"btl-", BBO(16,BOT,0,1), BBOAT_MASK, PPCCOM, PPCVLE|EXT, {BI, BDM}},
+{"btl+", BBO(16,BOT,0,1), BBOAT_MASK, PPCCOM, PPCVLE|EXT, {BI, BDP}},
+{"btl", BBO(16,BOT,0,1), BBOAT_MASK, PPCCOM, PPCVLE|EXT, {BI, BD}},
+{"bbtl", BBO(16,BOT,0,1), BBOAT_MASK, PWRCOM, PPCVLE|EXT, {BI, BD}},
+{"bta-", BBO(16,BOT,1,0), BBOAT_MASK, PPCCOM, PPCVLE|EXT, {BI, BDMA}},
+{"bta+", BBO(16,BOT,1,0), BBOAT_MASK, PPCCOM, PPCVLE|EXT, {BI, BDPA}},
+{"bta", BBO(16,BOT,1,0), BBOAT_MASK, PPCCOM, PPCVLE|EXT, {BI, BDA}},
+{"bbta", BBO(16,BOT,1,0), BBOAT_MASK, PWRCOM, PPCVLE|EXT, {BI, BDA}},
+{"btla-", BBO(16,BOT,1,1), BBOAT_MASK, PPCCOM, PPCVLE|EXT, {BI, BDMA}},
+{"btla+", BBO(16,BOT,1,1), BBOAT_MASK, PPCCOM, PPCVLE|EXT, {BI, BDPA}},
+{"btla", BBO(16,BOT,1,1), BBOAT_MASK, PPCCOM, PPCVLE|EXT, {BI, BDA}},
+{"bbtla", BBO(16,BOT,1,1), BBOAT_MASK, PWRCOM, PPCVLE|EXT, {BI, BDA}},
+
+{"bc-", B(16,0,0), B_MASK, PPCCOM, PPCVLE|EXT, {BOM, BI, BDM}},
+{"bc+", B(16,0,0), B_MASK, PPCCOM, PPCVLE|EXT, {BOP, BI, BDP}},
{"bc", B(16,0,0), B_MASK, COM, PPCVLE, {BO, BI, BD}},
-{"bcl-", B(16,0,1), B_MASK, PPCCOM, PPCVLE, {BOM, BI, BDM}},
-{"bcl+", B(16,0,1), B_MASK, PPCCOM, PPCVLE, {BOP, BI, BDP}},
+{"bcl-", B(16,0,1), B_MASK, PPCCOM, PPCVLE|EXT, {BOM, BI, BDM}},
+{"bcl+", B(16,0,1), B_MASK, PPCCOM, PPCVLE|EXT, {BOP, BI, BDP}},
{"bcl", B(16,0,1), B_MASK, COM, PPCVLE, {BO, BI, BD}},
-{"bca-", B(16,1,0), B_MASK, PPCCOM, PPCVLE, {BOM, BI, BDMA}},
-{"bca+", B(16,1,0), B_MASK, PPCCOM, PPCVLE, {BOP, BI, BDPA}},
+{"bca-", B(16,1,0), B_MASK, PPCCOM, PPCVLE|EXT, {BOM, BI, BDMA}},
+{"bca+", B(16,1,0), B_MASK, PPCCOM, PPCVLE|EXT, {BOP, BI, BDPA}},
{"bca", B(16,1,0), B_MASK, COM, PPCVLE, {BO, BI, BDA}},
-{"bcla-", B(16,1,1), B_MASK, PPCCOM, PPCVLE, {BOM, BI, BDMA}},
-{"bcla+", B(16,1,1), B_MASK, PPCCOM, PPCVLE, {BOP, BI, BDPA}},
+{"bcla-", B(16,1,1), B_MASK, PPCCOM, PPCVLE|EXT, {BOM, BI, BDMA}},
+{"bcla+", B(16,1,1), B_MASK, PPCCOM, PPCVLE|EXT, {BOP, BI, BDPA}},
{"bcla", B(16,1,1), B_MASK, COM, PPCVLE, {BO, BI, BDA}},
{"svc", SC(17,0,0), SC_MASK, POWER, PPCVLE, {SVC_LEV, FL1, FL2}},
@@ -5643,240 +5646,240 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"mcrf", XL(19,0), XLBB_MASK|(3<<21)|(3<<16), COM, PPCVLE, {BF, BFA}},
-{"lnia", DX(19,2), NODX_MASK, POWER9, PPCVLE, {RT}},
+{"lnia", DX(19,2), NODX_MASK, POWER9, PPCVLE|EXT, {RT}},
{"addpcis", DX(19,2), DX_MASK, POWER9, PPCVLE, {RT, DXD}},
-{"subpcis", DX(19,2), DX_MASK, POWER9, PPCVLE, {RT, NDXD}},
-
-{"bdnzlr-", XLO(19,BODNZ,16,0), XLBOBIBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BH}},
-{"bdnzlr+", XLO(19,BODNZP,16,0), XLBOBIBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BH}},
-{"bdnzlr", XLO(19,BODNZ,16,0), XLBOBIBB_MASK, PPCCOM, PPCVLE, {BH}},
-{"bdnzlrl-", XLO(19,BODNZ,16,1), XLBOBIBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BH}},
-{"bdnzlrl+", XLO(19,BODNZP,16,1), XLBOBIBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BH}},
-{"bdnzlrl", XLO(19,BODNZ,16,1), XLBOBIBB_MASK, PPCCOM, PPCVLE, {BH}},
-{"bdzlr-", XLO(19,BODZ,16,0), XLBOBIBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BH}},
-{"bdzlr+", XLO(19,BODZP,16,0), XLBOBIBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BH}},
-{"bdzlr", XLO(19,BODZ,16,0), XLBOBIBB_MASK, PPCCOM, PPCVLE, {BH}},
-{"bdzlrl-", XLO(19,BODZ,16,1), XLBOBIBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BH}},
-{"bdzlrl+", XLO(19,BODZP,16,1), XLBOBIBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BH}},
-{"bdzlrl", XLO(19,BODZ,16,1), XLBOBIBB_MASK, PPCCOM, PPCVLE, {BH}},
-{"blr", XLO(19,BOU,16,0), XLBOBIBB_MASK, PPCCOM, PPCVLE, {BH}},
-{"br", XLO(19,BOU,16,0), XLBOBIBB_MASK, PWRCOM, PPCVLE, {BH}},
-{"blrl", XLO(19,BOU,16,1), XLBOBIBB_MASK, PPCCOM, PPCVLE, {BH}},
-{"brl", XLO(19,BOU,16,1), XLBOBIBB_MASK, PWRCOM, PPCVLE, {BH}},
-{"bdnzlr-", XLO(19,BODNZM4,16,0), XLBOBIBB_MASK, ISA_V2, PPCVLE, {BH}},
-{"bdnzlrl-", XLO(19,BODNZM4,16,1), XLBOBIBB_MASK, ISA_V2, PPCVLE, {BH}},
-{"bdnzlr+", XLO(19,BODNZP4,16,0), XLBOBIBB_MASK, ISA_V2, PPCVLE, {BH}},
-{"bdnzlrl+", XLO(19,BODNZP4,16,1), XLBOBIBB_MASK, ISA_V2, PPCVLE, {BH}},
-{"bdzlr-", XLO(19,BODZM4,16,0), XLBOBIBB_MASK, ISA_V2, PPCVLE, {BH}},
-{"bdzlrl-", XLO(19,BODZM4,16,1), XLBOBIBB_MASK, ISA_V2, PPCVLE, {BH}},
-{"bdzlr+", XLO(19,BODZP4,16,0), XLBOBIBB_MASK, ISA_V2, PPCVLE, {BH}},
-{"bdzlrl+", XLO(19,BODZP4,16,1), XLBOBIBB_MASK, ISA_V2, PPCVLE, {BH}},
-
-{"bgelr-", XLOCB(19,BOF,CBLT,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"bgelr+", XLOCB(19,BOFP,CBLT,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"bgelr", XLOCB(19,BOF,CBLT,16,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR, BH}},
-{"bger", XLOCB(19,BOF,CBLT,16,0), XLBOCBBB_MASK, PWRCOM, PPCVLE, {CR, BH}},
-{"bnllr-", XLOCB(19,BOF,CBLT,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"bnllr+", XLOCB(19,BOFP,CBLT,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"bnllr", XLOCB(19,BOF,CBLT,16,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR, BH}},
-{"bnlr", XLOCB(19,BOF,CBLT,16,0), XLBOCBBB_MASK, PWRCOM, PPCVLE, {CR, BH}},
-{"bgelrl-", XLOCB(19,BOF,CBLT,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"bgelrl+", XLOCB(19,BOFP,CBLT,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"bgelrl", XLOCB(19,BOF,CBLT,16,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR, BH}},
-{"bgerl", XLOCB(19,BOF,CBLT,16,1), XLBOCBBB_MASK, PWRCOM, PPCVLE, {CR, BH}},
-{"bnllrl-", XLOCB(19,BOF,CBLT,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"bnllrl+", XLOCB(19,BOFP,CBLT,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"bnllrl", XLOCB(19,BOF,CBLT,16,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR, BH}},
-{"bnlrl", XLOCB(19,BOF,CBLT,16,1), XLBOCBBB_MASK, PWRCOM, PPCVLE, {CR, BH}},
-{"blelr-", XLOCB(19,BOF,CBGT,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"blelr+", XLOCB(19,BOFP,CBGT,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"blelr", XLOCB(19,BOF,CBGT,16,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR, BH}},
-{"bler", XLOCB(19,BOF,CBGT,16,0), XLBOCBBB_MASK, PWRCOM, PPCVLE, {CR, BH}},
-{"bnglr-", XLOCB(19,BOF,CBGT,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"bnglr+", XLOCB(19,BOFP,CBGT,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"bnglr", XLOCB(19,BOF,CBGT,16,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR, BH}},
-{"bngr", XLOCB(19,BOF,CBGT,16,0), XLBOCBBB_MASK, PWRCOM, PPCVLE, {CR, BH}},
-{"blelrl-", XLOCB(19,BOF,CBGT,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"blelrl+", XLOCB(19,BOFP,CBGT,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"blelrl", XLOCB(19,BOF,CBGT,16,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR, BH}},
-{"blerl", XLOCB(19,BOF,CBGT,16,1), XLBOCBBB_MASK, PWRCOM, PPCVLE, {CR, BH}},
-{"bnglrl-", XLOCB(19,BOF,CBGT,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"bnglrl+", XLOCB(19,BOFP,CBGT,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"bnglrl", XLOCB(19,BOF,CBGT,16,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR, BH}},
-{"bngrl", XLOCB(19,BOF,CBGT,16,1), XLBOCBBB_MASK, PWRCOM, PPCVLE, {CR, BH}},
-{"bnelr-", XLOCB(19,BOF,CBEQ,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"bnelr+", XLOCB(19,BOFP,CBEQ,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"bnelr", XLOCB(19,BOF,CBEQ,16,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR, BH}},
-{"bner", XLOCB(19,BOF,CBEQ,16,0), XLBOCBBB_MASK, PWRCOM, PPCVLE, {CR, BH}},
-{"bnelrl-", XLOCB(19,BOF,CBEQ,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"bnelrl+", XLOCB(19,BOFP,CBEQ,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"bnelrl", XLOCB(19,BOF,CBEQ,16,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR, BH}},
-{"bnerl", XLOCB(19,BOF,CBEQ,16,1), XLBOCBBB_MASK, PWRCOM, PPCVLE, {CR, BH}},
-{"bnslr-", XLOCB(19,BOF,CBSO,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"bnslr+", XLOCB(19,BOFP,CBSO,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"bnslr", XLOCB(19,BOF,CBSO,16,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR, BH}},
-{"bnsr", XLOCB(19,BOF,CBSO,16,0), XLBOCBBB_MASK, PWRCOM, PPCVLE, {CR, BH}},
-{"bnulr-", XLOCB(19,BOF,CBSO,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"bnulr+", XLOCB(19,BOFP,CBSO,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"bnulr", XLOCB(19,BOF,CBSO,16,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR, BH}},
-{"bnslrl-", XLOCB(19,BOF,CBSO,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"bnslrl+", XLOCB(19,BOFP,CBSO,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"bnslrl", XLOCB(19,BOF,CBSO,16,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR, BH}},
-{"bnsrl", XLOCB(19,BOF,CBSO,16,1), XLBOCBBB_MASK, PWRCOM, PPCVLE, {CR, BH}},
-{"bnulrl-", XLOCB(19,BOF,CBSO,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"bnulrl+", XLOCB(19,BOFP,CBSO,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"bnulrl", XLOCB(19,BOF,CBSO,16,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR, BH}},
-{"bgelr-", XLOCB(19,BOFM4,CBLT,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"bnllr-", XLOCB(19,BOFM4,CBLT,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"bgelrl-", XLOCB(19,BOFM4,CBLT,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"bnllrl-", XLOCB(19,BOFM4,CBLT,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"blelr-", XLOCB(19,BOFM4,CBGT,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"bnglr-", XLOCB(19,BOFM4,CBGT,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"blelrl-", XLOCB(19,BOFM4,CBGT,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"bnglrl-", XLOCB(19,BOFM4,CBGT,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"bnelr-", XLOCB(19,BOFM4,CBEQ,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"bnelrl-", XLOCB(19,BOFM4,CBEQ,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"bnslr-", XLOCB(19,BOFM4,CBSO,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"bnulr-", XLOCB(19,BOFM4,CBSO,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"bnslrl-", XLOCB(19,BOFM4,CBSO,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"bnulrl-", XLOCB(19,BOFM4,CBSO,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"bgelr+", XLOCB(19,BOFP4,CBLT,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"bnllr+", XLOCB(19,BOFP4,CBLT,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"bgelrl+", XLOCB(19,BOFP4,CBLT,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"bnllrl+", XLOCB(19,BOFP4,CBLT,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"blelr+", XLOCB(19,BOFP4,CBGT,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"bnglr+", XLOCB(19,BOFP4,CBGT,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"blelrl+", XLOCB(19,BOFP4,CBGT,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"bnglrl+", XLOCB(19,BOFP4,CBGT,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"bnelr+", XLOCB(19,BOFP4,CBEQ,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"bnelrl+", XLOCB(19,BOFP4,CBEQ,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"bnslr+", XLOCB(19,BOFP4,CBSO,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"bnulr+", XLOCB(19,BOFP4,CBSO,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"bnslrl+", XLOCB(19,BOFP4,CBSO,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"bnulrl+", XLOCB(19,BOFP4,CBSO,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"bltlr-", XLOCB(19,BOT,CBLT,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"bltlr+", XLOCB(19,BOTP,CBLT,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"bltlr", XLOCB(19,BOT,CBLT,16,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR, BH}},
-{"bltr", XLOCB(19,BOT,CBLT,16,0), XLBOCBBB_MASK, PWRCOM, PPCVLE, {CR, BH}},
-{"bltlrl-", XLOCB(19,BOT,CBLT,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"bltlrl+", XLOCB(19,BOTP,CBLT,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"bltlrl", XLOCB(19,BOT,CBLT,16,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR, BH}},
-{"bltrl", XLOCB(19,BOT,CBLT,16,1), XLBOCBBB_MASK, PWRCOM, PPCVLE, {CR, BH}},
-{"bgtlr-", XLOCB(19,BOT,CBGT,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"bgtlr+", XLOCB(19,BOTP,CBGT,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"bgtlr", XLOCB(19,BOT,CBGT,16,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR, BH}},
-{"bgtr", XLOCB(19,BOT,CBGT,16,0), XLBOCBBB_MASK, PWRCOM, PPCVLE, {CR, BH}},
-{"bgtlrl-", XLOCB(19,BOT,CBGT,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"bgtlrl+", XLOCB(19,BOTP,CBGT,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"bgtlrl", XLOCB(19,BOT,CBGT,16,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR, BH}},
-{"bgtrl", XLOCB(19,BOT,CBGT,16,1), XLBOCBBB_MASK, PWRCOM, PPCVLE, {CR, BH}},
-{"beqlr-", XLOCB(19,BOT,CBEQ,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"beqlr+", XLOCB(19,BOTP,CBEQ,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"beqlr", XLOCB(19,BOT,CBEQ,16,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR, BH}},
-{"beqr", XLOCB(19,BOT,CBEQ,16,0), XLBOCBBB_MASK, PWRCOM, PPCVLE, {CR, BH}},
-{"beqlrl-", XLOCB(19,BOT,CBEQ,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"beqlrl+", XLOCB(19,BOTP,CBEQ,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"beqlrl", XLOCB(19,BOT,CBEQ,16,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR, BH}},
-{"beqrl", XLOCB(19,BOT,CBEQ,16,1), XLBOCBBB_MASK, PWRCOM, PPCVLE, {CR, BH}},
-{"bsolr-", XLOCB(19,BOT,CBSO,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"bsolr+", XLOCB(19,BOTP,CBSO,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"bsolr", XLOCB(19,BOT,CBSO,16,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR, BH}},
-{"bsor", XLOCB(19,BOT,CBSO,16,0), XLBOCBBB_MASK, PWRCOM, PPCVLE, {CR, BH}},
-{"bunlr-", XLOCB(19,BOT,CBSO,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"bunlr+", XLOCB(19,BOTP,CBSO,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"bunlr", XLOCB(19,BOT,CBSO,16,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR, BH}},
-{"bsolrl-", XLOCB(19,BOT,CBSO,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"bsolrl+", XLOCB(19,BOTP,CBSO,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"bsolrl", XLOCB(19,BOT,CBSO,16,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR, BH}},
-{"bsorl", XLOCB(19,BOT,CBSO,16,1), XLBOCBBB_MASK, PWRCOM, PPCVLE, {CR, BH}},
-{"bunlrl-", XLOCB(19,BOT,CBSO,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"bunlrl+", XLOCB(19,BOTP,CBSO,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"bunlrl", XLOCB(19,BOT,CBSO,16,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR, BH}},
-{"bltlr-", XLOCB(19,BOTM4,CBLT,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"bltlrl-", XLOCB(19,BOTM4,CBLT,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"bgtlr-", XLOCB(19,BOTM4,CBGT,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"bgtlrl-", XLOCB(19,BOTM4,CBGT,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"beqlr-", XLOCB(19,BOTM4,CBEQ,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"beqlrl-", XLOCB(19,BOTM4,CBEQ,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"bsolr-", XLOCB(19,BOTM4,CBSO,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"bunlr-", XLOCB(19,BOTM4,CBSO,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"bsolrl-", XLOCB(19,BOTM4,CBSO,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"bunlrl-", XLOCB(19,BOTM4,CBSO,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"bltlr+", XLOCB(19,BOTP4,CBLT,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"bltlrl+", XLOCB(19,BOTP4,CBLT,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"bgtlr+", XLOCB(19,BOTP4,CBGT,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"bgtlrl+", XLOCB(19,BOTP4,CBGT,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"beqlr+", XLOCB(19,BOTP4,CBEQ,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"beqlrl+", XLOCB(19,BOTP4,CBEQ,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"bsolr+", XLOCB(19,BOTP4,CBSO,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"bunlr+", XLOCB(19,BOTP4,CBSO,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"bsolrl+", XLOCB(19,BOTP4,CBSO,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"bunlrl+", XLOCB(19,BOTP4,CBSO,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-
-{"bdnzflr-", XLO(19,BODNZF,16,0), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BH}},
-{"bdnzflr+", XLO(19,BODNZFP,16,0), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BH}},
-{"bdnzflr", XLO(19,BODNZF,16,0), XLBOBB_MASK, PPCCOM, PPCVLE, {BI, BH}},
-{"bdnzflrl-",XLO(19,BODNZF,16,1), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BH}},
-{"bdnzflrl+",XLO(19,BODNZFP,16,1), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BH}},
-{"bdnzflrl", XLO(19,BODNZF,16,1), XLBOBB_MASK, PPCCOM, PPCVLE, {BI, BH}},
-{"bdzflr-", XLO(19,BODZF,16,0), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BH}},
-{"bdzflr+", XLO(19,BODZFP,16,0), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BH}},
-{"bdzflr", XLO(19,BODZF,16,0), XLBOBB_MASK, PPCCOM, PPCVLE, {BI, BH}},
-{"bdzflrl-", XLO(19,BODZF,16,1), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BH}},
-{"bdzflrl+", XLO(19,BODZFP,16,1), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BH}},
-{"bdzflrl", XLO(19,BODZF,16,1), XLBOBB_MASK, PPCCOM, PPCVLE, {BI, BH}},
-{"bflr-", XLO(19,BOF,16,0), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BH}},
-{"bflr+", XLO(19,BOFP,16,0), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BH}},
-{"bflr", XLO(19,BOF,16,0), XLBOBB_MASK, PPCCOM, PPCVLE, {BI, BH}},
-{"bbfr", XLO(19,BOF,16,0), XLBOBB_MASK, PWRCOM, PPCVLE, {BI, BH}},
-{"bflrl-", XLO(19,BOF,16,1), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BH}},
-{"bflrl+", XLO(19,BOFP,16,1), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BH}},
-{"bflrl", XLO(19,BOF,16,1), XLBOBB_MASK, PPCCOM, PPCVLE, {BI, BH}},
-{"bbfrl", XLO(19,BOF,16,1), XLBOBB_MASK, PWRCOM, PPCVLE, {BI, BH}},
-{"bflr-", XLO(19,BOFM4,16,0), XLBOBB_MASK, ISA_V2, PPCVLE, {BI, BH}},
-{"bflrl-", XLO(19,BOFM4,16,1), XLBOBB_MASK, ISA_V2, PPCVLE, {BI, BH}},
-{"bflr+", XLO(19,BOFP4,16,0), XLBOBB_MASK, ISA_V2, PPCVLE, {BI, BH}},
-{"bflrl+", XLO(19,BOFP4,16,1), XLBOBB_MASK, ISA_V2, PPCVLE, {BI, BH}},
-{"bdnztlr-", XLO(19,BODNZT,16,0), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BH}},
-{"bdnztlr+", XLO(19,BODNZTP,16,0), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BH}},
-{"bdnztlr", XLO(19,BODNZT,16,0), XLBOBB_MASK, PPCCOM, PPCVLE, {BI, BH}},
-{"bdnztlrl-", XLO(19,BODNZT,16,1), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BH}},
-{"bdnztlrl+", XLO(19,BODNZTP,16,1), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BH}},
-{"bdnztlrl", XLO(19,BODNZT,16,1), XLBOBB_MASK, PPCCOM, PPCVLE, {BI, BH}},
-{"bdztlr-", XLO(19,BODZT,16,0), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BH}},
-{"bdztlr+", XLO(19,BODZTP,16,0), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BH}},
-{"bdztlr", XLO(19,BODZT,16,0), XLBOBB_MASK, PPCCOM, PPCVLE, {BI, BH}},
-{"bdztlrl-", XLO(19,BODZT,16,1), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BH}},
-{"bdztlrl+", XLO(19,BODZTP,16,1), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BH}},
-{"bdztlrl", XLO(19,BODZT,16,1), XLBOBB_MASK, PPCCOM, PPCVLE, {BI, BH}},
-{"btlr-", XLO(19,BOT,16,0), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BH}},
-{"btlr+", XLO(19,BOTP,16,0), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BH}},
-{"btlr", XLO(19,BOT,16,0), XLBOBB_MASK, PPCCOM, PPCVLE, {BI, BH}},
-{"bbtr", XLO(19,BOT,16,0), XLBOBB_MASK, PWRCOM, PPCVLE, {BI, BH}},
-{"btlrl-", XLO(19,BOT,16,1), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BH}},
-{"btlrl+", XLO(19,BOTP,16,1), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BH}},
-{"btlrl", XLO(19,BOT,16,1), XLBOBB_MASK, PPCCOM, PPCVLE, {BI, BH}},
-{"bbtrl", XLO(19,BOT,16,1), XLBOBB_MASK, PWRCOM, PPCVLE, {BI, BH}},
-{"btlr-", XLO(19,BOTM4,16,0), XLBOBB_MASK, ISA_V2, PPCVLE, {BI, BH}},
-{"btlrl-", XLO(19,BOTM4,16,1), XLBOBB_MASK, ISA_V2, PPCVLE, {BI, BH}},
-{"btlr+", XLO(19,BOTP4,16,0), XLBOBB_MASK, ISA_V2, PPCVLE, {BI, BH}},
-{"btlrl+", XLO(19,BOTP4,16,1), XLBOBB_MASK, ISA_V2, PPCVLE, {BI, BH}},
-
-{"bclr-", XLLK(19,16,0), XLBH_MASK, PPCCOM, PPCVLE, {BOM, BI, BH}},
-{"bclr+", XLLK(19,16,0), XLBH_MASK, PPCCOM, PPCVLE, {BOP, BI, BH}},
+{"subpcis", DX(19,2), DX_MASK, POWER9, PPCVLE|EXT, {RT, NDXD}},
+
+{"bdnzlr-", XLO(19,BODNZ,16,0), XLBOBIBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {BH}},
+{"bdnzlr+", XLO(19,BODNZP,16,0), XLBOBIBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {BH}},
+{"bdnzlr", XLO(19,BODNZ,16,0), XLBOBIBB_MASK, PPCCOM, PPCVLE|EXT, {BH}},
+{"bdnzlrl-", XLO(19,BODNZ,16,1), XLBOBIBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {BH}},
+{"bdnzlrl+", XLO(19,BODNZP,16,1), XLBOBIBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {BH}},
+{"bdnzlrl", XLO(19,BODNZ,16,1), XLBOBIBB_MASK, PPCCOM, PPCVLE|EXT, {BH}},
+{"bdzlr-", XLO(19,BODZ,16,0), XLBOBIBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {BH}},
+{"bdzlr+", XLO(19,BODZP,16,0), XLBOBIBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {BH}},
+{"bdzlr", XLO(19,BODZ,16,0), XLBOBIBB_MASK, PPCCOM, PPCVLE|EXT, {BH}},
+{"bdzlrl-", XLO(19,BODZ,16,1), XLBOBIBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {BH}},
+{"bdzlrl+", XLO(19,BODZP,16,1), XLBOBIBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {BH}},
+{"bdzlrl", XLO(19,BODZ,16,1), XLBOBIBB_MASK, PPCCOM, PPCVLE|EXT, {BH}},
+{"blr", XLO(19,BOU,16,0), XLBOBIBB_MASK, PPCCOM, PPCVLE|EXT, {BH}},
+{"br", XLO(19,BOU,16,0), XLBOBIBB_MASK, PWRCOM, PPCVLE|EXT, {BH}},
+{"blrl", XLO(19,BOU,16,1), XLBOBIBB_MASK, PPCCOM, PPCVLE|EXT, {BH}},
+{"brl", XLO(19,BOU,16,1), XLBOBIBB_MASK, PWRCOM, PPCVLE|EXT, {BH}},
+{"bdnzlr-", XLO(19,BODNZM4,16,0), XLBOBIBB_MASK, ISA_V2, PPCVLE|EXT, {BH}},
+{"bdnzlrl-", XLO(19,BODNZM4,16,1), XLBOBIBB_MASK, ISA_V2, PPCVLE|EXT, {BH}},
+{"bdnzlr+", XLO(19,BODNZP4,16,0), XLBOBIBB_MASK, ISA_V2, PPCVLE|EXT, {BH}},
+{"bdnzlrl+", XLO(19,BODNZP4,16,1), XLBOBIBB_MASK, ISA_V2, PPCVLE|EXT, {BH}},
+{"bdzlr-", XLO(19,BODZM4,16,0), XLBOBIBB_MASK, ISA_V2, PPCVLE|EXT, {BH}},
+{"bdzlrl-", XLO(19,BODZM4,16,1), XLBOBIBB_MASK, ISA_V2, PPCVLE|EXT, {BH}},
+{"bdzlr+", XLO(19,BODZP4,16,0), XLBOBIBB_MASK, ISA_V2, PPCVLE|EXT, {BH}},
+{"bdzlrl+", XLO(19,BODZP4,16,1), XLBOBIBB_MASK, ISA_V2, PPCVLE|EXT, {BH}},
+
+{"bgelr-", XLOCB(19,BOF,CBLT,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"bgelr+", XLOCB(19,BOFP,CBLT,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"bgelr", XLOCB(19,BOF,CBLT,16,0), XLBOCBBB_MASK, PPCCOM, PPCVLE|EXT, {CR, BH}},
+{"bger", XLOCB(19,BOF,CBLT,16,0), XLBOCBBB_MASK, PWRCOM, PPCVLE|EXT, {CR, BH}},
+{"bnllr-", XLOCB(19,BOF,CBLT,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"bnllr+", XLOCB(19,BOFP,CBLT,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"bnllr", XLOCB(19,BOF,CBLT,16,0), XLBOCBBB_MASK, PPCCOM, PPCVLE|EXT, {CR, BH}},
+{"bnlr", XLOCB(19,BOF,CBLT,16,0), XLBOCBBB_MASK, PWRCOM, PPCVLE|EXT, {CR, BH}},
+{"bgelrl-", XLOCB(19,BOF,CBLT,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"bgelrl+", XLOCB(19,BOFP,CBLT,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"bgelrl", XLOCB(19,BOF,CBLT,16,1), XLBOCBBB_MASK, PPCCOM, PPCVLE|EXT, {CR, BH}},
+{"bgerl", XLOCB(19,BOF,CBLT,16,1), XLBOCBBB_MASK, PWRCOM, PPCVLE|EXT, {CR, BH}},
+{"bnllrl-", XLOCB(19,BOF,CBLT,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"bnllrl+", XLOCB(19,BOFP,CBLT,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"bnllrl", XLOCB(19,BOF,CBLT,16,1), XLBOCBBB_MASK, PPCCOM, PPCVLE|EXT, {CR, BH}},
+{"bnlrl", XLOCB(19,BOF,CBLT,16,1), XLBOCBBB_MASK, PWRCOM, PPCVLE|EXT, {CR, BH}},
+{"blelr-", XLOCB(19,BOF,CBGT,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"blelr+", XLOCB(19,BOFP,CBGT,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"blelr", XLOCB(19,BOF,CBGT,16,0), XLBOCBBB_MASK, PPCCOM, PPCVLE|EXT, {CR, BH}},
+{"bler", XLOCB(19,BOF,CBGT,16,0), XLBOCBBB_MASK, PWRCOM, PPCVLE|EXT, {CR, BH}},
+{"bnglr-", XLOCB(19,BOF,CBGT,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"bnglr+", XLOCB(19,BOFP,CBGT,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"bnglr", XLOCB(19,BOF,CBGT,16,0), XLBOCBBB_MASK, PPCCOM, PPCVLE|EXT, {CR, BH}},
+{"bngr", XLOCB(19,BOF,CBGT,16,0), XLBOCBBB_MASK, PWRCOM, PPCVLE|EXT, {CR, BH}},
+{"blelrl-", XLOCB(19,BOF,CBGT,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"blelrl+", XLOCB(19,BOFP,CBGT,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"blelrl", XLOCB(19,BOF,CBGT,16,1), XLBOCBBB_MASK, PPCCOM, PPCVLE|EXT, {CR, BH}},
+{"blerl", XLOCB(19,BOF,CBGT,16,1), XLBOCBBB_MASK, PWRCOM, PPCVLE|EXT, {CR, BH}},
+{"bnglrl-", XLOCB(19,BOF,CBGT,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"bnglrl+", XLOCB(19,BOFP,CBGT,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"bnglrl", XLOCB(19,BOF,CBGT,16,1), XLBOCBBB_MASK, PPCCOM, PPCVLE|EXT, {CR, BH}},
+{"bngrl", XLOCB(19,BOF,CBGT,16,1), XLBOCBBB_MASK, PWRCOM, PPCVLE|EXT, {CR, BH}},
+{"bnelr-", XLOCB(19,BOF,CBEQ,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"bnelr+", XLOCB(19,BOFP,CBEQ,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"bnelr", XLOCB(19,BOF,CBEQ,16,0), XLBOCBBB_MASK, PPCCOM, PPCVLE|EXT, {CR, BH}},
+{"bner", XLOCB(19,BOF,CBEQ,16,0), XLBOCBBB_MASK, PWRCOM, PPCVLE|EXT, {CR, BH}},
+{"bnelrl-", XLOCB(19,BOF,CBEQ,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"bnelrl+", XLOCB(19,BOFP,CBEQ,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"bnelrl", XLOCB(19,BOF,CBEQ,16,1), XLBOCBBB_MASK, PPCCOM, PPCVLE|EXT, {CR, BH}},
+{"bnerl", XLOCB(19,BOF,CBEQ,16,1), XLBOCBBB_MASK, PWRCOM, PPCVLE|EXT, {CR, BH}},
+{"bnslr-", XLOCB(19,BOF,CBSO,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"bnslr+", XLOCB(19,BOFP,CBSO,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"bnslr", XLOCB(19,BOF,CBSO,16,0), XLBOCBBB_MASK, PPCCOM, PPCVLE|EXT, {CR, BH}},
+{"bnsr", XLOCB(19,BOF,CBSO,16,0), XLBOCBBB_MASK, PWRCOM, PPCVLE|EXT, {CR, BH}},
+{"bnulr-", XLOCB(19,BOF,CBSO,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"bnulr+", XLOCB(19,BOFP,CBSO,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"bnulr", XLOCB(19,BOF,CBSO,16,0), XLBOCBBB_MASK, PPCCOM, PPCVLE|EXT, {CR, BH}},
+{"bnslrl-", XLOCB(19,BOF,CBSO,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"bnslrl+", XLOCB(19,BOFP,CBSO,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"bnslrl", XLOCB(19,BOF,CBSO,16,1), XLBOCBBB_MASK, PPCCOM, PPCVLE|EXT, {CR, BH}},
+{"bnsrl", XLOCB(19,BOF,CBSO,16,1), XLBOCBBB_MASK, PWRCOM, PPCVLE|EXT, {CR, BH}},
+{"bnulrl-", XLOCB(19,BOF,CBSO,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"bnulrl+", XLOCB(19,BOFP,CBSO,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"bnulrl", XLOCB(19,BOF,CBSO,16,1), XLBOCBBB_MASK, PPCCOM, PPCVLE|EXT, {CR, BH}},
+{"bgelr-", XLOCB(19,BOFM4,CBLT,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"bnllr-", XLOCB(19,BOFM4,CBLT,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"bgelrl-", XLOCB(19,BOFM4,CBLT,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"bnllrl-", XLOCB(19,BOFM4,CBLT,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"blelr-", XLOCB(19,BOFM4,CBGT,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"bnglr-", XLOCB(19,BOFM4,CBGT,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"blelrl-", XLOCB(19,BOFM4,CBGT,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"bnglrl-", XLOCB(19,BOFM4,CBGT,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"bnelr-", XLOCB(19,BOFM4,CBEQ,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"bnelrl-", XLOCB(19,BOFM4,CBEQ,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"bnslr-", XLOCB(19,BOFM4,CBSO,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"bnulr-", XLOCB(19,BOFM4,CBSO,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"bnslrl-", XLOCB(19,BOFM4,CBSO,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"bnulrl-", XLOCB(19,BOFM4,CBSO,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"bgelr+", XLOCB(19,BOFP4,CBLT,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"bnllr+", XLOCB(19,BOFP4,CBLT,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"bgelrl+", XLOCB(19,BOFP4,CBLT,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"bnllrl+", XLOCB(19,BOFP4,CBLT,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"blelr+", XLOCB(19,BOFP4,CBGT,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"bnglr+", XLOCB(19,BOFP4,CBGT,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"blelrl+", XLOCB(19,BOFP4,CBGT,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"bnglrl+", XLOCB(19,BOFP4,CBGT,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"bnelr+", XLOCB(19,BOFP4,CBEQ,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"bnelrl+", XLOCB(19,BOFP4,CBEQ,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"bnslr+", XLOCB(19,BOFP4,CBSO,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"bnulr+", XLOCB(19,BOFP4,CBSO,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"bnslrl+", XLOCB(19,BOFP4,CBSO,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"bnulrl+", XLOCB(19,BOFP4,CBSO,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"bltlr-", XLOCB(19,BOT,CBLT,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"bltlr+", XLOCB(19,BOTP,CBLT,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"bltlr", XLOCB(19,BOT,CBLT,16,0), XLBOCBBB_MASK, PPCCOM, PPCVLE|EXT, {CR, BH}},
+{"bltr", XLOCB(19,BOT,CBLT,16,0), XLBOCBBB_MASK, PWRCOM, PPCVLE|EXT, {CR, BH}},
+{"bltlrl-", XLOCB(19,BOT,CBLT,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"bltlrl+", XLOCB(19,BOTP,CBLT,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"bltlrl", XLOCB(19,BOT,CBLT,16,1), XLBOCBBB_MASK, PPCCOM, PPCVLE|EXT, {CR, BH}},
+{"bltrl", XLOCB(19,BOT,CBLT,16,1), XLBOCBBB_MASK, PWRCOM, PPCVLE|EXT, {CR, BH}},
+{"bgtlr-", XLOCB(19,BOT,CBGT,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"bgtlr+", XLOCB(19,BOTP,CBGT,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"bgtlr", XLOCB(19,BOT,CBGT,16,0), XLBOCBBB_MASK, PPCCOM, PPCVLE|EXT, {CR, BH}},
+{"bgtr", XLOCB(19,BOT,CBGT,16,0), XLBOCBBB_MASK, PWRCOM, PPCVLE|EXT, {CR, BH}},
+{"bgtlrl-", XLOCB(19,BOT,CBGT,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"bgtlrl+", XLOCB(19,BOTP,CBGT,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"bgtlrl", XLOCB(19,BOT,CBGT,16,1), XLBOCBBB_MASK, PPCCOM, PPCVLE|EXT, {CR, BH}},
+{"bgtrl", XLOCB(19,BOT,CBGT,16,1), XLBOCBBB_MASK, PWRCOM, PPCVLE|EXT, {CR, BH}},
+{"beqlr-", XLOCB(19,BOT,CBEQ,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"beqlr+", XLOCB(19,BOTP,CBEQ,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"beqlr", XLOCB(19,BOT,CBEQ,16,0), XLBOCBBB_MASK, PPCCOM, PPCVLE|EXT, {CR, BH}},
+{"beqr", XLOCB(19,BOT,CBEQ,16,0), XLBOCBBB_MASK, PWRCOM, PPCVLE|EXT, {CR, BH}},
+{"beqlrl-", XLOCB(19,BOT,CBEQ,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"beqlrl+", XLOCB(19,BOTP,CBEQ,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"beqlrl", XLOCB(19,BOT,CBEQ,16,1), XLBOCBBB_MASK, PPCCOM, PPCVLE|EXT, {CR, BH}},
+{"beqrl", XLOCB(19,BOT,CBEQ,16,1), XLBOCBBB_MASK, PWRCOM, PPCVLE|EXT, {CR, BH}},
+{"bsolr-", XLOCB(19,BOT,CBSO,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"bsolr+", XLOCB(19,BOTP,CBSO,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"bsolr", XLOCB(19,BOT,CBSO,16,0), XLBOCBBB_MASK, PPCCOM, PPCVLE|EXT, {CR, BH}},
+{"bsor", XLOCB(19,BOT,CBSO,16,0), XLBOCBBB_MASK, PWRCOM, PPCVLE|EXT, {CR, BH}},
+{"bunlr-", XLOCB(19,BOT,CBSO,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"bunlr+", XLOCB(19,BOTP,CBSO,16,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"bunlr", XLOCB(19,BOT,CBSO,16,0), XLBOCBBB_MASK, PPCCOM, PPCVLE|EXT, {CR, BH}},
+{"bsolrl-", XLOCB(19,BOT,CBSO,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"bsolrl+", XLOCB(19,BOTP,CBSO,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"bsolrl", XLOCB(19,BOT,CBSO,16,1), XLBOCBBB_MASK, PPCCOM, PPCVLE|EXT, {CR, BH}},
+{"bsorl", XLOCB(19,BOT,CBSO,16,1), XLBOCBBB_MASK, PWRCOM, PPCVLE|EXT, {CR, BH}},
+{"bunlrl-", XLOCB(19,BOT,CBSO,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"bunlrl+", XLOCB(19,BOTP,CBSO,16,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"bunlrl", XLOCB(19,BOT,CBSO,16,1), XLBOCBBB_MASK, PPCCOM, PPCVLE|EXT, {CR, BH}},
+{"bltlr-", XLOCB(19,BOTM4,CBLT,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"bltlrl-", XLOCB(19,BOTM4,CBLT,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"bgtlr-", XLOCB(19,BOTM4,CBGT,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"bgtlrl-", XLOCB(19,BOTM4,CBGT,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"beqlr-", XLOCB(19,BOTM4,CBEQ,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"beqlrl-", XLOCB(19,BOTM4,CBEQ,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"bsolr-", XLOCB(19,BOTM4,CBSO,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"bunlr-", XLOCB(19,BOTM4,CBSO,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"bsolrl-", XLOCB(19,BOTM4,CBSO,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"bunlrl-", XLOCB(19,BOTM4,CBSO,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"bltlr+", XLOCB(19,BOTP4,CBLT,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"bltlrl+", XLOCB(19,BOTP4,CBLT,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"bgtlr+", XLOCB(19,BOTP4,CBGT,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"bgtlrl+", XLOCB(19,BOTP4,CBGT,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"beqlr+", XLOCB(19,BOTP4,CBEQ,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"beqlrl+", XLOCB(19,BOTP4,CBEQ,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"bsolr+", XLOCB(19,BOTP4,CBSO,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"bunlr+", XLOCB(19,BOTP4,CBSO,16,0), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"bsolrl+", XLOCB(19,BOTP4,CBSO,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"bunlrl+", XLOCB(19,BOTP4,CBSO,16,1), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+
+{"bdnzflr-", XLO(19,BODNZF,16,0), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {BI, BH}},
+{"bdnzflr+", XLO(19,BODNZFP,16,0), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {BI, BH}},
+{"bdnzflr", XLO(19,BODNZF,16,0), XLBOBB_MASK, PPCCOM, PPCVLE|EXT, {BI, BH}},
+{"bdnzflrl-",XLO(19,BODNZF,16,1), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {BI, BH}},
+{"bdnzflrl+",XLO(19,BODNZFP,16,1), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {BI, BH}},
+{"bdnzflrl", XLO(19,BODNZF,16,1), XLBOBB_MASK, PPCCOM, PPCVLE|EXT, {BI, BH}},
+{"bdzflr-", XLO(19,BODZF,16,0), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {BI, BH}},
+{"bdzflr+", XLO(19,BODZFP,16,0), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {BI, BH}},
+{"bdzflr", XLO(19,BODZF,16,0), XLBOBB_MASK, PPCCOM, PPCVLE|EXT, {BI, BH}},
+{"bdzflrl-", XLO(19,BODZF,16,1), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {BI, BH}},
+{"bdzflrl+", XLO(19,BODZFP,16,1), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {BI, BH}},
+{"bdzflrl", XLO(19,BODZF,16,1), XLBOBB_MASK, PPCCOM, PPCVLE|EXT, {BI, BH}},
+{"bflr-", XLO(19,BOF,16,0), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {BI, BH}},
+{"bflr+", XLO(19,BOFP,16,0), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {BI, BH}},
+{"bflr", XLO(19,BOF,16,0), XLBOBB_MASK, PPCCOM, PPCVLE|EXT, {BI, BH}},
+{"bbfr", XLO(19,BOF,16,0), XLBOBB_MASK, PWRCOM, PPCVLE|EXT, {BI, BH}},
+{"bflrl-", XLO(19,BOF,16,1), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {BI, BH}},
+{"bflrl+", XLO(19,BOFP,16,1), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {BI, BH}},
+{"bflrl", XLO(19,BOF,16,1), XLBOBB_MASK, PPCCOM, PPCVLE|EXT, {BI, BH}},
+{"bbfrl", XLO(19,BOF,16,1), XLBOBB_MASK, PWRCOM, PPCVLE|EXT, {BI, BH}},
+{"bflr-", XLO(19,BOFM4,16,0), XLBOBB_MASK, ISA_V2, PPCVLE|EXT, {BI, BH}},
+{"bflrl-", XLO(19,BOFM4,16,1), XLBOBB_MASK, ISA_V2, PPCVLE|EXT, {BI, BH}},
+{"bflr+", XLO(19,BOFP4,16,0), XLBOBB_MASK, ISA_V2, PPCVLE|EXT, {BI, BH}},
+{"bflrl+", XLO(19,BOFP4,16,1), XLBOBB_MASK, ISA_V2, PPCVLE|EXT, {BI, BH}},
+{"bdnztlr-", XLO(19,BODNZT,16,0), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {BI, BH}},
+{"bdnztlr+", XLO(19,BODNZTP,16,0), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {BI, BH}},
+{"bdnztlr", XLO(19,BODNZT,16,0), XLBOBB_MASK, PPCCOM, PPCVLE|EXT, {BI, BH}},
+{"bdnztlrl-", XLO(19,BODNZT,16,1), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {BI, BH}},
+{"bdnztlrl+", XLO(19,BODNZTP,16,1), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {BI, BH}},
+{"bdnztlrl", XLO(19,BODNZT,16,1), XLBOBB_MASK, PPCCOM, PPCVLE|EXT, {BI, BH}},
+{"bdztlr-", XLO(19,BODZT,16,0), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {BI, BH}},
+{"bdztlr+", XLO(19,BODZTP,16,0), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {BI, BH}},
+{"bdztlr", XLO(19,BODZT,16,0), XLBOBB_MASK, PPCCOM, PPCVLE|EXT, {BI, BH}},
+{"bdztlrl-", XLO(19,BODZT,16,1), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {BI, BH}},
+{"bdztlrl+", XLO(19,BODZTP,16,1), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {BI, BH}},
+{"bdztlrl", XLO(19,BODZT,16,1), XLBOBB_MASK, PPCCOM, PPCVLE|EXT, {BI, BH}},
+{"btlr-", XLO(19,BOT,16,0), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {BI, BH}},
+{"btlr+", XLO(19,BOTP,16,0), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {BI, BH}},
+{"btlr", XLO(19,BOT,16,0), XLBOBB_MASK, PPCCOM, PPCVLE|EXT, {BI, BH}},
+{"bbtr", XLO(19,BOT,16,0), XLBOBB_MASK, PWRCOM, PPCVLE|EXT, {BI, BH}},
+{"btlrl-", XLO(19,BOT,16,1), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {BI, BH}},
+{"btlrl+", XLO(19,BOTP,16,1), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {BI, BH}},
+{"btlrl", XLO(19,BOT,16,1), XLBOBB_MASK, PPCCOM, PPCVLE|EXT, {BI, BH}},
+{"bbtrl", XLO(19,BOT,16,1), XLBOBB_MASK, PWRCOM, PPCVLE|EXT, {BI, BH}},
+{"btlr-", XLO(19,BOTM4,16,0), XLBOBB_MASK, ISA_V2, PPCVLE|EXT, {BI, BH}},
+{"btlrl-", XLO(19,BOTM4,16,1), XLBOBB_MASK, ISA_V2, PPCVLE|EXT, {BI, BH}},
+{"btlr+", XLO(19,BOTP4,16,0), XLBOBB_MASK, ISA_V2, PPCVLE|EXT, {BI, BH}},
+{"btlrl+", XLO(19,BOTP4,16,1), XLBOBB_MASK, ISA_V2, PPCVLE|EXT, {BI, BH}},
+
+{"bclr-", XLLK(19,16,0), XLBH_MASK, PPCCOM, PPCVLE|EXT, {BOM, BI, BH}},
+{"bclr+", XLLK(19,16,0), XLBH_MASK, PPCCOM, PPCVLE|EXT, {BOP, BI, BH}},
{"bclr", XLLK(19,16,0), XLBH_MASK, PPCCOM, PPCVLE, {BO, BI, BH}},
{"bcr", XLLK(19,16,0), XLBH_MASK, PWRCOM, PPCVLE, {BO, BI, BH}},
-{"bclrl-", XLLK(19,16,1), XLBH_MASK, PPCCOM, PPCVLE, {BOM, BI, BH}},
-{"bclrl+", XLLK(19,16,1), XLBH_MASK, PPCCOM, PPCVLE, {BOP, BI, BH}},
+{"bclrl-", XLLK(19,16,1), XLBH_MASK, PPCCOM, PPCVLE|EXT, {BOM, BI, BH}},
+{"bclrl+", XLLK(19,16,1), XLBH_MASK, PPCCOM, PPCVLE|EXT, {BOP, BI, BH}},
{"bclrl", XLLK(19,16,1), XLBH_MASK, PPCCOM, PPCVLE, {BO, BI, BH}},
{"bcrl", XLLK(19,16,1), XLBH_MASK, PWRCOM, PPCVLE, {BO, BI, BH}},
{"rfid", XL(19,18), 0xffffffff, PPC64, PPCVLE, {0}},
-{"crnot", XL(19,33), XL_MASK, PPCCOM, PPCVLE, {BT, BAB}},
+{"crnot", XL(19,33), XL_MASK, PPCCOM, PPCVLE|EXT, {BT, BAB}},
{"crnor", XL(19,33), XL_MASK, COM, PPCVLE, {BT, BA, BB}},
-{"rfmci", X(19,38), 0xffffffff, PPCRFMCI|PPCA2|PPC476, PPCVLE, {0}},
+{"rfmci", X(19,38), 0xffffffff, PPCRFMCI|PPCA2|PPC476, PPCVLE, {0}},
{"rfdi", XL(19,39), 0xffffffff, E500MC, PPCVLE, {0}},
{"rfi", XL(19,50), 0xffffffff, COM, PPCVLE, {0}},
{"rfci", XL(19,51), 0xffffffff, PPC403|BOOKE|PPCE300|PPCA2|PPC476, PPCVLE, {0}},
@@ -5893,7 +5896,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"isync", XL(19,150), 0xffffffff, PPCCOM, PPCVLE, {0}},
{"ics", XL(19,150), 0xffffffff, PWRCOM, PPCVLE, {0}},
-{"crclr", XL(19,193), XL_MASK, PPCCOM, PPCVLE, {BTAB}},
+{"crclr", XL(19,193), XL_MASK, PPCCOM, PPCVLE|EXT, {BTAB}},
{"crxor", XL(19,193), XL_MASK, COM, PPCVLE, {BT, BA, BB}},
{"dnh", X(19,198), X_MASK, E500MC, PPCVLE, {DUI, DUIS}},
@@ -5904,7 +5907,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"hrfid", XL(19,274), 0xffffffff, POWER5|CELL, PPC476|PPCVLE, {0}},
-{"crset", XL(19,289), XL_MASK, PPCCOM, PPCVLE, {BTAB}},
+{"crset", XL(19,289), XL_MASK, PPCCOM, PPCVLE|EXT, {BTAB}},
{"creqv", XL(19,289), XL_MASK, COM, PPCVLE, {BT, BA, BB}},
{"urfid", XL(19,306), 0xffffffff, POWER9, PPCVLE, {0}},
@@ -5916,283 +5919,282 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"nap", XL(19,434), 0xffffffff, POWER6, POWER9|PPCVLE, {0}},
-{"crmove", XL(19,449), XL_MASK, PPCCOM, PPCVLE, {BT, BAB}},
+{"crmove", XL(19,449), XL_MASK, PPCCOM, PPCVLE|EXT, {BT, BAB}},
{"cror", XL(19,449), XL_MASK, COM, PPCVLE, {BT, BA, BB}},
{"sleep", XL(19,466), 0xffffffff, POWER6, POWER9|PPCVLE, {0}},
{"rvwinkle", XL(19,498), 0xffffffff, POWER6, POWER9|PPCVLE, {0}},
-{"bctr", XLO(19,BOU,528,0), XLBOBIBB_MASK, COM, PPCVLE, {BH}},
-{"bctrl", XLO(19,BOU,528,1), XLBOBIBB_MASK, COM, PPCVLE, {BH}},
-
-{"bgectr-", XLOCB(19,BOF,CBLT,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"bgectr+", XLOCB(19,BOFP,CBLT,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"bgectr", XLOCB(19,BOF,CBLT,528,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR, BH}},
-{"bnlctr-", XLOCB(19,BOF,CBLT,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"bnlctr+", XLOCB(19,BOFP,CBLT,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"bnlctr", XLOCB(19,BOF,CBLT,528,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR, BH}},
-{"bgectrl-",XLOCB(19,BOF,CBLT,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"bgectrl+",XLOCB(19,BOFP,CBLT,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"bgectrl", XLOCB(19,BOF,CBLT,528,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR, BH}},
-{"bnlctrl-",XLOCB(19,BOF,CBLT,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"bnlctrl+",XLOCB(19,BOFP,CBLT,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"bnlctrl", XLOCB(19,BOF,CBLT,528,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR, BH}},
-{"blectr-", XLOCB(19,BOF,CBGT,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"blectr+", XLOCB(19,BOFP,CBGT,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"blectr", XLOCB(19,BOF,CBGT,528,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR, BH}},
-{"bngctr-", XLOCB(19,BOF,CBGT,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"bngctr+", XLOCB(19,BOFP,CBGT,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"bngctr", XLOCB(19,BOF,CBGT,528,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR, BH}},
-{"blectrl-",XLOCB(19,BOF,CBGT,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"blectrl+",XLOCB(19,BOFP,CBGT,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"blectrl", XLOCB(19,BOF,CBGT,528,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR, BH}},
-{"bngctrl-",XLOCB(19,BOF,CBGT,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"bngctrl+",XLOCB(19,BOFP,CBGT,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"bngctrl", XLOCB(19,BOF,CBGT,528,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR, BH}},
-{"bnectr-", XLOCB(19,BOF,CBEQ,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"bnectr+", XLOCB(19,BOFP,CBEQ,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"bnectr", XLOCB(19,BOF,CBEQ,528,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR, BH}},
-{"bnectrl-",XLOCB(19,BOF,CBEQ,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"bnectrl+",XLOCB(19,BOFP,CBEQ,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"bnectrl", XLOCB(19,BOF,CBEQ,528,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR, BH}},
-{"bnsctr-", XLOCB(19,BOF,CBSO,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"bnsctr+", XLOCB(19,BOFP,CBSO,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"bnsctr", XLOCB(19,BOF,CBSO,528,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR, BH}},
-{"bnuctr-", XLOCB(19,BOF,CBSO,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"bnuctr+", XLOCB(19,BOFP,CBSO,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"bnuctr", XLOCB(19,BOF,CBSO,528,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR, BH}},
-{"bnsctrl-",XLOCB(19,BOF,CBSO,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"bnsctrl+",XLOCB(19,BOFP,CBSO,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"bnsctrl", XLOCB(19,BOF,CBSO,528,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR, BH}},
-{"bnuctrl-",XLOCB(19,BOF,CBSO,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"bnuctrl+",XLOCB(19,BOFP,CBSO,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"bnuctrl", XLOCB(19,BOF,CBSO,528,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR, BH}},
-{"bgectr-", XLOCB(19,BOFM4,CBLT,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"bnlctr-", XLOCB(19,BOFM4,CBLT,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"bgectrl-",XLOCB(19,BOFM4,CBLT,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"bnlctrl-",XLOCB(19,BOFM4,CBLT,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"blectr-", XLOCB(19,BOFM4,CBGT,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"bngctr-", XLOCB(19,BOFM4,CBGT,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"blectrl-",XLOCB(19,BOFM4,CBGT,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"bngctrl-",XLOCB(19,BOFM4,CBGT,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"bnectr-", XLOCB(19,BOFM4,CBEQ,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"bnectrl-",XLOCB(19,BOFM4,CBEQ,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"bnsctr-", XLOCB(19,BOFM4,CBSO,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"bnuctr-", XLOCB(19,BOFM4,CBSO,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"bnsctrl-",XLOCB(19,BOFM4,CBSO,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"bnuctrl-",XLOCB(19,BOFM4,CBSO,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"bgectr+", XLOCB(19,BOFP4,CBLT,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"bnlctr+", XLOCB(19,BOFP4,CBLT,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"bgectrl+",XLOCB(19,BOFP4,CBLT,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"bnlctrl+",XLOCB(19,BOFP4,CBLT,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"blectr+", XLOCB(19,BOFP4,CBGT,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"bngctr+", XLOCB(19,BOFP4,CBGT,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"blectrl+",XLOCB(19,BOFP4,CBGT,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"bngctrl+",XLOCB(19,BOFP4,CBGT,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"bnectr+", XLOCB(19,BOFP4,CBEQ,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"bnectrl+",XLOCB(19,BOFP4,CBEQ,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"bnsctr+", XLOCB(19,BOFP4,CBSO,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"bnuctr+", XLOCB(19,BOFP4,CBSO,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"bnsctrl+",XLOCB(19,BOFP4,CBSO,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"bnuctrl+",XLOCB(19,BOFP4,CBSO,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"bltctr-", XLOCB(19,BOT,CBLT,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"bltctr+", XLOCB(19,BOTP,CBLT,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"bltctr", XLOCB(19,BOT,CBLT,528,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR, BH}},
-{"bltctrl-",XLOCB(19,BOT,CBLT,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"bltctrl+",XLOCB(19,BOTP,CBLT,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"bltctrl", XLOCB(19,BOT,CBLT,528,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR, BH}},
-{"bgtctr-", XLOCB(19,BOT,CBGT,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"bgtctr+", XLOCB(19,BOTP,CBGT,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"bgtctr", XLOCB(19,BOT,CBGT,528,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR, BH}},
-{"bgtctrl-",XLOCB(19,BOT,CBGT,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"bgtctrl+",XLOCB(19,BOTP,CBGT,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"bgtctrl", XLOCB(19,BOT,CBGT,528,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR, BH}},
-{"beqctr-", XLOCB(19,BOT,CBEQ,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"beqctr+", XLOCB(19,BOTP,CBEQ,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"beqctr", XLOCB(19,BOT,CBEQ,528,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR, BH}},
-{"beqctrl-",XLOCB(19,BOT,CBEQ,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"beqctrl+",XLOCB(19,BOTP,CBEQ,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"beqctrl", XLOCB(19,BOT,CBEQ,528,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR, BH}},
-{"bsoctr-", XLOCB(19,BOT,CBSO,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"bsoctr+", XLOCB(19,BOTP,CBSO,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"bsoctr", XLOCB(19,BOT,CBSO,528,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR, BH}},
-{"bunctr-", XLOCB(19,BOT,CBSO,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"bunctr+", XLOCB(19,BOTP,CBSO,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"bunctr", XLOCB(19,BOT,CBSO,528,0), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR, BH}},
-{"bsoctrl-",XLOCB(19,BOT,CBSO,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"bsoctrl+",XLOCB(19,BOTP,CBSO,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"bsoctrl", XLOCB(19,BOT,CBSO,528,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR, BH}},
-{"bunctrl-",XLOCB(19,BOT,CBSO,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"bunctrl+",XLOCB(19,BOTP,CBSO,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE, {CR, BH}},
-{"bunctrl", XLOCB(19,BOT,CBSO,528,1), XLBOCBBB_MASK, PPCCOM, PPCVLE, {CR, BH}},
-{"bltctr-", XLOCB(19,BOTM4,CBLT,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"bltctrl-",XLOCB(19,BOTM4,CBLT,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"bgtctr-", XLOCB(19,BOTM4,CBGT,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"bgtctrl-",XLOCB(19,BOTM4,CBGT,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"beqctr-", XLOCB(19,BOTM4,CBEQ,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"beqctrl-",XLOCB(19,BOTM4,CBEQ,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"bsoctr-", XLOCB(19,BOTM4,CBSO,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"bunctr-", XLOCB(19,BOTM4,CBSO,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"bsoctrl-",XLOCB(19,BOTM4,CBSO,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"bunctrl-",XLOCB(19,BOTM4,CBSO,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"bltctr+", XLOCB(19,BOTP4,CBLT,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"bltctrl+",XLOCB(19,BOTP4,CBLT,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"bgtctr+", XLOCB(19,BOTP4,CBGT,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"bgtctrl+",XLOCB(19,BOTP4,CBGT,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"beqctr+", XLOCB(19,BOTP4,CBEQ,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"beqctrl+",XLOCB(19,BOTP4,CBEQ,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"bsoctr+", XLOCB(19,BOTP4,CBSO,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"bunctr+", XLOCB(19,BOTP4,CBSO,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"bsoctrl+",XLOCB(19,BOTP4,CBSO,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-{"bunctrl+",XLOCB(19,BOTP4,CBSO,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE, {CR, BH}},
-
-{"bfctr-", XLO(19,BOF,528,0), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BH}},
-{"bfctr+", XLO(19,BOFP,528,0), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BH}},
-{"bfctr", XLO(19,BOF,528,0), XLBOBB_MASK, PPCCOM, PPCVLE, {BI, BH}},
-{"bfctrl-", XLO(19,BOF,528,1), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BH}},
-{"bfctrl+", XLO(19,BOFP,528,1), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BH}},
-{"bfctrl", XLO(19,BOF,528,1), XLBOBB_MASK, PPCCOM, PPCVLE, {BI, BH}},
-{"bfctr-", XLO(19,BOFM4,528,0), XLBOBB_MASK, ISA_V2, PPCVLE, {BI, BH}},
-{"bfctrl-", XLO(19,BOFM4,528,1), XLBOBB_MASK, ISA_V2, PPCVLE, {BI, BH}},
-{"bfctr+", XLO(19,BOFP4,528,0), XLBOBB_MASK, ISA_V2, PPCVLE, {BI, BH}},
-{"bfctrl+", XLO(19,BOFP4,528,1), XLBOBB_MASK, ISA_V2, PPCVLE, {BI, BH}},
-{"btctr-", XLO(19,BOT,528,0), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BH}},
-{"btctr+", XLO(19,BOTP,528,0), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BH}},
-{"btctr", XLO(19,BOT,528,0), XLBOBB_MASK, PPCCOM, PPCVLE, {BI, BH}},
-{"btctrl-", XLO(19,BOT,528,1), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BH}},
-{"btctrl+", XLO(19,BOTP,528,1), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE, {BI, BH}},
-{"btctrl", XLO(19,BOT,528,1), XLBOBB_MASK, PPCCOM, PPCVLE, {BI, BH}},
-{"btctr-", XLO(19,BOTM4,528,0), XLBOBB_MASK, ISA_V2, PPCVLE, {BI, BH}},
-{"btctrl-", XLO(19,BOTM4,528,1), XLBOBB_MASK, ISA_V2, PPCVLE, {BI, BH}},
-{"btctr+", XLO(19,BOTP4,528,0), XLBOBB_MASK, ISA_V2, PPCVLE, {BI, BH}},
-{"btctrl+", XLO(19,BOTP4,528,1), XLBOBB_MASK, ISA_V2, PPCVLE, {BI, BH}},
-
-{"bcctr-", XLLK(19,528,0), XLBH_MASK, PPCCOM, PPCVLE, {BOM, BI, BH}},
-{"bcctr+", XLLK(19,528,0), XLBH_MASK, PPCCOM, PPCVLE, {BOP, BI, BH}},
+{"bctr", XLO(19,BOU,528,0), XLBOBIBB_MASK, COM, PPCVLE|EXT, {BH}},
+{"bctrl", XLO(19,BOU,528,1), XLBOBIBB_MASK, COM, PPCVLE|EXT, {BH}},
+{"bgectr-", XLOCB(19,BOF,CBLT,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"bgectr+", XLOCB(19,BOFP,CBLT,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"bgectr", XLOCB(19,BOF,CBLT,528,0), XLBOCBBB_MASK, PPCCOM, PPCVLE|EXT, {CR, BH}},
+{"bnlctr-", XLOCB(19,BOF,CBLT,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"bnlctr+", XLOCB(19,BOFP,CBLT,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"bnlctr", XLOCB(19,BOF,CBLT,528,0), XLBOCBBB_MASK, PPCCOM, PPCVLE|EXT, {CR, BH}},
+{"bgectrl-",XLOCB(19,BOF,CBLT,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"bgectrl+",XLOCB(19,BOFP,CBLT,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"bgectrl", XLOCB(19,BOF,CBLT,528,1), XLBOCBBB_MASK, PPCCOM, PPCVLE|EXT, {CR, BH}},
+{"bnlctrl-",XLOCB(19,BOF,CBLT,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"bnlctrl+",XLOCB(19,BOFP,CBLT,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"bnlctrl", XLOCB(19,BOF,CBLT,528,1), XLBOCBBB_MASK, PPCCOM, PPCVLE|EXT, {CR, BH}},
+{"blectr-", XLOCB(19,BOF,CBGT,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"blectr+", XLOCB(19,BOFP,CBGT,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"blectr", XLOCB(19,BOF,CBGT,528,0), XLBOCBBB_MASK, PPCCOM, PPCVLE|EXT, {CR, BH}},
+{"bngctr-", XLOCB(19,BOF,CBGT,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"bngctr+", XLOCB(19,BOFP,CBGT,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"bngctr", XLOCB(19,BOF,CBGT,528,0), XLBOCBBB_MASK, PPCCOM, PPCVLE|EXT, {CR, BH}},
+{"blectrl-",XLOCB(19,BOF,CBGT,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"blectrl+",XLOCB(19,BOFP,CBGT,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"blectrl", XLOCB(19,BOF,CBGT,528,1), XLBOCBBB_MASK, PPCCOM, PPCVLE|EXT, {CR, BH}},
+{"bngctrl-",XLOCB(19,BOF,CBGT,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"bngctrl+",XLOCB(19,BOFP,CBGT,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"bngctrl", XLOCB(19,BOF,CBGT,528,1), XLBOCBBB_MASK, PPCCOM, PPCVLE|EXT, {CR, BH}},
+{"bnectr-", XLOCB(19,BOF,CBEQ,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"bnectr+", XLOCB(19,BOFP,CBEQ,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"bnectr", XLOCB(19,BOF,CBEQ,528,0), XLBOCBBB_MASK, PPCCOM, PPCVLE|EXT, {CR, BH}},
+{"bnectrl-",XLOCB(19,BOF,CBEQ,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"bnectrl+",XLOCB(19,BOFP,CBEQ,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"bnectrl", XLOCB(19,BOF,CBEQ,528,1), XLBOCBBB_MASK, PPCCOM, PPCVLE|EXT, {CR, BH}},
+{"bnsctr-", XLOCB(19,BOF,CBSO,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"bnsctr+", XLOCB(19,BOFP,CBSO,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"bnsctr", XLOCB(19,BOF,CBSO,528,0), XLBOCBBB_MASK, PPCCOM, PPCVLE|EXT, {CR, BH}},
+{"bnuctr-", XLOCB(19,BOF,CBSO,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"bnuctr+", XLOCB(19,BOFP,CBSO,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"bnuctr", XLOCB(19,BOF,CBSO,528,0), XLBOCBBB_MASK, PPCCOM, PPCVLE|EXT, {CR, BH}},
+{"bnsctrl-",XLOCB(19,BOF,CBSO,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"bnsctrl+",XLOCB(19,BOFP,CBSO,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"bnsctrl", XLOCB(19,BOF,CBSO,528,1), XLBOCBBB_MASK, PPCCOM, PPCVLE|EXT, {CR, BH}},
+{"bnuctrl-",XLOCB(19,BOF,CBSO,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"bnuctrl+",XLOCB(19,BOFP,CBSO,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"bnuctrl", XLOCB(19,BOF,CBSO,528,1), XLBOCBBB_MASK, PPCCOM, PPCVLE|EXT, {CR, BH}},
+{"bgectr-", XLOCB(19,BOFM4,CBLT,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"bnlctr-", XLOCB(19,BOFM4,CBLT,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"bgectrl-",XLOCB(19,BOFM4,CBLT,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"bnlctrl-",XLOCB(19,BOFM4,CBLT,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"blectr-", XLOCB(19,BOFM4,CBGT,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"bngctr-", XLOCB(19,BOFM4,CBGT,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"blectrl-",XLOCB(19,BOFM4,CBGT,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"bngctrl-",XLOCB(19,BOFM4,CBGT,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"bnectr-", XLOCB(19,BOFM4,CBEQ,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"bnectrl-",XLOCB(19,BOFM4,CBEQ,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"bnsctr-", XLOCB(19,BOFM4,CBSO,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"bnuctr-", XLOCB(19,BOFM4,CBSO,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"bnsctrl-",XLOCB(19,BOFM4,CBSO,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"bnuctrl-",XLOCB(19,BOFM4,CBSO,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"bgectr+", XLOCB(19,BOFP4,CBLT,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"bnlctr+", XLOCB(19,BOFP4,CBLT,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"bgectrl+",XLOCB(19,BOFP4,CBLT,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"bnlctrl+",XLOCB(19,BOFP4,CBLT,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"blectr+", XLOCB(19,BOFP4,CBGT,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"bngctr+", XLOCB(19,BOFP4,CBGT,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"blectrl+",XLOCB(19,BOFP4,CBGT,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"bngctrl+",XLOCB(19,BOFP4,CBGT,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"bnectr+", XLOCB(19,BOFP4,CBEQ,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"bnectrl+",XLOCB(19,BOFP4,CBEQ,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"bnsctr+", XLOCB(19,BOFP4,CBSO,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"bnuctr+", XLOCB(19,BOFP4,CBSO,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"bnsctrl+",XLOCB(19,BOFP4,CBSO,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"bnuctrl+",XLOCB(19,BOFP4,CBSO,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"bltctr-", XLOCB(19,BOT,CBLT,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"bltctr+", XLOCB(19,BOTP,CBLT,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"bltctr", XLOCB(19,BOT,CBLT,528,0), XLBOCBBB_MASK, PPCCOM, PPCVLE|EXT, {CR, BH}},
+{"bltctrl-",XLOCB(19,BOT,CBLT,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"bltctrl+",XLOCB(19,BOTP,CBLT,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"bltctrl", XLOCB(19,BOT,CBLT,528,1), XLBOCBBB_MASK, PPCCOM, PPCVLE|EXT, {CR, BH}},
+{"bgtctr-", XLOCB(19,BOT,CBGT,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"bgtctr+", XLOCB(19,BOTP,CBGT,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"bgtctr", XLOCB(19,BOT,CBGT,528,0), XLBOCBBB_MASK, PPCCOM, PPCVLE|EXT, {CR, BH}},
+{"bgtctrl-",XLOCB(19,BOT,CBGT,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"bgtctrl+",XLOCB(19,BOTP,CBGT,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"bgtctrl", XLOCB(19,BOT,CBGT,528,1), XLBOCBBB_MASK, PPCCOM, PPCVLE|EXT, {CR, BH}},
+{"beqctr-", XLOCB(19,BOT,CBEQ,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"beqctr+", XLOCB(19,BOTP,CBEQ,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"beqctr", XLOCB(19,BOT,CBEQ,528,0), XLBOCBBB_MASK, PPCCOM, PPCVLE|EXT, {CR, BH}},
+{"beqctrl-",XLOCB(19,BOT,CBEQ,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"beqctrl+",XLOCB(19,BOTP,CBEQ,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"beqctrl", XLOCB(19,BOT,CBEQ,528,1), XLBOCBBB_MASK, PPCCOM, PPCVLE|EXT, {CR, BH}},
+{"bsoctr-", XLOCB(19,BOT,CBSO,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"bsoctr+", XLOCB(19,BOTP,CBSO,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"bsoctr", XLOCB(19,BOT,CBSO,528,0), XLBOCBBB_MASK, PPCCOM, PPCVLE|EXT, {CR, BH}},
+{"bunctr-", XLOCB(19,BOT,CBSO,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"bunctr+", XLOCB(19,BOTP,CBSO,528,0), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"bunctr", XLOCB(19,BOT,CBSO,528,0), XLBOCBBB_MASK, PPCCOM, PPCVLE|EXT, {CR, BH}},
+{"bsoctrl-",XLOCB(19,BOT,CBSO,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"bsoctrl+",XLOCB(19,BOTP,CBSO,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"bsoctrl", XLOCB(19,BOT,CBSO,528,1), XLBOCBBB_MASK, PPCCOM, PPCVLE|EXT, {CR, BH}},
+{"bunctrl-",XLOCB(19,BOT,CBSO,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"bunctrl+",XLOCB(19,BOTP,CBSO,528,1), XLBOCBBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {CR, BH}},
+{"bunctrl", XLOCB(19,BOT,CBSO,528,1), XLBOCBBB_MASK, PPCCOM, PPCVLE|EXT, {CR, BH}},
+{"bltctr-", XLOCB(19,BOTM4,CBLT,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"bltctrl-",XLOCB(19,BOTM4,CBLT,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"bgtctr-", XLOCB(19,BOTM4,CBGT,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"bgtctrl-",XLOCB(19,BOTM4,CBGT,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"beqctr-", XLOCB(19,BOTM4,CBEQ,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"beqctrl-",XLOCB(19,BOTM4,CBEQ,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"bsoctr-", XLOCB(19,BOTM4,CBSO,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"bunctr-", XLOCB(19,BOTM4,CBSO,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"bsoctrl-",XLOCB(19,BOTM4,CBSO,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"bunctrl-",XLOCB(19,BOTM4,CBSO,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"bltctr+", XLOCB(19,BOTP4,CBLT,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"bltctrl+",XLOCB(19,BOTP4,CBLT,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"bgtctr+", XLOCB(19,BOTP4,CBGT,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"bgtctrl+",XLOCB(19,BOTP4,CBGT,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"beqctr+", XLOCB(19,BOTP4,CBEQ,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"beqctrl+",XLOCB(19,BOTP4,CBEQ,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"bsoctr+", XLOCB(19,BOTP4,CBSO,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"bunctr+", XLOCB(19,BOTP4,CBSO,528,0), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"bsoctrl+",XLOCB(19,BOTP4,CBSO,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+{"bunctrl+",XLOCB(19,BOTP4,CBSO,528,1), XLBOCBBB_MASK, ISA_V2, PPCVLE|EXT, {CR, BH}},
+
+{"bfctr-", XLO(19,BOF,528,0), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {BI, BH}},
+{"bfctr+", XLO(19,BOFP,528,0), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {BI, BH}},
+{"bfctr", XLO(19,BOF,528,0), XLBOBB_MASK, PPCCOM, PPCVLE|EXT, {BI, BH}},
+{"bfctrl-", XLO(19,BOF,528,1), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {BI, BH}},
+{"bfctrl+", XLO(19,BOFP,528,1), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {BI, BH}},
+{"bfctrl", XLO(19,BOF,528,1), XLBOBB_MASK, PPCCOM, PPCVLE|EXT, {BI, BH}},
+{"bfctr-", XLO(19,BOFM4,528,0), XLBOBB_MASK, ISA_V2, PPCVLE|EXT, {BI, BH}},
+{"bfctrl-", XLO(19,BOFM4,528,1), XLBOBB_MASK, ISA_V2, PPCVLE|EXT, {BI, BH}},
+{"bfctr+", XLO(19,BOFP4,528,0), XLBOBB_MASK, ISA_V2, PPCVLE|EXT, {BI, BH}},
+{"bfctrl+", XLO(19,BOFP4,528,1), XLBOBB_MASK, ISA_V2, PPCVLE|EXT, {BI, BH}},
+{"btctr-", XLO(19,BOT,528,0), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {BI, BH}},
+{"btctr+", XLO(19,BOTP,528,0), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {BI, BH}},
+{"btctr", XLO(19,BOT,528,0), XLBOBB_MASK, PPCCOM, PPCVLE|EXT, {BI, BH}},
+{"btctrl-", XLO(19,BOT,528,1), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {BI, BH}},
+{"btctrl+", XLO(19,BOTP,528,1), XLBOBB_MASK, PPCCOM, ISA_V2|PPCVLE|EXT, {BI, BH}},
+{"btctrl", XLO(19,BOT,528,1), XLBOBB_MASK, PPCCOM, PPCVLE|EXT, {BI, BH}},
+{"btctr-", XLO(19,BOTM4,528,0), XLBOBB_MASK, ISA_V2, PPCVLE|EXT, {BI, BH}},
+{"btctrl-", XLO(19,BOTM4,528,1), XLBOBB_MASK, ISA_V2, PPCVLE|EXT, {BI, BH}},
+{"btctr+", XLO(19,BOTP4,528,0), XLBOBB_MASK, ISA_V2, PPCVLE|EXT, {BI, BH}},
+{"btctrl+", XLO(19,BOTP4,528,1), XLBOBB_MASK, ISA_V2, PPCVLE|EXT, {BI, BH}},
+
+{"bcctr-", XLLK(19,528,0), XLBH_MASK, PPCCOM, PPCVLE|EXT, {BOM, BI, BH}},
+{"bcctr+", XLLK(19,528,0), XLBH_MASK, PPCCOM, PPCVLE|EXT, {BOP, BI, BH}},
{"bcctr", XLLK(19,528,0), XLBH_MASK, PPCCOM, PPCVLE, {BO, BI, BH}},
{"bcc", XLLK(19,528,0), XLBH_MASK, PWRCOM, PPCVLE, {BO, BI, BH}},
-{"bcctrl-", XLLK(19,528,1), XLBH_MASK, PPCCOM, PPCVLE, {BOM, BI, BH}},
-{"bcctrl+", XLLK(19,528,1), XLBH_MASK, PPCCOM, PPCVLE, {BOP, BI, BH}},
+{"bcctrl-", XLLK(19,528,1), XLBH_MASK, PPCCOM, PPCVLE|EXT, {BOM, BI, BH}},
+{"bcctrl+", XLLK(19,528,1), XLBH_MASK, PPCCOM, PPCVLE|EXT, {BOP, BI, BH}},
{"bcctrl", XLLK(19,528,1), XLBH_MASK, PPCCOM, PPCVLE, {BO, BI, BH}},
{"bccl", XLLK(19,528,1), XLBH_MASK, PWRCOM, PPCVLE, {BO, BI, BH}},
-{"bdnztar", XLO(19,BODNZ,560,0), XLBOBIBB_MASK, POWER8, PPCVLE, {BH}},
-{"bdnztarl", XLO(19,BODNZ,560,1), XLBOBIBB_MASK, POWER8, PPCVLE, {BH}},
-{"bdztar", XLO(19,BODZ,560,0), XLBOBIBB_MASK, POWER8, PPCVLE, {BH}},
-{"bdztarl", XLO(19,BODZ,560,1), XLBOBIBB_MASK, POWER8, PPCVLE, {BH}},
-{"btar", XLO(19,BOU,560,0), XLBOBIBB_MASK, POWER8, PPCVLE, {BH}},
-{"btarl", XLO(19,BOU,560,1), XLBOBIBB_MASK, POWER8, PPCVLE, {BH}},
-{"bdnztar-", XLO(19,BODNZM4,560,0), XLBOBIBB_MASK, POWER8, PPCVLE, {BH}},
-{"bdnztarl-", XLO(19,BODNZM4,560,1), XLBOBIBB_MASK, POWER8, PPCVLE, {BH}},
-{"bdnztar+", XLO(19,BODNZP4,560,0), XLBOBIBB_MASK, POWER8, PPCVLE, {BH}},
-{"bdnztarl+", XLO(19,BODNZP4,560,1), XLBOBIBB_MASK, POWER8, PPCVLE, {BH}},
-{"bdztar-", XLO(19,BODZM4,560,0), XLBOBIBB_MASK, POWER8, PPCVLE, {BH}},
-{"bdztarl-", XLO(19,BODZM4,560,1), XLBOBIBB_MASK, POWER8, PPCVLE, {BH}},
-{"bdztar+", XLO(19,BODZP4,560,0), XLBOBIBB_MASK, POWER8, PPCVLE, {BH}},
-{"bdztarl+", XLO(19,BODZP4,560,1), XLBOBIBB_MASK, POWER8, PPCVLE, {BH}},
-
-{"bgetar", XLOCB(19,BOF,CBLT,560,0), XLBOCBBB_MASK, POWER8, PPCVLE, {CR, BH}},
-{"bnltar", XLOCB(19,BOF,CBLT,560,0), XLBOCBBB_MASK, POWER8, PPCVLE, {CR, BH}},
-{"bgetarl", XLOCB(19,BOF,CBLT,560,1), XLBOCBBB_MASK, POWER8, PPCVLE, {CR, BH}},
-{"bnltarl", XLOCB(19,BOF,CBLT,560,1), XLBOCBBB_MASK, POWER8, PPCVLE, {CR, BH}},
-{"bletar", XLOCB(19,BOF,CBGT,560,0), XLBOCBBB_MASK, POWER8, PPCVLE, {CR, BH}},
-{"bngtar", XLOCB(19,BOF,CBGT,560,0), XLBOCBBB_MASK, POWER8, PPCVLE, {CR, BH}},
-{"bletarl", XLOCB(19,BOF,CBGT,560,1), XLBOCBBB_MASK, POWER8, PPCVLE, {CR, BH}},
-{"bngtarl", XLOCB(19,BOF,CBGT,560,1), XLBOCBBB_MASK, POWER8, PPCVLE, {CR, BH}},
-{"bnetar", XLOCB(19,BOF,CBEQ,560,0), XLBOCBBB_MASK, POWER8, PPCVLE, {CR, BH}},
-{"bnetarl", XLOCB(19,BOF,CBEQ,560,1), XLBOCBBB_MASK, POWER8, PPCVLE, {CR, BH}},
-{"bnstar", XLOCB(19,BOF,CBSO,560,0), XLBOCBBB_MASK, POWER8, PPCVLE, {CR, BH}},
-{"bnutar", XLOCB(19,BOF,CBSO,560,0), XLBOCBBB_MASK, POWER8, PPCVLE, {CR, BH}},
-{"bnstarl", XLOCB(19,BOF,CBSO,560,1), XLBOCBBB_MASK, POWER8, PPCVLE, {CR, BH}},
-{"bnutarl", XLOCB(19,BOF,CBSO,560,1), XLBOCBBB_MASK, POWER8, PPCVLE, {CR, BH}},
-{"bgetar-", XLOCB(19,BOFM4,CBLT,560,0), XLBOCBBB_MASK, POWER8, PPCVLE, {CR, BH}},
-{"bnltar-", XLOCB(19,BOFM4,CBLT,560,0), XLBOCBBB_MASK, POWER8, PPCVLE, {CR, BH}},
-{"bgetarl-",XLOCB(19,BOFM4,CBLT,560,1), XLBOCBBB_MASK, POWER8, PPCVLE, {CR, BH}},
-{"bnltarl-",XLOCB(19,BOFM4,CBLT,560,1), XLBOCBBB_MASK, POWER8, PPCVLE, {CR, BH}},
-{"bletar-", XLOCB(19,BOFM4,CBGT,560,0), XLBOCBBB_MASK, POWER8, PPCVLE, {CR, BH}},
-{"bngtar-", XLOCB(19,BOFM4,CBGT,560,0), XLBOCBBB_MASK, POWER8, PPCVLE, {CR, BH}},
-{"bletarl-",XLOCB(19,BOFM4,CBGT,560,1), XLBOCBBB_MASK, POWER8, PPCVLE, {CR, BH}},
-{"bngtarl-",XLOCB(19,BOFM4,CBGT,560,1), XLBOCBBB_MASK, POWER8, PPCVLE, {CR, BH}},
-{"bnetar-", XLOCB(19,BOFM4,CBEQ,560,0), XLBOCBBB_MASK, POWER8, PPCVLE, {CR, BH}},
-{"bnetarl-",XLOCB(19,BOFM4,CBEQ,560,1), XLBOCBBB_MASK, POWER8, PPCVLE, {CR, BH}},
-{"bnstar-", XLOCB(19,BOFM4,CBSO,560,0), XLBOCBBB_MASK, POWER8, PPCVLE, {CR, BH}},
-{"bnutar-", XLOCB(19,BOFM4,CBSO,560,0), XLBOCBBB_MASK, POWER8, PPCVLE, {CR, BH}},
-{"bnstarl-",XLOCB(19,BOFM4,CBSO,560,1), XLBOCBBB_MASK, POWER8, PPCVLE, {CR, BH}},
-{"bnutarl-",XLOCB(19,BOFM4,CBSO,560,1), XLBOCBBB_MASK, POWER8, PPCVLE, {CR, BH}},
-{"bgetar+", XLOCB(19,BOFP4,CBLT,560,0), XLBOCBBB_MASK, POWER8, PPCVLE, {CR, BH}},
-{"bnltar+", XLOCB(19,BOFP4,CBLT,560,0), XLBOCBBB_MASK, POWER8, PPCVLE, {CR, BH}},
-{"bgetarl+",XLOCB(19,BOFP4,CBLT,560,1), XLBOCBBB_MASK, POWER8, PPCVLE, {CR, BH}},
-{"bnltarl+",XLOCB(19,BOFP4,CBLT,560,1), XLBOCBBB_MASK, POWER8, PPCVLE, {CR, BH}},
-{"bletar+", XLOCB(19,BOFP4,CBGT,560,0), XLBOCBBB_MASK, POWER8, PPCVLE, {CR, BH}},
-{"bngtar+", XLOCB(19,BOFP4,CBGT,560,0), XLBOCBBB_MASK, POWER8, PPCVLE, {CR, BH}},
-{"bletarl+",XLOCB(19,BOFP4,CBGT,560,1), XLBOCBBB_MASK, POWER8, PPCVLE, {CR, BH}},
-{"bngtarl+",XLOCB(19,BOFP4,CBGT,560,1), XLBOCBBB_MASK, POWER8, PPCVLE, {CR, BH}},
-{"bnetar+", XLOCB(19,BOFP4,CBEQ,560,0), XLBOCBBB_MASK, POWER8, PPCVLE, {CR, BH}},
-{"bnetarl+",XLOCB(19,BOFP4,CBEQ,560,1), XLBOCBBB_MASK, POWER8, PPCVLE, {CR, BH}},
-{"bnstar+", XLOCB(19,BOFP4,CBSO,560,0), XLBOCBBB_MASK, POWER8, PPCVLE, {CR, BH}},
-{"bnutar+", XLOCB(19,BOFP4,CBSO,560,0), XLBOCBBB_MASK, POWER8, PPCVLE, {CR, BH}},
-{"bnstarl+",XLOCB(19,BOFP4,CBSO,560,1), XLBOCBBB_MASK, POWER8, PPCVLE, {CR, BH}},
-{"bnutarl+",XLOCB(19,BOFP4,CBSO,560,1), XLBOCBBB_MASK, POWER8, PPCVLE, {CR, BH}},
-{"blttar", XLOCB(19,BOT,CBLT,560,0), XLBOCBBB_MASK, POWER8, PPCVLE, {CR, BH}},
-{"blttarl", XLOCB(19,BOT,CBLT,560,1), XLBOCBBB_MASK, POWER8, PPCVLE, {CR, BH}},
-{"bgttar", XLOCB(19,BOT,CBGT,560,0), XLBOCBBB_MASK, POWER8, PPCVLE, {CR, BH}},
-{"bgttarl", XLOCB(19,BOT,CBGT,560,1), XLBOCBBB_MASK, POWER8, PPCVLE, {CR, BH}},
-{"beqtar", XLOCB(19,BOT,CBEQ,560,0), XLBOCBBB_MASK, POWER8, PPCVLE, {CR, BH}},
-{"beqtarl", XLOCB(19,BOT,CBEQ,560,1), XLBOCBBB_MASK, POWER8, PPCVLE, {CR, BH}},
-{"bsotar", XLOCB(19,BOT,CBSO,560,0), XLBOCBBB_MASK, POWER8, PPCVLE, {CR, BH}},
-{"buntar", XLOCB(19,BOT,CBSO,560,0), XLBOCBBB_MASK, POWER8, PPCVLE, {CR, BH}},
-{"bsotarl", XLOCB(19,BOT,CBSO,560,1), XLBOCBBB_MASK, POWER8, PPCVLE, {CR, BH}},
-{"buntarl", XLOCB(19,BOT,CBSO,560,1), XLBOCBBB_MASK, POWER8, PPCVLE, {CR, BH}},
-{"blttar-", XLOCB(19,BOTM4,CBLT,560,0), XLBOCBBB_MASK, POWER8, PPCVLE, {CR, BH}},
-{"blttarl-",XLOCB(19,BOTM4,CBLT,560,1), XLBOCBBB_MASK, POWER8, PPCVLE, {CR, BH}},
-{"bgttar-", XLOCB(19,BOTM4,CBGT,560,0), XLBOCBBB_MASK, POWER8, PPCVLE, {CR, BH}},
-{"bgttarl-",XLOCB(19,BOTM4,CBGT,560,1), XLBOCBBB_MASK, POWER8, PPCVLE, {CR, BH}},
-{"beqtar-", XLOCB(19,BOTM4,CBEQ,560,0), XLBOCBBB_MASK, POWER8, PPCVLE, {CR, BH}},
-{"beqtarl-",XLOCB(19,BOTM4,CBEQ,560,1), XLBOCBBB_MASK, POWER8, PPCVLE, {CR, BH}},
-{"bsotar-", XLOCB(19,BOTM4,CBSO,560,0), XLBOCBBB_MASK, POWER8, PPCVLE, {CR, BH}},
-{"buntar-", XLOCB(19,BOTM4,CBSO,560,0), XLBOCBBB_MASK, POWER8, PPCVLE, {CR, BH}},
-{"bsotarl-",XLOCB(19,BOTM4,CBSO,560,1), XLBOCBBB_MASK, POWER8, PPCVLE, {CR, BH}},
-{"buntarl-",XLOCB(19,BOTM4,CBSO,560,1), XLBOCBBB_MASK, POWER8, PPCVLE, {CR, BH}},
-{"blttar+", XLOCB(19,BOTP4,CBLT,560,0), XLBOCBBB_MASK, POWER8, PPCVLE, {CR, BH}},
-{"blttarl+",XLOCB(19,BOTP4,CBLT,560,1), XLBOCBBB_MASK, POWER8, PPCVLE, {CR, BH}},
-{"bgttar+", XLOCB(19,BOTP4,CBGT,560,0), XLBOCBBB_MASK, POWER8, PPCVLE, {CR, BH}},
-{"bgttarl+",XLOCB(19,BOTP4,CBGT,560,1), XLBOCBBB_MASK, POWER8, PPCVLE, {CR, BH}},
-{"beqtar+", XLOCB(19,BOTP4,CBEQ,560,0), XLBOCBBB_MASK, POWER8, PPCVLE, {CR, BH}},
-{"beqtarl+",XLOCB(19,BOTP4,CBEQ,560,1), XLBOCBBB_MASK, POWER8, PPCVLE, {CR, BH}},
-{"bsotar+", XLOCB(19,BOTP4,CBSO,560,0), XLBOCBBB_MASK, POWER8, PPCVLE, {CR, BH}},
-{"buntar+", XLOCB(19,BOTP4,CBSO,560,0), XLBOCBBB_MASK, POWER8, PPCVLE, {CR, BH}},
-{"bsotarl+",XLOCB(19,BOTP4,CBSO,560,1), XLBOCBBB_MASK, POWER8, PPCVLE, {CR, BH}},
-{"buntarl+",XLOCB(19,BOTP4,CBSO,560,1), XLBOCBBB_MASK, POWER8, PPCVLE, {CR, BH}},
-
-{"bdnzftar", XLO(19,BODNZF,560,0), XLBOBB_MASK, POWER8, PPCVLE, {BI, BH}},
-{"bdnzftarl", XLO(19,BODNZF,560,1), XLBOBB_MASK, POWER8, PPCVLE, {BI, BH}},
-{"bdzftar", XLO(19,BODZF,560,0), XLBOBB_MASK, POWER8, PPCVLE, {BI, BH}},
-{"bdzftarl", XLO(19,BODZF,560,1), XLBOBB_MASK, POWER8, PPCVLE, {BI, BH}},
-
-{"bftar", XLO(19,BOF,560,0), XLBOBB_MASK, POWER8, PPCVLE, {BI, BH}},
-{"bftarl", XLO(19,BOF,560,1), XLBOBB_MASK, POWER8, PPCVLE, {BI, BH}},
-{"bftar-", XLO(19,BOFM4,560,0), XLBOBB_MASK, POWER8, PPCVLE, {BI, BH}},
-{"bftarl-", XLO(19,BOFM4,560,1), XLBOBB_MASK, POWER8, PPCVLE, {BI, BH}},
-{"bftar+", XLO(19,BOFP4,560,0), XLBOBB_MASK, POWER8, PPCVLE, {BI, BH}},
-{"bftarl+", XLO(19,BOFP4,560,1), XLBOBB_MASK, POWER8, PPCVLE, {BI, BH}},
-
-{"bdnzttar", XLO(19,BODNZT,560,0), XLBOBB_MASK, POWER8, PPCVLE, {BI, BH}},
-{"bdnzttarl", XLO(19,BODNZT,560,1), XLBOBB_MASK, POWER8, PPCVLE, {BI, BH}},
-{"bdzttar", XLO(19,BODZT,560,0), XLBOBB_MASK, POWER8, PPCVLE, {BI, BH}},
-{"bdzttarl", XLO(19,BODZT,560,1), XLBOBB_MASK, POWER8, PPCVLE, {BI, BH}},
-
-{"bttar", XLO(19,BOT,560,0), XLBOBB_MASK, POWER8, PPCVLE, {BI, BH}},
-{"bttarl", XLO(19,BOT,560,1), XLBOBB_MASK, POWER8, PPCVLE, {BI, BH}},
-{"bttar-", XLO(19,BOTM4,560,0), XLBOBB_MASK, POWER8, PPCVLE, {BI, BH}},
-{"bttarl-", XLO(19,BOTM4,560,1), XLBOBB_MASK, POWER8, PPCVLE, {BI, BH}},
-{"bttar+", XLO(19,BOTP4,560,0), XLBOBB_MASK, POWER8, PPCVLE, {BI, BH}},
-{"bttarl+", XLO(19,BOTP4,560,1), XLBOBB_MASK, POWER8, PPCVLE, {BI, BH}},
-
-{"bctar-", XLLK(19,560,0), XLBH_MASK, POWER8, PPCVLE, {BOM, BI, BH}},
-{"bctar+", XLLK(19,560,0), XLBH_MASK, POWER8, PPCVLE, {BOP, BI, BH}},
+{"bdnztar", XLO(19,BODNZ,560,0), XLBOBIBB_MASK, POWER8, PPCVLE|EXT, {BH}},
+{"bdnztarl", XLO(19,BODNZ,560,1), XLBOBIBB_MASK, POWER8, PPCVLE|EXT, {BH}},
+{"bdztar", XLO(19,BODZ,560,0), XLBOBIBB_MASK, POWER8, PPCVLE|EXT, {BH}},
+{"bdztarl", XLO(19,BODZ,560,1), XLBOBIBB_MASK, POWER8, PPCVLE|EXT, {BH}},
+{"btar", XLO(19,BOU,560,0), XLBOBIBB_MASK, POWER8, PPCVLE|EXT, {BH}},
+{"btarl", XLO(19,BOU,560,1), XLBOBIBB_MASK, POWER8, PPCVLE|EXT, {BH}},
+{"bdnztar-", XLO(19,BODNZM4,560,0), XLBOBIBB_MASK, POWER8, PPCVLE|EXT, {BH}},
+{"bdnztarl-", XLO(19,BODNZM4,560,1), XLBOBIBB_MASK, POWER8, PPCVLE|EXT, {BH}},
+{"bdnztar+", XLO(19,BODNZP4,560,0), XLBOBIBB_MASK, POWER8, PPCVLE|EXT, {BH}},
+{"bdnztarl+", XLO(19,BODNZP4,560,1), XLBOBIBB_MASK, POWER8, PPCVLE|EXT, {BH}},
+{"bdztar-", XLO(19,BODZM4,560,0), XLBOBIBB_MASK, POWER8, PPCVLE|EXT, {BH}},
+{"bdztarl-", XLO(19,BODZM4,560,1), XLBOBIBB_MASK, POWER8, PPCVLE|EXT, {BH}},
+{"bdztar+", XLO(19,BODZP4,560,0), XLBOBIBB_MASK, POWER8, PPCVLE|EXT, {BH}},
+{"bdztarl+", XLO(19,BODZP4,560,1), XLBOBIBB_MASK, POWER8, PPCVLE|EXT, {BH}},
+
+{"bgetar", XLOCB(19,BOF,CBLT,560,0), XLBOCBBB_MASK, POWER8, PPCVLE|EXT, {CR, BH}},
+{"bnltar", XLOCB(19,BOF,CBLT,560,0), XLBOCBBB_MASK, POWER8, PPCVLE|EXT, {CR, BH}},
+{"bgetarl", XLOCB(19,BOF,CBLT,560,1), XLBOCBBB_MASK, POWER8, PPCVLE|EXT, {CR, BH}},
+{"bnltarl", XLOCB(19,BOF,CBLT,560,1), XLBOCBBB_MASK, POWER8, PPCVLE|EXT, {CR, BH}},
+{"bletar", XLOCB(19,BOF,CBGT,560,0), XLBOCBBB_MASK, POWER8, PPCVLE|EXT, {CR, BH}},
+{"bngtar", XLOCB(19,BOF,CBGT,560,0), XLBOCBBB_MASK, POWER8, PPCVLE|EXT, {CR, BH}},
+{"bletarl", XLOCB(19,BOF,CBGT,560,1), XLBOCBBB_MASK, POWER8, PPCVLE|EXT, {CR, BH}},
+{"bngtarl", XLOCB(19,BOF,CBGT,560,1), XLBOCBBB_MASK, POWER8, PPCVLE|EXT, {CR, BH}},
+{"bnetar", XLOCB(19,BOF,CBEQ,560,0), XLBOCBBB_MASK, POWER8, PPCVLE|EXT, {CR, BH}},
+{"bnetarl", XLOCB(19,BOF,CBEQ,560,1), XLBOCBBB_MASK, POWER8, PPCVLE|EXT, {CR, BH}},
+{"bnstar", XLOCB(19,BOF,CBSO,560,0), XLBOCBBB_MASK, POWER8, PPCVLE|EXT, {CR, BH}},
+{"bnutar", XLOCB(19,BOF,CBSO,560,0), XLBOCBBB_MASK, POWER8, PPCVLE|EXT, {CR, BH}},
+{"bnstarl", XLOCB(19,BOF,CBSO,560,1), XLBOCBBB_MASK, POWER8, PPCVLE|EXT, {CR, BH}},
+{"bnutarl", XLOCB(19,BOF,CBSO,560,1), XLBOCBBB_MASK, POWER8, PPCVLE|EXT, {CR, BH}},
+{"bgetar-", XLOCB(19,BOFM4,CBLT,560,0), XLBOCBBB_MASK, POWER8, PPCVLE|EXT, {CR, BH}},
+{"bnltar-", XLOCB(19,BOFM4,CBLT,560,0), XLBOCBBB_MASK, POWER8, PPCVLE|EXT, {CR, BH}},
+{"bgetarl-",XLOCB(19,BOFM4,CBLT,560,1), XLBOCBBB_MASK, POWER8, PPCVLE|EXT, {CR, BH}},
+{"bnltarl-",XLOCB(19,BOFM4,CBLT,560,1), XLBOCBBB_MASK, POWER8, PPCVLE|EXT, {CR, BH}},
+{"bletar-", XLOCB(19,BOFM4,CBGT,560,0), XLBOCBBB_MASK, POWER8, PPCVLE|EXT, {CR, BH}},
+{"bngtar-", XLOCB(19,BOFM4,CBGT,560,0), XLBOCBBB_MASK, POWER8, PPCVLE|EXT, {CR, BH}},
+{"bletarl-",XLOCB(19,BOFM4,CBGT,560,1), XLBOCBBB_MASK, POWER8, PPCVLE|EXT, {CR, BH}},
+{"bngtarl-",XLOCB(19,BOFM4,CBGT,560,1), XLBOCBBB_MASK, POWER8, PPCVLE|EXT, {CR, BH}},
+{"bnetar-", XLOCB(19,BOFM4,CBEQ,560,0), XLBOCBBB_MASK, POWER8, PPCVLE|EXT, {CR, BH}},
+{"bnetarl-",XLOCB(19,BOFM4,CBEQ,560,1), XLBOCBBB_MASK, POWER8, PPCVLE|EXT, {CR, BH}},
+{"bnstar-", XLOCB(19,BOFM4,CBSO,560,0), XLBOCBBB_MASK, POWER8, PPCVLE|EXT, {CR, BH}},
+{"bnutar-", XLOCB(19,BOFM4,CBSO,560,0), XLBOCBBB_MASK, POWER8, PPCVLE|EXT, {CR, BH}},
+{"bnstarl-",XLOCB(19,BOFM4,CBSO,560,1), XLBOCBBB_MASK, POWER8, PPCVLE|EXT, {CR, BH}},
+{"bnutarl-",XLOCB(19,BOFM4,CBSO,560,1), XLBOCBBB_MASK, POWER8, PPCVLE|EXT, {CR, BH}},
+{"bgetar+", XLOCB(19,BOFP4,CBLT,560,0), XLBOCBBB_MASK, POWER8, PPCVLE|EXT, {CR, BH}},
+{"bnltar+", XLOCB(19,BOFP4,CBLT,560,0), XLBOCBBB_MASK, POWER8, PPCVLE|EXT, {CR, BH}},
+{"bgetarl+",XLOCB(19,BOFP4,CBLT,560,1), XLBOCBBB_MASK, POWER8, PPCVLE|EXT, {CR, BH}},
+{"bnltarl+",XLOCB(19,BOFP4,CBLT,560,1), XLBOCBBB_MASK, POWER8, PPCVLE|EXT, {CR, BH}},
+{"bletar+", XLOCB(19,BOFP4,CBGT,560,0), XLBOCBBB_MASK, POWER8, PPCVLE|EXT, {CR, BH}},
+{"bngtar+", XLOCB(19,BOFP4,CBGT,560,0), XLBOCBBB_MASK, POWER8, PPCVLE|EXT, {CR, BH}},
+{"bletarl+",XLOCB(19,BOFP4,CBGT,560,1), XLBOCBBB_MASK, POWER8, PPCVLE|EXT, {CR, BH}},
+{"bngtarl+",XLOCB(19,BOFP4,CBGT,560,1), XLBOCBBB_MASK, POWER8, PPCVLE|EXT, {CR, BH}},
+{"bnetar+", XLOCB(19,BOFP4,CBEQ,560,0), XLBOCBBB_MASK, POWER8, PPCVLE|EXT, {CR, BH}},
+{"bnetarl+",XLOCB(19,BOFP4,CBEQ,560,1), XLBOCBBB_MASK, POWER8, PPCVLE|EXT, {CR, BH}},
+{"bnstar+", XLOCB(19,BOFP4,CBSO,560,0), XLBOCBBB_MASK, POWER8, PPCVLE|EXT, {CR, BH}},
+{"bnutar+", XLOCB(19,BOFP4,CBSO,560,0), XLBOCBBB_MASK, POWER8, PPCVLE|EXT, {CR, BH}},
+{"bnstarl+",XLOCB(19,BOFP4,CBSO,560,1), XLBOCBBB_MASK, POWER8, PPCVLE|EXT, {CR, BH}},
+{"bnutarl+",XLOCB(19,BOFP4,CBSO,560,1), XLBOCBBB_MASK, POWER8, PPCVLE|EXT, {CR, BH}},
+{"blttar", XLOCB(19,BOT,CBLT,560,0), XLBOCBBB_MASK, POWER8, PPCVLE|EXT, {CR, BH}},
+{"blttarl", XLOCB(19,BOT,CBLT,560,1), XLBOCBBB_MASK, POWER8, PPCVLE|EXT, {CR, BH}},
+{"bgttar", XLOCB(19,BOT,CBGT,560,0), XLBOCBBB_MASK, POWER8, PPCVLE|EXT, {CR, BH}},
+{"bgttarl", XLOCB(19,BOT,CBGT,560,1), XLBOCBBB_MASK, POWER8, PPCVLE|EXT, {CR, BH}},
+{"beqtar", XLOCB(19,BOT,CBEQ,560,0), XLBOCBBB_MASK, POWER8, PPCVLE|EXT, {CR, BH}},
+{"beqtarl", XLOCB(19,BOT,CBEQ,560,1), XLBOCBBB_MASK, POWER8, PPCVLE|EXT, {CR, BH}},
+{"bsotar", XLOCB(19,BOT,CBSO,560,0), XLBOCBBB_MASK, POWER8, PPCVLE|EXT, {CR, BH}},
+{"buntar", XLOCB(19,BOT,CBSO,560,0), XLBOCBBB_MASK, POWER8, PPCVLE|EXT, {CR, BH}},
+{"bsotarl", XLOCB(19,BOT,CBSO,560,1), XLBOCBBB_MASK, POWER8, PPCVLE|EXT, {CR, BH}},
+{"buntarl", XLOCB(19,BOT,CBSO,560,1), XLBOCBBB_MASK, POWER8, PPCVLE|EXT, {CR, BH}},
+{"blttar-", XLOCB(19,BOTM4,CBLT,560,0), XLBOCBBB_MASK, POWER8, PPCVLE|EXT, {CR, BH}},
+{"blttarl-",XLOCB(19,BOTM4,CBLT,560,1), XLBOCBBB_MASK, POWER8, PPCVLE|EXT, {CR, BH}},
+{"bgttar-", XLOCB(19,BOTM4,CBGT,560,0), XLBOCBBB_MASK, POWER8, PPCVLE|EXT, {CR, BH}},
+{"bgttarl-",XLOCB(19,BOTM4,CBGT,560,1), XLBOCBBB_MASK, POWER8, PPCVLE|EXT, {CR, BH}},
+{"beqtar-", XLOCB(19,BOTM4,CBEQ,560,0), XLBOCBBB_MASK, POWER8, PPCVLE|EXT, {CR, BH}},
+{"beqtarl-",XLOCB(19,BOTM4,CBEQ,560,1), XLBOCBBB_MASK, POWER8, PPCVLE|EXT, {CR, BH}},
+{"bsotar-", XLOCB(19,BOTM4,CBSO,560,0), XLBOCBBB_MASK, POWER8, PPCVLE|EXT, {CR, BH}},
+{"buntar-", XLOCB(19,BOTM4,CBSO,560,0), XLBOCBBB_MASK, POWER8, PPCVLE|EXT, {CR, BH}},
+{"bsotarl-",XLOCB(19,BOTM4,CBSO,560,1), XLBOCBBB_MASK, POWER8, PPCVLE|EXT, {CR, BH}},
+{"buntarl-",XLOCB(19,BOTM4,CBSO,560,1), XLBOCBBB_MASK, POWER8, PPCVLE|EXT, {CR, BH}},
+{"blttar+", XLOCB(19,BOTP4,CBLT,560,0), XLBOCBBB_MASK, POWER8, PPCVLE|EXT, {CR, BH}},
+{"blttarl+",XLOCB(19,BOTP4,CBLT,560,1), XLBOCBBB_MASK, POWER8, PPCVLE|EXT, {CR, BH}},
+{"bgttar+", XLOCB(19,BOTP4,CBGT,560,0), XLBOCBBB_MASK, POWER8, PPCVLE|EXT, {CR, BH}},
+{"bgttarl+",XLOCB(19,BOTP4,CBGT,560,1), XLBOCBBB_MASK, POWER8, PPCVLE|EXT, {CR, BH}},
+{"beqtar+", XLOCB(19,BOTP4,CBEQ,560,0), XLBOCBBB_MASK, POWER8, PPCVLE|EXT, {CR, BH}},
+{"beqtarl+",XLOCB(19,BOTP4,CBEQ,560,1), XLBOCBBB_MASK, POWER8, PPCVLE|EXT, {CR, BH}},
+{"bsotar+", XLOCB(19,BOTP4,CBSO,560,0), XLBOCBBB_MASK, POWER8, PPCVLE|EXT, {CR, BH}},
+{"buntar+", XLOCB(19,BOTP4,CBSO,560,0), XLBOCBBB_MASK, POWER8, PPCVLE|EXT, {CR, BH}},
+{"bsotarl+",XLOCB(19,BOTP4,CBSO,560,1), XLBOCBBB_MASK, POWER8, PPCVLE|EXT, {CR, BH}},
+{"buntarl+",XLOCB(19,BOTP4,CBSO,560,1), XLBOCBBB_MASK, POWER8, PPCVLE|EXT, {CR, BH}},
+
+{"bdnzftar", XLO(19,BODNZF,560,0), XLBOBB_MASK, POWER8, PPCVLE|EXT, {BI, BH}},
+{"bdnzftarl", XLO(19,BODNZF,560,1), XLBOBB_MASK, POWER8, PPCVLE|EXT, {BI, BH}},
+{"bdzftar", XLO(19,BODZF,560,0), XLBOBB_MASK, POWER8, PPCVLE|EXT, {BI, BH}},
+{"bdzftarl", XLO(19,BODZF,560,1), XLBOBB_MASK, POWER8, PPCVLE|EXT, {BI, BH}},
+
+{"bftar", XLO(19,BOF,560,0), XLBOBB_MASK, POWER8, PPCVLE|EXT, {BI, BH}},
+{"bftarl", XLO(19,BOF,560,1), XLBOBB_MASK, POWER8, PPCVLE|EXT, {BI, BH}},
+{"bftar-", XLO(19,BOFM4,560,0), XLBOBB_MASK, POWER8, PPCVLE|EXT, {BI, BH}},
+{"bftarl-", XLO(19,BOFM4,560,1), XLBOBB_MASK, POWER8, PPCVLE|EXT, {BI, BH}},
+{"bftar+", XLO(19,BOFP4,560,0), XLBOBB_MASK, POWER8, PPCVLE|EXT, {BI, BH}},
+{"bftarl+", XLO(19,BOFP4,560,1), XLBOBB_MASK, POWER8, PPCVLE|EXT, {BI, BH}},
+
+{"bdnzttar", XLO(19,BODNZT,560,0), XLBOBB_MASK, POWER8, PPCVLE|EXT, {BI, BH}},
+{"bdnzttarl", XLO(19,BODNZT,560,1), XLBOBB_MASK, POWER8, PPCVLE|EXT, {BI, BH}},
+{"bdzttar", XLO(19,BODZT,560,0), XLBOBB_MASK, POWER8, PPCVLE|EXT, {BI, BH}},
+{"bdzttarl", XLO(19,BODZT,560,1), XLBOBB_MASK, POWER8, PPCVLE|EXT, {BI, BH}},
+
+{"bttar", XLO(19,BOT,560,0), XLBOBB_MASK, POWER8, PPCVLE|EXT, {BI, BH}},
+{"bttarl", XLO(19,BOT,560,1), XLBOBB_MASK, POWER8, PPCVLE|EXT, {BI, BH}},
+{"bttar-", XLO(19,BOTM4,560,0), XLBOBB_MASK, POWER8, PPCVLE|EXT, {BI, BH}},
+{"bttarl-", XLO(19,BOTM4,560,1), XLBOBB_MASK, POWER8, PPCVLE|EXT, {BI, BH}},
+{"bttar+", XLO(19,BOTP4,560,0), XLBOBB_MASK, POWER8, PPCVLE|EXT, {BI, BH}},
+{"bttarl+", XLO(19,BOTP4,560,1), XLBOBB_MASK, POWER8, PPCVLE|EXT, {BI, BH}},
+
+{"bctar-", XLLK(19,560,0), XLBH_MASK, POWER8, PPCVLE|EXT, {BOM, BI, BH}},
+{"bctar+", XLLK(19,560,0), XLBH_MASK, POWER8, PPCVLE|EXT, {BOP, BI, BH}},
{"bctar", XLLK(19,560,0), XLBH_MASK, POWER8, PPCVLE, {BO, BI, BH}},
-{"bctarl-", XLLK(19,560,1), XLBH_MASK, POWER8, PPCVLE, {BOM, BI, BH}},
-{"bctarl+", XLLK(19,560,1), XLBH_MASK, POWER8, PPCVLE, {BOP, BI, BH}},
+{"bctarl-", XLLK(19,560,1), XLBH_MASK, POWER8, PPCVLE|EXT, {BOM, BI, BH}},
+{"bctarl+", XLLK(19,560,1), XLBH_MASK, POWER8, PPCVLE|EXT, {BOP, BI, BH}},
{"bctarl", XLLK(19,560,1), XLBH_MASK, POWER8, PPCVLE, {BO, BI, BH}},
{"rlwimi", M(20,0), M_MASK, PPCCOM, PPCVLE, {RA, RS, SH, MBE, ME}},
@@ -6201,34 +6203,34 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"rlwimi.", M(20,1), M_MASK, PPCCOM, PPCVLE, {RA, RS, SH, MBE, ME}},
{"rlimi.", M(20,1), M_MASK, PWRCOM, PPCVLE, {RA, RS, SH, MBE, ME}},
-{"rotlwi", MME(21,31,0), MMBME_MASK, PPCCOM, PPCVLE, {RA, RS, SH}},
-{"clrlwi", MME(21,31,0), MSHME_MASK, PPCCOM, PPCVLE, {RA, RS, MB}},
+{"rotlwi", MME(21,31,0), MMBME_MASK, PPCCOM, PPCVLE|EXT, {RA, RS, SH}},
+{"clrlwi", MME(21,31,0), MSHME_MASK, PPCCOM, PPCVLE|EXT, {RA, RS, MB}},
{"rlwinm", M(21,0), M_MASK, PPCCOM, PPCVLE, {RA, RS, SH, MBE, ME}},
{"rlinm", M(21,0), M_MASK, PWRCOM, PPCVLE, {RA, RS, SH, MBE, ME}},
-{"rotlwi.", MME(21,31,1), MMBME_MASK, PPCCOM, PPCVLE, {RA, RS, SH}},
-{"clrlwi.", MME(21,31,1), MSHME_MASK, PPCCOM, PPCVLE, {RA, RS, MB}},
+{"rotlwi.", MME(21,31,1), MMBME_MASK, PPCCOM, PPCVLE|EXT, {RA, RS, SH}},
+{"clrlwi.", MME(21,31,1), MSHME_MASK, PPCCOM, PPCVLE|EXT, {RA, RS, MB}},
{"rlwinm.", M(21,1), M_MASK, PPCCOM, PPCVLE, {RA, RS, SH, MBE, ME}},
{"rlinm.", M(21,1), M_MASK, PWRCOM, PPCVLE, {RA, RS, SH, MBE, ME}},
{"rlmi", M(22,0), M_MASK, M601, PPCVLE, {RA, RS, RB, MBE, ME}},
{"rlmi.", M(22,1), M_MASK, M601, PPCVLE, {RA, RS, RB, MBE, ME}},
-{"rotlw", MME(23,31,0), MMBME_MASK, PPCCOM, PPCVLE, {RA, RS, RB}},
+{"rotlw", MME(23,31,0), MMBME_MASK, PPCCOM, PPCVLE|EXT, {RA, RS, RB}},
{"rlwnm", M(23,0), M_MASK, PPCCOM, PPCVLE, {RA, RS, RB, MBE, ME}},
{"rlnm", M(23,0), M_MASK, PWRCOM, PPCVLE, {RA, RS, RB, MBE, ME}},
-{"rotlw.", MME(23,31,1), MMBME_MASK, PPCCOM, PPCVLE, {RA, RS, RB}},
+{"rotlw.", MME(23,31,1), MMBME_MASK, PPCCOM, PPCVLE|EXT, {RA, RS, RB}},
{"rlwnm.", M(23,1), M_MASK, PPCCOM, PPCVLE, {RA, RS, RB, MBE, ME}},
{"rlnm.", M(23,1), M_MASK, PWRCOM, PPCVLE, {RA, RS, RB, MBE, ME}},
-{"nop", OP(24), 0xffffffff, PPCCOM, PPCVLE, {0}},
-{"exser", 0x63ff0000, 0xffffffff, POWER9, PPCVLE, {0}},
+{"nop", OP(24), 0xffffffff, PPCCOM, PPCVLE|EXT, {0}},
+{"exser", 0x63ff0000, 0xffffffff, POWER9, PPCVLE|EXT, {0}},
{"ori", OP(24), OP_MASK, PPCCOM, PPCVLE, {RA, RS, UI}},
{"oril", OP(24), OP_MASK, PWRCOM, PPCVLE, {RA, RS, UI}},
{"oris", OP(25), OP_MASK, PPCCOM, PPCVLE, {RA, RS, UI}},
{"oriu", OP(25), OP_MASK, PWRCOM, PPCVLE, {RA, RS, UI}},
-{"xnop", OP(26), 0xffffffff, PPCCOM, PPCVLE, {0}},
+{"xnop", OP(26), 0xffffffff, PPCCOM, PPCVLE|EXT, {0}},
{"xori", OP(26), OP_MASK, PPCCOM, PPCVLE, {RA, RS, UI}},
{"xoril", OP(26), OP_MASK, PWRCOM, PPCVLE, {RA, RS, UI}},
@@ -6241,11 +6243,11 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"andis.", OP(29), OP_MASK, PPCCOM, PPCVLE, {RA, RS, UI}},
{"andiu.", OP(29), OP_MASK, PWRCOM, PPCVLE, {RA, RS, UI}},
-{"rotldi", MD(30,0,0), MDMB_MASK, PPC64, PPCVLE, {RA, RS, SH6}},
-{"clrldi", MD(30,0,0), MDSH_MASK, PPC64, PPCVLE, {RA, RS, MB6}},
+{"rotldi", MD(30,0,0), MDMB_MASK, PPC64, PPCVLE|EXT, {RA, RS, SH6}},
+{"clrldi", MD(30,0,0), MDSH_MASK, PPC64, PPCVLE|EXT, {RA, RS, MB6}},
{"rldicl", MD(30,0,0), MD_MASK, PPC64, PPCVLE, {RA, RS, SH6, MB6}},
-{"rotldi.", MD(30,0,1), MDMB_MASK, PPC64, PPCVLE, {RA, RS, SH6}},
-{"clrldi.", MD(30,0,1), MDSH_MASK, PPC64, PPCVLE, {RA, RS, MB6}},
+{"rotldi.", MD(30,0,1), MDMB_MASK, PPC64, PPCVLE|EXT, {RA, RS, SH6}},
+{"clrldi.", MD(30,0,1), MDSH_MASK, PPC64, PPCVLE|EXT, {RA, RS, MB6}},
{"rldicl.", MD(30,0,1), MD_MASK, PPC64, PPCVLE, {RA, RS, SH6, MB6}},
{"rldicr", MD(30,1,0), MD_MASK, PPC64, PPCVLE, {RA, RS, SH6, ME6}},
@@ -6257,50 +6259,50 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"rldimi", MD(30,3,0), MD_MASK, PPC64, PPCVLE, {RA, RS, SH6, MB6}},
{"rldimi.", MD(30,3,1), MD_MASK, PPC64, PPCVLE, {RA, RS, SH6, MB6}},
-{"rotld", MDS(30,8,0), MDSMB_MASK, PPC64, PPCVLE, {RA, RS, RB}},
+{"rotld", MDS(30,8,0), MDSMB_MASK, PPC64, PPCVLE|EXT, {RA, RS, RB}},
{"rldcl", MDS(30,8,0), MDS_MASK, PPC64, PPCVLE, {RA, RS, RB, MB6}},
-{"rotld.", MDS(30,8,1), MDSMB_MASK, PPC64, PPCVLE, {RA, RS, RB}},
+{"rotld.", MDS(30,8,1), MDSMB_MASK, PPC64, PPCVLE|EXT, {RA, RS, RB}},
{"rldcl.", MDS(30,8,1), MDS_MASK, PPC64, PPCVLE, {RA, RS, RB, MB6}},
{"rldcr", MDS(30,9,0), MDS_MASK, PPC64, PPCVLE, {RA, RS, RB, ME6}},
{"rldcr.", MDS(30,9,1), MDS_MASK, PPC64, PPCVLE, {RA, RS, RB, ME6}},
-{"cmpw", XOPL(31,0,0), XCMPL_MASK, PPCCOM, 0, {OBF, RA, RB}},
-{"cmpd", XOPL(31,0,1), XCMPL_MASK, PPC64, 0, {OBF, RA, RB}},
+{"cmpw", XOPL(31,0,0), XCMPL_MASK, PPCCOM, EXT, {OBF, RA, RB}},
+{"cmpd", XOPL(31,0,1), XCMPL_MASK, PPC64, EXT, {OBF, RA, RB}},
{"cmp", X(31,0), XCMP_MASK, PPC, 0, {BF, L32OPT, RA, RB}},
{"cmp", X(31,0), XCMPL_MASK, PWRCOM, PPC, {BF, RA, RB}},
-{"twlgt", XTO(31,4,TOLGT), XTO_MASK, PPCCOM, 0, {RA, RB}},
-{"tlgt", XTO(31,4,TOLGT), XTO_MASK, PWRCOM, 0, {RA, RB}},
-{"twllt", XTO(31,4,TOLLT), XTO_MASK, PPCCOM, 0, {RA, RB}},
-{"tllt", XTO(31,4,TOLLT), XTO_MASK, PWRCOM, 0, {RA, RB}},
-{"tweq", XTO(31,4,TOEQ), XTO_MASK, PPCCOM, 0, {RA, RB}},
-{"teq", XTO(31,4,TOEQ), XTO_MASK, PWRCOM, 0, {RA, RB}},
-{"twlge", XTO(31,4,TOLGE), XTO_MASK, PPCCOM, 0, {RA, RB}},
-{"tlge", XTO(31,4,TOLGE), XTO_MASK, PWRCOM, 0, {RA, RB}},
-{"twlnl", XTO(31,4,TOLNL), XTO_MASK, PPCCOM, 0, {RA, RB}},
-{"tlnl", XTO(31,4,TOLNL), XTO_MASK, PWRCOM, 0, {RA, RB}},
-{"twlle", XTO(31,4,TOLLE), XTO_MASK, PPCCOM, 0, {RA, RB}},
-{"tlle", XTO(31,4,TOLLE), XTO_MASK, PWRCOM, 0, {RA, RB}},
-{"twlng", XTO(31,4,TOLNG), XTO_MASK, PPCCOM, 0, {RA, RB}},
-{"tlng", XTO(31,4,TOLNG), XTO_MASK, PWRCOM, 0, {RA, RB}},
-{"twgt", XTO(31,4,TOGT), XTO_MASK, PPCCOM, 0, {RA, RB}},
-{"tgt", XTO(31,4,TOGT), XTO_MASK, PWRCOM, 0, {RA, RB}},
-{"twge", XTO(31,4,TOGE), XTO_MASK, PPCCOM, 0, {RA, RB}},
-{"tge", XTO(31,4,TOGE), XTO_MASK, PWRCOM, 0, {RA, RB}},
-{"twnl", XTO(31,4,TONL), XTO_MASK, PPCCOM, 0, {RA, RB}},
-{"tnl", XTO(31,4,TONL), XTO_MASK, PWRCOM, 0, {RA, RB}},
-{"twlt", XTO(31,4,TOLT), XTO_MASK, PPCCOM, 0, {RA, RB}},
-{"tlt", XTO(31,4,TOLT), XTO_MASK, PWRCOM, 0, {RA, RB}},
-{"twle", XTO(31,4,TOLE), XTO_MASK, PPCCOM, 0, {RA, RB}},
-{"tle", XTO(31,4,TOLE), XTO_MASK, PWRCOM, 0, {RA, RB}},
-{"twng", XTO(31,4,TONG), XTO_MASK, PPCCOM, 0, {RA, RB}},
-{"tng", XTO(31,4,TONG), XTO_MASK, PWRCOM, 0, {RA, RB}},
-{"twne", XTO(31,4,TONE), XTO_MASK, PPCCOM, 0, {RA, RB}},
-{"tne", XTO(31,4,TONE), XTO_MASK, PWRCOM, 0, {RA, RB}},
-{"trap", XTO(31,4,TOU), 0xffffffff, PPCCOM, 0, {0}},
-{"twu", XTO(31,4,TOU), XTO_MASK, PPCCOM, 0, {RA, RB}},
-{"tu", XTO(31,4,TOU), XTO_MASK, PWRCOM, 0, {RA, RB}},
+{"twlgt", XTO(31,4,TOLGT), XTO_MASK, PPCCOM, EXT, {RA, RB}},
+{"tlgt", XTO(31,4,TOLGT), XTO_MASK, PWRCOM, EXT, {RA, RB}},
+{"twllt", XTO(31,4,TOLLT), XTO_MASK, PPCCOM, EXT, {RA, RB}},
+{"tllt", XTO(31,4,TOLLT), XTO_MASK, PWRCOM, EXT, {RA, RB}},
+{"tweq", XTO(31,4,TOEQ), XTO_MASK, PPCCOM, EXT, {RA, RB}},
+{"teq", XTO(31,4,TOEQ), XTO_MASK, PWRCOM, EXT, {RA, RB}},
+{"twlge", XTO(31,4,TOLGE), XTO_MASK, PPCCOM, EXT, {RA, RB}},
+{"tlge", XTO(31,4,TOLGE), XTO_MASK, PWRCOM, EXT, {RA, RB}},
+{"twlnl", XTO(31,4,TOLNL), XTO_MASK, PPCCOM, EXT, {RA, RB}},
+{"tlnl", XTO(31,4,TOLNL), XTO_MASK, PWRCOM, EXT, {RA, RB}},
+{"twlle", XTO(31,4,TOLLE), XTO_MASK, PPCCOM, EXT, {RA, RB}},
+{"tlle", XTO(31,4,TOLLE), XTO_MASK, PWRCOM, EXT, {RA, RB}},
+{"twlng", XTO(31,4,TOLNG), XTO_MASK, PPCCOM, EXT, {RA, RB}},
+{"tlng", XTO(31,4,TOLNG), XTO_MASK, PWRCOM, EXT, {RA, RB}},
+{"twgt", XTO(31,4,TOGT), XTO_MASK, PPCCOM, EXT, {RA, RB}},
+{"tgt", XTO(31,4,TOGT), XTO_MASK, PWRCOM, EXT, {RA, RB}},
+{"twge", XTO(31,4,TOGE), XTO_MASK, PPCCOM, EXT, {RA, RB}},
+{"tge", XTO(31,4,TOGE), XTO_MASK, PWRCOM, EXT, {RA, RB}},
+{"twnl", XTO(31,4,TONL), XTO_MASK, PPCCOM, EXT, {RA, RB}},
+{"tnl", XTO(31,4,TONL), XTO_MASK, PWRCOM, EXT, {RA, RB}},
+{"twlt", XTO(31,4,TOLT), XTO_MASK, PPCCOM, EXT, {RA, RB}},
+{"tlt", XTO(31,4,TOLT), XTO_MASK, PWRCOM, EXT, {RA, RB}},
+{"twle", XTO(31,4,TOLE), XTO_MASK, PPCCOM, EXT, {RA, RB}},
+{"tle", XTO(31,4,TOLE), XTO_MASK, PWRCOM, EXT, {RA, RB}},
+{"twng", XTO(31,4,TONG), XTO_MASK, PPCCOM, EXT, {RA, RB}},
+{"tng", XTO(31,4,TONG), XTO_MASK, PWRCOM, EXT, {RA, RB}},
+{"twne", XTO(31,4,TONE), XTO_MASK, PPCCOM, EXT, {RA, RB}},
+{"tne", XTO(31,4,TONE), XTO_MASK, PWRCOM, EXT, {RA, RB}},
+{"trap", XTO(31,4,TOU), 0xffffffff, PPCCOM, EXT, {0}},
+{"twu", XTO(31,4,TOU), XTO_MASK, PPCCOM, EXT, {RA, RB}},
+{"tu", XTO(31,4,TOU), XTO_MASK, PWRCOM, EXT, {RA, RB}},
{"tw", X(31,4), X_MASK, PPCCOM, 0, {TO, RA, RB}},
{"t", X(31,4), X_MASK, PWRCOM, 0, {TO, RA, RB}},
@@ -6310,10 +6312,10 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"subfc", XO(31,8,0,0), XO_MASK, PPCCOM, 0, {RT, RA, RB}},
{"sf", XO(31,8,0,0), XO_MASK, PWRCOM, 0, {RT, RA, RB}},
-{"subc", XO(31,8,0,0), XO_MASK, PPCCOM, 0, {RT, RB, RA}},
+{"subc", XO(31,8,0,0), XO_MASK, PPCCOM, EXT, {RT, RB, RA}},
{"subfc.", XO(31,8,0,1), XO_MASK, PPCCOM, 0, {RT, RA, RB}},
{"sf.", XO(31,8,0,1), XO_MASK, PWRCOM, 0, {RT, RA, RB}},
-{"subc.", XO(31,8,0,1), XO_MASK, PPCCOM, 0, {RT, RB, RA}},
+{"subc.", XO(31,8,0,1), XO_MASK, PPCCOM, EXT, {RT, RB, RA}},
{"mulhdu", XO(31,9,0,0), XO_MASK, PPC64, 0, {RT, RA, RB}},
{"mulhdu.", XO(31,9,0,1), XO_MASK, PPC64, 0, {RT, RA, RB}},
@@ -6330,7 +6332,10 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"lxvrbx", X(31,13), XX1_MASK, POWER10, 0, {XT6, RA0, RB}},
-{"isellt", X(31,15), X_MASK, PPCISEL, 0, {RT, RA0, RB}},
+{"isellt", XISEL(31,15,0), X_MASK, PPCISEL, EXT, {RT, RA0, RB}},
+{"iselgt", XISEL(31,15,1), X_MASK, PPCISEL, EXT, {RT, RA0, RB}},
+{"iseleq", XISEL(31,15,2), X_MASK, PPCISEL, EXT, {RT, RA0, RB}},
+{"isel", XISEL(31,15,0), XISEL_MASK, PPCISEL|TITAN, 0, {RT, RA0, RB, CRB}},
{"tlbilxlpid", XTO(31,18,0), XTO_MASK, E500MC|PPCA2, 0, {0}},
{"tlbilxpid", XTO(31,18,1), XTO_MASK, E500MC|PPCA2, 0, {0}},
@@ -6371,15 +6376,15 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"ldepx", X(31,29), X_MASK, E500MC|PPCA2, 0, {RT, RA0, RB}},
{"waitasec", X(31,30), XRTRARB_MASK, POWER8, POWER9, {0}},
-{"waitrsv", XWCPL(31,30,1,0),0xffffffff, POWER10, 0, {0}},
-{"pause_short", XWCPL(31,30,2,0),0xffffffff, POWER10, 0, {0}},
+{"waitrsv", XWCPL(31,30,1,0),0xffffffff, POWER10, EXT, {0}},
+{"pause_short", XWCPL(31,30,2,0),0xffffffff, POWER10, EXT, {0}},
{"wait", X(31,30), XWCPL_MASK, POWER10, 0, {WC, PL}},
{"wait", X(31,30), XWC_MASK, POWER9, POWER10, {WC}},
{"lwepx", X(31,31), X_MASK, E500MC|PPCA2, 0, {RT, RA0, RB}},
-{"cmplw", XOPL(31,32,0), XCMPL_MASK, PPCCOM, 0, {OBF, RA, RB}},
-{"cmpld", XOPL(31,32,1), XCMPL_MASK, PPC64, 0, {OBF, RA, RB}},
+{"cmplw", XOPL(31,32,0), XCMPL_MASK, PPCCOM, EXT, {OBF, RA, RB}},
+{"cmpld", XOPL(31,32,1), XCMPL_MASK, PPC64, EXT, {OBF, RA, RB}},
{"cmpl", X(31,32), XCMP_MASK, PPC, 0, {BF, L32OPT, RA, RB}},
{"cmpl", X(31,32), XCMPL_MASK, PWRCOM, PPC, {BF, RA, RB}},
@@ -6391,8 +6396,6 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"mviwsplt", X(31,46), X_MASK, E6500, 0, {VD, RA, RB}},
-{"iselgt", X(31,47), X_MASK, PPCISEL, 0, {RT, RA0, RB}},
-
{"lvewx", X(31,71), X_MASK, PPCVEC, 0, {VD, RA0, RB}},
{"addg6s", XO(31,74,0,0), XO_MASK, POWER6, 0, {RT, RA, RB}},
@@ -6401,17 +6404,13 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"lxvrwx", X(31,77), XX1_MASK, POWER10, 0, {XT6, RA0, RB}},
-{"iseleq", X(31,79), X_MASK, PPCISEL, 0, {RT, RA0, RB}},
-
-{"isel", XISEL(31,15), XISEL_MASK, PPCISEL|TITAN, 0, {RT, RA0, RB, CRB}},
-
{"subf", XO(31,40,0,0), XO_MASK, PPC, 0, {RT, RA, RB}},
-{"sub", XO(31,40,0,0), XO_MASK, PPC, 0, {RT, RB, RA}},
+{"sub", XO(31,40,0,0), XO_MASK, PPC, EXT, {RT, RB, RA}},
{"subf.", XO(31,40,0,1), XO_MASK, PPC, 0, {RT, RA, RB}},
-{"sub.", XO(31,40,0,1), XO_MASK, PPC, 0, {RT, RB, RA}},
+{"sub.", XO(31,40,0,1), XO_MASK, PPC, EXT, {RT, RB, RA}},
-{"mffprd", X(31,51), XX1RB_MASK|1, PPCVSX2, 0, {RA, FRS}},
-{"mfvrd", X(31,51)|1, XX1RB_MASK|1, PPCVSX2, 0, {RA, VS}},
+{"mffprd", X(31,51), XX1RB_MASK|1, PPCVSX2, EXT, {RA, FRS}},
+{"mfvrd", X(31,51)|1, XX1RB_MASK|1, PPCVSX2, EXT, {RA, VS}},
{"mfvsrd", X(31,51), XX1RB_MASK, PPCVSX2, 0, {RA, XS6}},
{"eratilx", X(31,51), X_MASK, PPCA2, 0, {ERAT_T, RA, RB}},
@@ -6432,27 +6431,27 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"andc", XRC(31,60,0), X_MASK, COM, 0, {RA, RS, RB}},
{"andc.", XRC(31,60,1), X_MASK, COM, 0, {RA, RS, RB}},
-{"waitrsv", X(31,62)|(1<<21), 0xffffffff, E500MC|PPCA2, 0, {0}},
-{"waitimpl", X(31,62)|(2<<21), 0xffffffff, E500MC|PPCA2, 0, {0}},
+{"waitrsv", X(31,62)|(1<<21), 0xffffffff, E500MC|PPCA2, EXT, {0}},
+{"waitimpl", X(31,62)|(2<<21), 0xffffffff, E500MC|PPCA2, EXT, {0}},
{"wait", X(31,62), XWC_MASK, E500MC|PPCA2, 0, {WC}},
{"dcbstep", XRT(31,63,0), XRT_MASK, E500MC|PPCA2, 0, {RA0, RB}},
-{"tdlgt", XTO(31,68,TOLGT), XTO_MASK, PPC64, 0, {RA, RB}},
-{"tdllt", XTO(31,68,TOLLT), XTO_MASK, PPC64, 0, {RA, RB}},
-{"tdeq", XTO(31,68,TOEQ), XTO_MASK, PPC64, 0, {RA, RB}},
-{"tdlge", XTO(31,68,TOLGE), XTO_MASK, PPC64, 0, {RA, RB}},
-{"tdlnl", XTO(31,68,TOLNL), XTO_MASK, PPC64, 0, {RA, RB}},
-{"tdlle", XTO(31,68,TOLLE), XTO_MASK, PPC64, 0, {RA, RB}},
-{"tdlng", XTO(31,68,TOLNG), XTO_MASK, PPC64, 0, {RA, RB}},
-{"tdgt", XTO(31,68,TOGT), XTO_MASK, PPC64, 0, {RA, RB}},
-{"tdge", XTO(31,68,TOGE), XTO_MASK, PPC64, 0, {RA, RB}},
-{"tdnl", XTO(31,68,TONL), XTO_MASK, PPC64, 0, {RA, RB}},
-{"tdlt", XTO(31,68,TOLT), XTO_MASK, PPC64, 0, {RA, RB}},
-{"tdle", XTO(31,68,TOLE), XTO_MASK, PPC64, 0, {RA, RB}},
-{"tdng", XTO(31,68,TONG), XTO_MASK, PPC64, 0, {RA, RB}},
-{"tdne", XTO(31,68,TONE), XTO_MASK, PPC64, 0, {RA, RB}},
-{"tdu", XTO(31,68,TOU), XTO_MASK, PPC64, 0, {RA, RB}},
+{"tdlgt", XTO(31,68,TOLGT), XTO_MASK, PPC64, EXT, {RA, RB}},
+{"tdllt", XTO(31,68,TOLLT), XTO_MASK, PPC64, EXT, {RA, RB}},
+{"tdeq", XTO(31,68,TOEQ), XTO_MASK, PPC64, EXT, {RA, RB}},
+{"tdlge", XTO(31,68,TOLGE), XTO_MASK, PPC64, EXT, {RA, RB}},
+{"tdlnl", XTO(31,68,TOLNL), XTO_MASK, PPC64, EXT, {RA, RB}},
+{"tdlle", XTO(31,68,TOLLE), XTO_MASK, PPC64, EXT, {RA, RB}},
+{"tdlng", XTO(31,68,TOLNG), XTO_MASK, PPC64, EXT, {RA, RB}},
+{"tdgt", XTO(31,68,TOGT), XTO_MASK, PPC64, EXT, {RA, RB}},
+{"tdge", XTO(31,68,TOGE), XTO_MASK, PPC64, EXT, {RA, RB}},
+{"tdnl", XTO(31,68,TONL), XTO_MASK, PPC64, EXT, {RA, RB}},
+{"tdlt", XTO(31,68,TOLT), XTO_MASK, PPC64, EXT, {RA, RB}},
+{"tdle", XTO(31,68,TOLE), XTO_MASK, PPC64, EXT, {RA, RB}},
+{"tdng", XTO(31,68,TONG), XTO_MASK, PPC64, EXT, {RA, RB}},
+{"tdne", XTO(31,68,TONE), XTO_MASK, PPC64, EXT, {RA, RB}},
+{"tdu", XTO(31,68,TOU), XTO_MASK, PPC64, EXT, {RA, RB}},
{"td", X(31,68), X_MASK, PPC64, 0, {TO, RA, RB}},
{"lwfcmx", APU(31,71,0), APU_MASK, PPC405, 0, {FCRT, RA, RB}},
@@ -6472,10 +6471,10 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"ldarx", X(31,84), XEH_MASK, PPC64, 0, {RT, RA0, RB, EH}},
-{"dcbfl", XOPL(31,86,1), XRT_MASK, POWER5, PPC476, {RA0, RB}},
-{"dcbflp", XOPL2(31,86,3), XRT_MASK, POWER9, PPC476, {RA0, RB}},
-{"dcbfps", XOPL3(31,86,4), XRT_MASK, POWER10, PPC476, {RA0, RB}},
-{"dcbstps", XOPL3(31,86,6), XRT_MASK, POWER10, PPC476, {RA0, RB}},
+{"dcbfl", XOPL(31,86,1), XRT_MASK, POWER5, PPC476|EXT, {RA0, RB}},
+{"dcbflp", XOPL2(31,86,3), XRT_MASK, POWER9, PPC476|EXT, {RA0, RB}},
+{"dcbfps", XOPL3(31,86,4), XRT_MASK, POWER10, PPC476|EXT, {RA0, RB}},
+{"dcbstps", XOPL3(31,86,6), XRT_MASK, POWER10, PPC476|EXT, {RA0, RB}},
{"dcbf", X(31,86), XL3RT_MASK, POWER10, PPC476, {RA0, RB, L3OPT}},
{"dcbf", X(31,86), XLRT_MASK, PPC, POWER10, {RA0, RB, L2OPT}},
@@ -6501,8 +6500,8 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"mtsrdin", X(31,114), XRA_MASK, PPC64, 0, {RS, RB}},
-{"mffprwz", X(31,115), XX1RB_MASK|1, PPCVSX2, 0, {RA, FRS}},
-{"mfvrwz", X(31,115)|1, XX1RB_MASK|1, PPCVSX2, 0, {RA, VS}},
+{"mffprwz", X(31,115), XX1RB_MASK|1, PPCVSX2, EXT, {RA, FRS}},
+{"mfvrwz", X(31,115)|1, XX1RB_MASK|1, PPCVSX2, EXT, {RA, VS}},
{"mfvsrwz", X(31,115), XX1RB_MASK, PPCVSX2, 0, {RA, XS6}},
{"lharx", X(31,116), XEH_MASK, POWER8|E6500, 0, {RT, RA0, RB, EH}},
@@ -6513,9 +6512,9 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"popcntb", X(31,122), XRB_MASK, POWER5, 0, {RA, RS}},
-{"not", XRC(31,124,0), X_MASK, COM, 0, {RA, RSB}},
+{"not", XRC(31,124,0), X_MASK, COM, EXT, {RA, RSB}},
{"nor", XRC(31,124,0), X_MASK, COM, 0, {RA, RS, RB}},
-{"not.", XRC(31,124,1), X_MASK, COM, 0, {RA, RSB}},
+{"not.", XRC(31,124,1), X_MASK, COM, EXT, {RA, RSB}},
{"nor.", XRC(31,124,1), X_MASK, COM, 0, {RA, RS, RB}},
{"dcbfep", XRT(31,127,0), XRT_MASK, E500MC|PPCA2, 0, {RA0, RB}},
@@ -6546,14 +6545,13 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"msgsndp", XRTRA(31,142,0,0), XRTRA_MASK, POWER8, 0, {RB}},
{"dcbtstlse", X(31,142), X_MASK, PPCCHLK, E500MC, {CT, RA0, RB}},
-{"mtcr", XFXM(31,144,0xff,0), XRARB_MASK, COM, 0, {RS}},
+{"mtcr", XFXM(31,144,0xff,0), XRARB_MASK, COM, EXT, {RS}},
{"mtcrf", XFXM(31,144,0,0), XFXFXM_MASK, COM, 0, {FXM, RS}},
{"mtocrf", XFXM(31,144,0,1), XFXFXM_MASK, COM, 0, {FXM, RS}},
{"mtmsr", X(31,146), XRLARB_MASK, COM, 0, {RS, A_L}},
{"mtsle", X(31,147), XRTLRARB_MASK, POWER8, 0, {L}},
-
{"eratsx", XRC(31,147,0), X_MASK, PPCA2, 0, {RT, RA0, RB}},
{"eratsx.", XRC(31,147,1), X_MASK, PPCA2, 0, {RT, RA0, RB}},
@@ -6599,8 +6597,8 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"mtmsrd", X(31,178), XRLARB_MASK, PPC64, 0, {RS, A_L}},
-{"mtfprd", X(31,179), XX1RB_MASK|1, PPCVSX2, 0, {FRT, RA}},
-{"mtvrd", X(31,179)|1, XX1RB_MASK|1, PPCVSX2, 0, {VD, RA}},
+{"mtfprd", X(31,179), XX1RB_MASK|1, PPCVSX2, EXT, {FRT, RA}},
+{"mtvrd", X(31,179)|1, XX1RB_MASK|1, PPCVSX2, EXT, {VD, RA}},
{"mtvsrd", X(31,179), XX1RB_MASK, PPCVSX2, 0, {XT6, RA}},
{"eratre", X(31,179), X_MASK, PPCA2, 0, {RT, RA, WS}},
@@ -6643,8 +6641,8 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"mtsr", X(31,210), XRB_MASK|(1<<20), COM, NON32, {SR, RS}},
-{"mtfprwa", X(31,211), XX1RB_MASK|1, PPCVSX2, 0, {FRT, RA}},
-{"mtvrwa", X(31,211)|1, XX1RB_MASK|1, PPCVSX2, 0, {VD, RA}},
+{"mtfprwa", X(31,211), XX1RB_MASK|1, PPCVSX2, EXT, {FRT, RA}},
+{"mtvrwa", X(31,211)|1, XX1RB_MASK|1, PPCVSX2, EXT, {VD, RA}},
{"mtvsrwa", X(31,211), XX1RB_MASK, PPCVSX2, 0, {XT6, RA}},
{"eratwe", X(31,211), X_MASK, PPCA2, 0, {RS, RA, WS}},
@@ -6697,13 +6695,13 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"mtsrin", X(31,242), XRA_MASK, PPC, NON32, {RS, RB}},
{"mtsri", X(31,242), XRA_MASK, POWER, NON32, {RS, RB}},
-{"mtfprwz", X(31,243), XX1RB_MASK|1, PPCVSX2, 0, {FRT, RA}},
-{"mtvrwz", X(31,243)|1, XX1RB_MASK|1, PPCVSX2, 0, {VD, RA}},
+{"mtfprwz", X(31,243), XX1RB_MASK|1, PPCVSX2, EXT, {FRT, RA}},
+{"mtvrwz", X(31,243)|1, XX1RB_MASK|1, PPCVSX2, EXT, {VD, RA}},
{"mtvsrwz", X(31,243), XX1RB_MASK, PPCVSX2, 0, {XT6, RA}},
-{"dcbtstt", XRT(31,246,0x10), XRT_MASK, POWER7, 0, {RA0, RB}},
-{"dcbtstct", X(31,246), X_MASK, POWER4, 0, {RA0, RB, THCT}},
-{"dcbtstds", X(31,246), X_MASK, POWER4, 0, {RA0, RB, THDS}},
+{"dcbtstt", XRT(31,246,0x10), XRT_MASK, POWER7, EXT, {RA0, RB}},
+{"dcbtstct", X(31,246), X_MASK, POWER4, EXT, {RA0, RB, THCT}},
+{"dcbtstds", X(31,246), X_MASK, POWER4, EXT, {RA0, RB, THDS}},
{"dcbtst", X(31,246), X_MASK, POWER4, DCBT_EO, {RA0, RB, CT}},
{"dcbtst", X(31,246), X_MASK, DCBT_EO, 0, {CT, RA0, RB}},
{"dcbtst", X(31,246), X_MASK, PPC, POWER4|DCBT_EO, {RA0, RB}},
@@ -6725,8 +6723,8 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"icbt", X(31,262), XRT_MASK, PPC403, 0, {RA, RB}},
{"lvepxl", X(31,263), X_MASK, E6500, 0, {VD, RA0, RB}},
-
{"ldfcmx", APU(31,263,0), APU_MASK, PPC405, 0, {FCRT, RA, RB}},
+
{"doz", XO(31,264,0,0), XO_MASK, M601, 0, {RT, RA, RB}},
{"doz.", XO(31,264,0,1), XO_MASK, M601, 0, {RT, RA, RB}},
@@ -6754,10 +6752,10 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"lscbx", XRC(31,277,0), X_MASK, M601, 0, {RT, RA, RB}},
{"lscbx.", XRC(31,277,1), X_MASK, M601, 0, {RT, RA, RB}},
-{"dcbtt", XRT(31,278,0x10), XRT_MASK, POWER7, 0, {RA0, RB}},
-{"dcbna", XRT(31,278,0x11), XRT_MASK, POWER10, 0, {RA0, RB}},
-{"dcbtct", X(31,278), X_MASK, POWER4, 0, {RA0, RB, THCT}},
-{"dcbtds", X(31,278), X_MASK, POWER4, 0, {RA0, RB, THDS}},
+{"dcbtt", XRT(31,278,0x10), XRT_MASK, POWER7, EXT, {RA0, RB}},
+{"dcbna", XRT(31,278,0x11), XRT_MASK, POWER10, EXT, {RA0, RB}},
+{"dcbtct", X(31,278), X_MASK, POWER4, EXT, {RA0, RB, THCT}},
+{"dcbtds", X(31,278), X_MASK, POWER4, EXT, {RA0, RB, THDS}},
{"dcbt", X(31,278), X_MASK, POWER4, DCBT_EO, {RA0, RB, CT}},
{"dcbt", X(31,278), X_MASK, DCBT_EO, 0, {CT, RA0, RB}},
{"dcbt", X(31,278), X_MASK, PPC, POWER4|DCBT_EO, {RA0, RB}},
@@ -6851,309 +6849,310 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"slbsync", X(31,338), 0xffffffff, POWER9, 0, {0}},
-{"mfmq", XSPR(31,339, 0), XSPR_MASK, M601, 0, {RT}},
-{"mfxer", XSPR(31,339, 1), XSPR_MASK, COM, 0, {RT}},
-{"mfudscr", XSPR(31,339, 3), XSPR_MASK, POWER9, 0, {RS}},
-{"mfrtcu", XSPR(31,339, 4), XSPR_MASK, COM, TITAN, {RT}},
-{"mfrtcl", XSPR(31,339, 5), XSPR_MASK, COM, TITAN, {RT}},
-{"mfdec", XSPR(31,339, 6), XSPR_MASK, MFDEC1, 0, {RT}},
-{"mflr", XSPR(31,339, 8), XSPR_MASK, COM, 0, {RT}},
-{"mfctr", XSPR(31,339, 9), XSPR_MASK, COM, 0, {RT}},
-{"mfuamr", XSPR(31,339, 13), XSPR_MASK, POWER9, 0, {RS}},
-{"mfdscr", XSPR(31,339, 17), XSPR_MASK, POWER6, 0, {RT}},
-{"mftid", XSPR(31,339, 17), XSPR_MASK, POWER, 0, {RT}},
-{"mfdsisr", XSPR(31,339, 18), XSPR_MASK, COM, TITAN, {RT}},
-{"mfdar", XSPR(31,339, 19), XSPR_MASK, COM, TITAN, {RT}},
-{"mfdec", XSPR(31,339, 22), XSPR_MASK, MFDEC2, MFDEC1, {RT}},
-{"mfsdr0", XSPR(31,339, 24), XSPR_MASK, POWER, 0, {RT}},
-{"mfsdr1", XSPR(31,339, 25), XSPR_MASK, COM, TITAN, {RT}},
-{"mfsrr0", XSPR(31,339, 26), XSPR_MASK, COM, 0, {RT}},
-{"mfsrr1", XSPR(31,339, 27), XSPR_MASK, COM, 0, {RT}},
-{"mfcfar", XSPR(31,339, 28), XSPR_MASK, POWER6, 0, {RT}},
-{"mfamr", XSPR(31,339, 29), XSPR_MASK, POWER7, 0, {RS}},
-{"mfpidr", XSPR(31,339, 48), XSPR_MASK, POWER10, 0, {RS}},
-{"mfpid", XSPR(31,339, 48), XSPR_MASK, BOOKE, 0, {RT}},
-{"mfcsrr0", XSPR(31,339, 58), XSPR_MASK, BOOKE, 0, {RT}},
-{"mfcsrr1", XSPR(31,339, 59), XSPR_MASK, BOOKE, 0, {RT}},
-{"mfiamr", XSPR(31,339, 61), XSPR_MASK, POWER10, 0, {RS}},
-{"mfdear", XSPR(31,339, 61), XSPR_MASK, BOOKE, 0, {RT}},
-{"mfesr", XSPR(31,339, 62), XSPR_MASK, BOOKE, 0, {RT}},
-{"mfivpr", XSPR(31,339, 63), XSPR_MASK, BOOKE, 0, {RT}},
-{"mfctrl", XSPR(31,339,136), XSPR_MASK, POWER4, 0, {RT}},
-{"mfcmpa", XSPR(31,339,144), XSPR_MASK, PPC860, 0, {RT}},
-{"mfcmpb", XSPR(31,339,145), XSPR_MASK, PPC860, 0, {RT}},
-{"mfcmpc", XSPR(31,339,146), XSPR_MASK, PPC860, 0, {RT}},
-{"mfcmpd", XSPR(31,339,147), XSPR_MASK, PPC860, 0, {RT}},
-{"mficr", XSPR(31,339,148), XSPR_MASK, PPC860, 0, {RT}},
-{"mfder", XSPR(31,339,149), XSPR_MASK, PPC860, 0, {RT}},
-{"mfcounta", XSPR(31,339,150), XSPR_MASK, PPC860, 0, {RT}},
-{"mfcountb", XSPR(31,339,151), XSPR_MASK, PPC860, 0, {RT}},
-{"mfcmpe", XSPR(31,339,152), XSPR_MASK, PPC860, 0, {RT}},
-{"mffscr", XSPR(31,339,153), XSPR_MASK, POWER10, 0, {RS}},
-{"mfcmpf", XSPR(31,339,153), XSPR_MASK, PPC860, 0, {RT}},
-{"mfcmpg", XSPR(31,339,154), XSPR_MASK, PPC860, 0, {RT}},
-{"mfcmph", XSPR(31,339,155), XSPR_MASK, PPC860, 0, {RT}},
-{"mflctrl1", XSPR(31,339,156), XSPR_MASK, PPC860, 0, {RT}},
-{"mfuamor", XSPR(31,339,157), XSPR_MASK, POWER7, 0, {RS}},
-{"mflctrl2", XSPR(31,339,157), XSPR_MASK, PPC860, 0, {RT}},
-{"mfictrl", XSPR(31,339,158), XSPR_MASK, PPC860, 0, {RT}},
-{"mfpspb", XSPR(31,339,159), XSPR_MASK, POWER10, 0, {RS}},
-{"mfbar", XSPR(31,339,159), XSPR_MASK, PPC860, 0, {RT}},
-{"mfdpdes", XSPR(31,339,176), XSPR_MASK, POWER10, 0, {RS}},
-{"mfdawr0", XSPR(31,339,180), XSPR_MASK, POWER10, 0, {RS}},
-{"mfdawr1", XSPR(31,339,181), XSPR_MASK, POWER10, 0, {RS}},
-{"mfrpr", XSPR(31,339,186), XSPR_MASK, POWER10, 0, {RS}},
-{"mfciabr", XSPR(31,339,187), XSPR_MASK, POWER10, 0, {RS}},
-{"mfdawrx0", XSPR(31,339,188), XSPR_MASK, POWER10, 0, {RS}},
-{"mfdawrx1", XSPR(31,339,189), XSPR_MASK, POWER10, 0, {RS}},
-{"mfhfscr", XSPR(31,339,190), XSPR_MASK, POWER10, 0, {RS}},
-{"mfvrsave", XSPR(31,339,256), XSPR_MASK, PPCVEC, 0, {RT}},
-{"mfusprg0", XSPR(31,339,256), XSPR_MASK, BOOKE, 0, {RT}},
-{"mfsprg", XSPR(31,339,256), XSPRG_MASK, PPC, 0, {RT, SPRG}},
-{"mfusprg3", XSPR(31,339,259), XSPR_MASK, POWER10, 0, {RT}},
-{"mfsprg4", XSPR(31,339,260), XSPR_MASK, PPC405|BOOKE, 0, {RT}},
-{"mfsprg5", XSPR(31,339,261), XSPR_MASK, PPC405|BOOKE, 0, {RT}},
-{"mfsprg6", XSPR(31,339,262), XSPR_MASK, PPC405|BOOKE, 0, {RT}},
-{"mfsprg7", XSPR(31,339,263), XSPR_MASK, PPC405|BOOKE, 0, {RT}},
-{"mftbu", XSPR(31,339,269), XSPR_MASK, POWER4|BOOKE, 0, {RT}},
-{"mftb", X(31,339), X_MASK, POWER4|BOOKE, 0, {RT, TBR}},
-{"mftbl", XSPR(31,339,268), XSPR_MASK, POWER4|BOOKE, 0, {RT}},
-{"mfsprg0", XSPR(31,339,272), XSPR_MASK, PPC, 0, {RT}},
-{"mfsprg1", XSPR(31,339,273), XSPR_MASK, PPC, 0, {RT}},
-{"mfsprg2", XSPR(31,339,274), XSPR_MASK, PPC, 0, {RT}},
-{"mfsprg3", XSPR(31,339,275), XSPR_MASK, PPC, 0, {RT}},
-{"mfasr", XSPR(31,339,280), XSPR_MASK, PPC64, 0, {RT}},
-{"mfear", XSPR(31,339,282), XSPR_MASK, PPC, TITAN, {RT}},
-{"mfpir", XSPR(31,339,286), XSPR_MASK, BOOKE, 0, {RT}},
-{"mfpvr", XSPR(31,339,287), XSPR_MASK, PPC, 0, {RT}},
-{"mfhsprg0", XSPR(31,339,304), XSPR_MASK, POWER10, 0, {RS}},
-{"mfdbsr", XSPR(31,339,304), XSPR_MASK, BOOKE, 0, {RT}},
-{"mfhsprg1", XSPR(31,339,305), XSPR_MASK, POWER10, 0, {RS}},
-{"mfhdisr", XSPR(31,339,306), XSPR_MASK, POWER10, 0, {RS}},
-{"mfhdar", XSPR(31,339,307), XSPR_MASK, POWER10, 0, {RS}},
-{"mfspurr", XSPR(31,339,308), XSPR_MASK, POWER10, 0, {RS}},
-{"mfdbcr0", XSPR(31,339,308), XSPR_MASK, BOOKE, 0, {RT}},
-{"mfpurr", XSPR(31,339,309), XSPR_MASK, POWER10, 0, {RS}},
-{"mfdbcr1", XSPR(31,339,309), XSPR_MASK, BOOKE, 0, {RT}},
-{"mfhdec", XSPR(31,339,310), XSPR_MASK, POWER10, 0, {RS}},
-{"mfdbcr2", XSPR(31,339,310), XSPR_MASK, BOOKE, 0, {RT}},
-{"mfiac1", XSPR(31,339,312), XSPR_MASK, BOOKE, 0, {RT}},
-{"mfhrmor", XSPR(31,339,313), XSPR_MASK, POWER10, 0, {RS}},
-{"mfiac2", XSPR(31,339,313), XSPR_MASK, BOOKE, 0, {RT}},
-{"mfhsrr0", XSPR(31,339,314), XSPR_MASK, POWER10, 0, {RS}},
-{"mfiac3", XSPR(31,339,314), XSPR_MASK, BOOKE, 0, {RT}},
-{"mfhsrr1", XSPR(31,339,315), XSPR_MASK, POWER10, 0, {RS}},
-{"mfiac4", XSPR(31,339,315), XSPR_MASK, BOOKE, 0, {RT}},
-{"mfdac1", XSPR(31,339,316), XSPR_MASK, BOOKE, 0, {RT}},
-{"mfdac2", XSPR(31,339,317), XSPR_MASK, BOOKE, 0, {RT}},
-{"mflpcr", XSPR(31,339,318), XSPR_MASK, POWER10, 0, {RS}},
-{"mfdvc1", XSPR(31,339,318), XSPR_MASK, BOOKE, 0, {RT}},
-{"mflpidr", XSPR(31,339,319), XSPR_MASK, POWER10, 0, {RS}},
-{"mfdvc2", XSPR(31,339,319), XSPR_MASK, BOOKE, 0, {RT}},
-{"mfhmer", XSPR(31,339,336), XSPR_MASK, POWER7, 0, {RS}},
-{"mftsr", XSPR(31,339,336), XSPR_MASK, BOOKE, 0, {RT}},
-{"mfhmeer", XSPR(31,339,337), XSPR_MASK, POWER7, 0, {RS}},
-{"mfpcr", XSPR(31,339,338), XSPR_MASK, POWER10, 0, {RS}},
-{"mfheir", XSPR(31,339,339), XSPR_MASK, POWER10, 0, {RS}},
-{"mftcr", XSPR(31,339,340), XSPR_MASK, BOOKE, 0, {RT}},
-{"mfamor", XSPR(31,339,349), XSPR_MASK, POWER7, 0, {RS}},
-{"mfivor0", XSPR(31,339,400), XSPR_MASK, BOOKE, 0, {RT}},
-{"mfivor1", XSPR(31,339,401), XSPR_MASK, BOOKE, 0, {RT}},
-{"mfivor2", XSPR(31,339,402), XSPR_MASK, BOOKE, 0, {RT}},
-{"mfivor3", XSPR(31,339,403), XSPR_MASK, BOOKE, 0, {RT}},
-{"mfivor4", XSPR(31,339,404), XSPR_MASK, BOOKE, 0, {RT}},
-{"mfivor5", XSPR(31,339,405), XSPR_MASK, BOOKE, 0, {RT}},
-{"mfivor6", XSPR(31,339,406), XSPR_MASK, BOOKE, 0, {RT}},
-{"mfivor7", XSPR(31,339,407), XSPR_MASK, BOOKE, 0, {RT}},
-{"mfivor8", XSPR(31,339,408), XSPR_MASK, BOOKE, 0, {RT}},
-{"mfivor9", XSPR(31,339,409), XSPR_MASK, BOOKE, 0, {RT}},
-{"mfivor10", XSPR(31,339,410), XSPR_MASK, BOOKE, 0, {RT}},
-{"mfivor11", XSPR(31,339,411), XSPR_MASK, BOOKE, 0, {RT}},
-{"mfivor12", XSPR(31,339,412), XSPR_MASK, BOOKE, 0, {RT}},
-{"mfivor13", XSPR(31,339,413), XSPR_MASK, BOOKE, 0, {RT}},
-{"mfivor14", XSPR(31,339,414), XSPR_MASK, BOOKE, 0, {RT}},
-{"mfivor15", XSPR(31,339,415), XSPR_MASK, BOOKE, 0, {RT}},
-{"mftir", XSPR(31,339,446), XSPR_MASK, POWER10, 0, {RS}},
-{"mfptcr", XSPR(31,339,464), XSPR_MASK, POWER10, 0, {RS}},
-{"mfusprg0", XSPR(31,339,496), XSPR_MASK, POWER10, 0, {RS}},
-{"mfusprg1", XSPR(31,339,497), XSPR_MASK, POWER10, 0, {RS}},
-{"mfurmor", XSPR(31,339,505), XSPR_MASK, POWER10, 0, {RS}},
-{"mfusrr0", XSPR(31,339,506), XSPR_MASK, POWER10, 0, {RS}},
-{"mfusrr1", XSPR(31,339,507), XSPR_MASK, POWER10, 0, {RS}},
-{"mfsmfctrl", XSPR(31,339,511), XSPR_MASK, POWER10, 0, {RS}},
-{"mfspefscr", XSPR(31,339,512), XSPR_MASK, PPCSPE, 0, {RT}},
-{"mfbbear", XSPR(31,339,513), XSPR_MASK, PPCBRLK, 0, {RT}},
-{"mfbbtar", XSPR(31,339,514), XSPR_MASK, PPCBRLK, 0, {RT}},
-{"mfivor32", XSPR(31,339,528), XSPR_MASK, PPCSPE|E6500, 0, {RT}},
-{"mfivor33", XSPR(31,339,529), XSPR_MASK, PPCSPE|E6500, 0, {RT}},
-{"mfivor34", XSPR(31,339,530), XSPR_MASK, PPCSPE, 0, {RT}},
-{"mfivor35", XSPR(31,339,531), XSPR_MASK, PPCPMR, 0, {RT}},
-{"mfibatu", XSPR(31,339,528), XSPRBAT_MASK, PPC, TITAN, {RT, SPRBAT}},
-{"mfibatl", XSPR(31,339,529), XSPRBAT_MASK, PPC, TITAN, {RT, SPRBAT}},
-{"mfdbatu", XSPR(31,339,536), XSPRBAT_MASK, PPC, TITAN, {RT, SPRBAT}},
-{"mfdbatl", XSPR(31,339,537), XSPRBAT_MASK, PPC, TITAN, {RT, SPRBAT}},
-{"mfic_cst", XSPR(31,339,560), XSPR_MASK, PPC860, 0, {RT}},
-{"mfic_adr", XSPR(31,339,561), XSPR_MASK, PPC860, 0, {RT}},
-{"mfic_dat", XSPR(31,339,562), XSPR_MASK, PPC860, 0, {RT}},
-{"mfdc_cst", XSPR(31,339,568), XSPR_MASK, PPC860, 0, {RT}},
-{"mfdc_adr", XSPR(31,339,569), XSPR_MASK, PPC860, 0, {RT}},
-{"mfdc_dat", XSPR(31,339,570), XSPR_MASK, PPC860, 0, {RT}},
-{"mfmcsrr0", XSPR(31,339,570), XSPR_MASK, PPCRFMCI, 0, {RT}},
-{"mfmcsrr1", XSPR(31,339,571), XSPR_MASK, PPCRFMCI, 0, {RT}},
-{"mfmcsr", XSPR(31,339,572), XSPR_MASK, PPCRFMCI, 0, {RT}},
-{"mfmcar", XSPR(31,339,573), XSPR_MASK, PPCRFMCI, TITAN, {RT}},
-{"mfdpdr", XSPR(31,339,630), XSPR_MASK, PPC860, 0, {RT}},
-{"mfdpir", XSPR(31,339,631), XSPR_MASK, PPC860, 0, {RT}},
-{"mfimmr", XSPR(31,339,638), XSPR_MASK, PPC860, 0, {RT}},
-{"mfusier2", XSPR(31,339,736), XSPR_MASK, POWER10, 0, {RT}},
-{"mfsier2", XSPR(31,339,736), XSPR_MASK, POWER10, 0, {RT}},
-{"mfusier3", XSPR(31,339,737), XSPR_MASK, POWER10, 0, {RT}},
-{"mfsier3", XSPR(31,339,737), XSPR_MASK, POWER10, 0, {RT}},
-{"mfummcr3", XSPR(31,339,738), XSPR_MASK, POWER10, 0, {RT}},
-{"mfmmcr3", XSPR(31,339,738), XSPR_MASK, POWER10, 0, {RT}},
-{"mfusier", XSPR(31,339,768), XSPR_MASK, POWER10, 0, {RT}},
-{"mfsier", XSPR(31,339,768), XSPR_MASK, POWER10, 0, {RT}},
-{"mfummcr2", XSPR(31,339,769), XSPR_MASK, POWER9, 0, {RT}},
-{"mfmmcr2", XSPR(31,339,769), XSPR_MASK, POWER9, 0, {RT}},
-{"mfummcra", XSPR(31,339,770), XSPR_MASK, POWER9, 0, {RS}},
-{"mfmmcra", XSPR(31,339,770), XSPR_MASK, POWER7, 0, {RS}},
-{"mfupmc1", XSPR(31,339,771), XSPR_MASK, POWER9, 0, {RT}},
-{"mfpmc1", XSPR(31,339,771), XSPR_MASK, POWER7, 0, {RT}},
-{"mfupmc2", XSPR(31,339,772), XSPR_MASK, POWER9, 0, {RT}},
-{"mfpmc2", XSPR(31,339,772), XSPR_MASK, POWER7, 0, {RT}},
-{"mfupmc3", XSPR(31,339,773), XSPR_MASK, POWER9, 0, {RT}},
-{"mfpmc3", XSPR(31,339,773), XSPR_MASK, POWER7, 0, {RT}},
-{"mfupmc4", XSPR(31,339,774), XSPR_MASK, POWER9, 0, {RT}},
-{"mfpmc4", XSPR(31,339,774), XSPR_MASK, POWER7, 0, {RT}},
-{"mfupmc5", XSPR(31,339,775), XSPR_MASK, POWER9, 0, {RT}},
-{"mfpmc5", XSPR(31,339,775), XSPR_MASK, POWER7, 0, {RT}},
-{"mfupmc6", XSPR(31,339,776), XSPR_MASK, POWER9, 0, {RT}},
-{"mfpmc6", XSPR(31,339,776), XSPR_MASK, POWER7, 0, {RT}},
-{"mfummcr0", XSPR(31,339,779), XSPR_MASK, POWER9, 0, {RS}},
-{"mfmmcr0", XSPR(31,339,779), XSPR_MASK, POWER7, 0, {RS}},
-{"mfusiar", XSPR(31,339,780), XSPR_MASK, POWER9, 0, {RS}},
-{"mfsiar", XSPR(31,339,780), XSPR_MASK, POWER9, 0, {RS}},
-{"mfusdar", XSPR(31,339,781), XSPR_MASK, POWER9, 0, {RS}},
-{"mfsdar", XSPR(31,339,781), XSPR_MASK, POWER9, 0, {RS}},
-{"mfummcr1", XSPR(31,339,782), XSPR_MASK, POWER9, 0, {RS}},
-{"mfmmcr1", XSPR(31,339,782), XSPR_MASK, POWER7, 0, {RS}},
-{"mfmi_ctr", XSPR(31,339,784), XSPR_MASK, PPC860, 0, {RT}},
-{"mfmi_ap", XSPR(31,339,786), XSPR_MASK, PPC860, 0, {RT}},
-{"mfmi_epn", XSPR(31,339,787), XSPR_MASK, PPC860, 0, {RT}},
-{"mfmi_twc", XSPR(31,339,789), XSPR_MASK, PPC860, 0, {RT}},
-{"mfmi_rpn", XSPR(31,339,790), XSPR_MASK, PPC860, 0, {RT}},
-{"mfmd_ctr", XSPR(31,339,792), XSPR_MASK, PPC860, 0, {RT}},
-{"mfm_casid", XSPR(31,339,793), XSPR_MASK, PPC860, 0, {RT}},
-{"mfmd_ap", XSPR(31,339,794), XSPR_MASK, PPC860, 0, {RT}},
-{"mfmd_epn", XSPR(31,339,795), XSPR_MASK, PPC860, 0, {RT}},
-{"mfmd_twb", XSPR(31,339,796), XSPR_MASK, PPC860, 0, {RT}},
-{"mfmd_twc", XSPR(31,339,797), XSPR_MASK, PPC860, 0, {RT}},
-{"mfmd_rpn", XSPR(31,339,798), XSPR_MASK, PPC860, 0, {RT}},
-{"mfm_tw", XSPR(31,339,799), XSPR_MASK, PPC860, 0, {RT}},
-{"mfbescrs", XSPR(31,339,800), XSPR_MASK, POWER9, 0, {RS}},
-{"mfbescrsu", XSPR(31,339,801), XSPR_MASK, POWER9, 0, {RS}},
-{"mfbescrr", XSPR(31,339,802), XSPR_MASK, POWER9, 0, {RS}},
-{"mfbescrru", XSPR(31,339,803), XSPR_MASK, POWER9, 0, {RS}},
-{"mfebbhr", XSPR(31,339,804), XSPR_MASK, POWER9, 0, {RS}},
-{"mfebbrr", XSPR(31,339,805), XSPR_MASK, POWER9, 0, {RS}},
-{"mfbescr", XSPR(31,339,806), XSPR_MASK, POWER9, 0, {RS}},
-{"mftar", XSPR(31,339,815), XSPR_MASK, POWER9, 0, {RS}},
-{"mfasdr", XSPR(31,339,816), XSPR_MASK, POWER10, 0, {RS}},
-{"mfmi_dbcam", XSPR(31,339,816), XSPR_MASK, PPC860, 0, {RT}},
-{"mfmi_dbram0", XSPR(31,339,817), XSPR_MASK, PPC860, 0, {RT}},
-{"mfmi_dbram1", XSPR(31,339,818), XSPR_MASK, PPC860, 0, {RT}},
-{"mfpsscr", XSPR(31,339,823), XSPR_MASK, POWER10, 0, {RS}},
-{"mfmd_dbcam", XSPR(31,339,824), XSPR_MASK, PPC860, 0, {RT}},
-{"mfmd_dbram0", XSPR(31,339,825), XSPR_MASK, PPC860, 0, {RT}},
-{"mfmd_dbram1", XSPR(31,339,826), XSPR_MASK, PPC860, 0, {RT}},
-{"mfic", XSPR(31,339,848), XSPR_MASK, POWER8, 0, {RS}},
-{"mfvtb", XSPR(31,339,849), XSPR_MASK, POWER8, 0, {RS}},
-{"mfhpsscr", XSPR(31,339,855), XSPR_MASK, POWER10, 0, {RS}},
-{"mfivndx", XSPR(31,339,880), XSPR_MASK, TITAN, 0, {RT}},
-{"mfdvndx", XSPR(31,339,881), XSPR_MASK, TITAN, 0, {RT}},
-{"mfivlim", XSPR(31,339,882), XSPR_MASK, TITAN, 0, {RT}},
-{"mfdvlim", XSPR(31,339,883), XSPR_MASK, TITAN, 0, {RT}},
-{"mfclcsr", XSPR(31,339,884), XSPR_MASK, TITAN, 0, {RT}},
-{"mfccr1", XSPR(31,339,888), XSPR_MASK, TITAN, 0, {RT}},
-{"mfppr", XSPR(31,339,896), XSPR_MASK, POWER7, 0, {RT}},
-{"mfppr32", XSPR(31,339,898), XSPR_MASK, POWER7, 0, {RT}},
-{"mfgqr", XSPR(31,339,912), XSPRGQR_MASK, PPCPS, 0, {RT, SPRGQR}},
-{"mfhid2", XSPR(31,339,920), XSPR_MASK, GEKKO, 0, {RT}},
-{"mfwpar", XSPR(31,339,921), XSPR_MASK, GEKKO, 0, {RT}},
-{"mfdmau", XSPR(31,339,922), XSPR_MASK, GEKKO, 0, {RT}},
-{"mfdmal", XSPR(31,339,923), XSPR_MASK, GEKKO, 0, {RT}},
-{"mfrstcfg", XSPR(31,339,923), XSPR_MASK, TITAN, 0, {RT}},
-{"mfdcdbtrl", XSPR(31,339,924), XSPR_MASK, TITAN, 0, {RT}},
-{"mfdcdbtrh", XSPR(31,339,925), XSPR_MASK, TITAN, 0, {RT}},
-{"mficdbtr", XSPR(31,339,927), XSPR_MASK, TITAN, 0, {RT}},
-{"mfummcr0", XSPR(31,339,936), XSPR_MASK, PPC750, 0, {RT}},
-{"mfupmc1", XSPR(31,339,937), XSPR_MASK, PPC750, 0, {RT}},
-{"mfupmc2", XSPR(31,339,938), XSPR_MASK, PPC750, 0, {RT}},
-{"mfusia", XSPR(31,339,939), XSPR_MASK, PPC750, 0, {RT}},
-{"mfummcr1", XSPR(31,339,940), XSPR_MASK, PPC750, 0, {RT}},
-{"mfupmc3", XSPR(31,339,941), XSPR_MASK, PPC750, 0, {RT}},
-{"mfupmc4", XSPR(31,339,942), XSPR_MASK, PPC750, 0, {RT}},
-{"mfzpr", XSPR(31,339,944), XSPR_MASK, PPC403, 0, {RT}},
-{"mfpid", XSPR(31,339,945), XSPR_MASK, PPC403, 0, {RT}},
-{"mfmmucr", XSPR(31,339,946), XSPR_MASK, TITAN, 0, {RT}},
-{"mfccr0", XSPR(31,339,947), XSPR_MASK, PPC405|TITAN, 0, {RT}},
-{"mfiac3", XSPR(31,339,948), XSPR_MASK, PPC405, 0, {RT}},
-{"mfiac4", XSPR(31,339,949), XSPR_MASK, PPC405, 0, {RT}},
-{"mfdvc1", XSPR(31,339,950), XSPR_MASK, PPC405, 0, {RT}},
-{"mfdvc2", XSPR(31,339,951), XSPR_MASK, PPC405, 0, {RT}},
-{"mfmmcr0", XSPR(31,339,952), XSPR_MASK, PPC750, 0, {RT}},
-{"mfpmc1", XSPR(31,339,953), XSPR_MASK, PPC750, 0, {RT}},
-{"mfsgr", XSPR(31,339,953), XSPR_MASK, PPC403, 0, {RT}},
-{"mfdcwr", XSPR(31,339,954), XSPR_MASK, PPC403, 0, {RT}},
-{"mfpmc2", XSPR(31,339,954), XSPR_MASK, PPC750, 0, {RT}},
-{"mfsia", XSPR(31,339,955), XSPR_MASK, PPC750, 0, {RT}},
-{"mfsler", XSPR(31,339,955), XSPR_MASK, PPC405, 0, {RT}},
-{"mfmmcr1", XSPR(31,339,956), XSPR_MASK, PPC750, 0, {RT}},
-{"mfsu0r", XSPR(31,339,956), XSPR_MASK, PPC405, 0, {RT}},
-{"mfdbcr1", XSPR(31,339,957), XSPR_MASK, PPC405, 0, {RT}},
-{"mfpmc3", XSPR(31,339,957), XSPR_MASK, PPC750, 0, {RT}},
-{"mfpmc4", XSPR(31,339,958), XSPR_MASK, PPC750, 0, {RT}},
-{"mficdbdr", XSPR(31,339,979), XSPR_MASK, PPC403|TITAN, 0, {RT}},
-{"mfesr", XSPR(31,339,980), XSPR_MASK, PPC403, 0, {RT}},
-{"mfdear", XSPR(31,339,981), XSPR_MASK, PPC403, 0, {RT}},
-{"mfevpr", XSPR(31,339,982), XSPR_MASK, PPC403, 0, {RT}},
-{"mfcdbcr", XSPR(31,339,983), XSPR_MASK, PPC403, 0, {RT}},
-{"mftsr", XSPR(31,339,984), XSPR_MASK, PPC403, 0, {RT}},
-{"mftcr", XSPR(31,339,986), XSPR_MASK, PPC403, 0, {RT}},
-{"mfpit", XSPR(31,339,987), XSPR_MASK, PPC403, 0, {RT}},
-{"mftbhi", XSPR(31,339,988), XSPR_MASK, PPC403, 0, {RT}},
-{"mftblo", XSPR(31,339,989), XSPR_MASK, PPC403, 0, {RT}},
-{"mfsrr2", XSPR(31,339,990), XSPR_MASK, PPC403, 0, {RT}},
-{"mfsrr3", XSPR(31,339,991), XSPR_MASK, PPC403, 0, {RT}},
-{"mfdbsr", XSPR(31,339,1008), XSPR_MASK, PPC403, 0, {RT}},
-{"mfhid0", XSPR(31,339,1008), XSPR_MASK, GEKKO, 0, {RT}},
-{"mfhid1", XSPR(31,339,1009), XSPR_MASK, GEKKO, 0, {RT}},
-{"mfdbcr0", XSPR(31,339,1010), XSPR_MASK, PPC405, 0, {RT}},
-{"mfiabr", XSPR(31,339,1010), XSPR_MASK, GEKKO, 0, {RT}},
-{"mfhid4", XSPR(31,339,1011), XSPR_MASK, BROADWAY, 0, {RT}},
-{"mfdbdr", XSPR(31,339,1011), XSPR_MASK, TITAN, 0, {RS}},
-{"mfiac1", XSPR(31,339,1012), XSPR_MASK, PPC403, 0, {RT}},
-{"mfiac2", XSPR(31,339,1013), XSPR_MASK, PPC403, 0, {RT}},
-{"mfdabr", XSPR(31,339,1013), XSPR_MASK, PPC750, 0, {RT}},
-{"mfdac1", XSPR(31,339,1014), XSPR_MASK, PPC403, 0, {RT}},
-{"mfdac2", XSPR(31,339,1015), XSPR_MASK, PPC403, 0, {RT}},
-{"mfl2cr", XSPR(31,339,1017), XSPR_MASK, PPC750, 0, {RT}},
-{"mfdccr", XSPR(31,339,1018), XSPR_MASK, PPC403, 0, {RT}},
-{"mficcr", XSPR(31,339,1019), XSPR_MASK, PPC403, 0, {RT}},
-{"mfictc", XSPR(31,339,1019), XSPR_MASK, PPC750, 0, {RT}},
-{"mfpbl1", XSPR(31,339,1020), XSPR_MASK, PPC403, 0, {RT}},
-{"mfthrm1", XSPR(31,339,1020), XSPR_MASK, PPC750, 0, {RT}},
-{"mfpbu1", XSPR(31,339,1021), XSPR_MASK, PPC403, 0, {RT}},
-{"mfthrm2", XSPR(31,339,1021), XSPR_MASK, PPC750, 0, {RT}},
-{"mfpbl2", XSPR(31,339,1022), XSPR_MASK, PPC403, 0, {RT}},
-{"mfthrm3", XSPR(31,339,1022), XSPR_MASK, PPC750, 0, {RT}},
-{"mfpir", XSPR(31,339,1023), XSPR_MASK, POWER10, 0, {RT}},
-{"mfpbu2", XSPR(31,339,1023), XSPR_MASK, PPC403, 0, {RT}},
+{"mfmq", XSPR(31,339, 0), XSPR_MASK, M601, EXT, {RT}},
+{"mfxer", XSPR(31,339, 1), XSPR_MASK, COM, EXT, {RT}},
+{"mfudscr", XSPR(31,339, 3), XSPR_MASK, POWER9, EXT, {RS}},
+{"mfrtcu", XSPR(31,339, 4), XSPR_MASK, COM, TITAN|EXT, {RT}},
+{"mfrtcl", XSPR(31,339, 5), XSPR_MASK, COM, TITAN|EXT, {RT}},
+{"mfdec", XSPR(31,339, 6), XSPR_MASK, MFDEC1, EXT, {RT}},
+{"mflr", XSPR(31,339, 8), XSPR_MASK, COM, EXT, {RT}},
+{"mfctr", XSPR(31,339, 9), XSPR_MASK, COM, EXT, {RT}},
+{"mfuamr", XSPR(31,339, 13), XSPR_MASK, POWER9, EXT, {RS}},
+{"mfdscr", XSPR(31,339, 17), XSPR_MASK, POWER6, EXT, {RT}},
+{"mftid", XSPR(31,339, 17), XSPR_MASK, POWER, EXT, {RT}},
+{"mfdsisr", XSPR(31,339, 18), XSPR_MASK, COM, TITAN|EXT, {RT}},
+{"mfdar", XSPR(31,339, 19), XSPR_MASK, COM, TITAN|EXT, {RT}},
+{"mfdec", XSPR(31,339, 22), XSPR_MASK, MFDEC2, MFDEC1|EXT, {RT}},
+{"mfsdr0", XSPR(31,339, 24), XSPR_MASK, POWER, EXT, {RT}},
+{"mfsdr1", XSPR(31,339, 25), XSPR_MASK, COM, TITAN|EXT, {RT}},
+{"mfsrr0", XSPR(31,339, 26), XSPR_MASK, COM, EXT, {RT}},
+{"mfsrr1", XSPR(31,339, 27), XSPR_MASK, COM, EXT, {RT}},
+{"mfcfar", XSPR(31,339, 28), XSPR_MASK, POWER6, EXT, {RT}},
+{"mfamr", XSPR(31,339, 29), XSPR_MASK, POWER7, EXT, {RS}},
+{"mfpidr", XSPR(31,339, 48), XSPR_MASK, POWER10, EXT, {RS}},
+{"mfpid", XSPR(31,339, 48), XSPR_MASK, BOOKE, EXT, {RT}},
+{"mfcsrr0", XSPR(31,339, 58), XSPR_MASK, BOOKE, EXT, {RT}},
+{"mfcsrr1", XSPR(31,339, 59), XSPR_MASK, BOOKE, EXT, {RT}},
+{"mfiamr", XSPR(31,339, 61), XSPR_MASK, POWER10, EXT, {RS}},
+{"mfdear", XSPR(31,339, 61), XSPR_MASK, BOOKE, EXT, {RT}},
+{"mfesr", XSPR(31,339, 62), XSPR_MASK, BOOKE, EXT, {RT}},
+{"mfivpr", XSPR(31,339, 63), XSPR_MASK, BOOKE, EXT, {RT}},
+{"mfctrl", XSPR(31,339,136), XSPR_MASK, POWER4, EXT, {RT}},
+{"mfcmpa", XSPR(31,339,144), XSPR_MASK, PPC860, EXT, {RT}},
+{"mfcmpb", XSPR(31,339,145), XSPR_MASK, PPC860, EXT, {RT}},
+{"mfcmpc", XSPR(31,339,146), XSPR_MASK, PPC860, EXT, {RT}},
+{"mfcmpd", XSPR(31,339,147), XSPR_MASK, PPC860, EXT, {RT}},
+{"mficr", XSPR(31,339,148), XSPR_MASK, PPC860, EXT, {RT}},
+{"mfder", XSPR(31,339,149), XSPR_MASK, PPC860, EXT, {RT}},
+{"mfcounta", XSPR(31,339,150), XSPR_MASK, PPC860, EXT, {RT}},
+{"mfcountb", XSPR(31,339,151), XSPR_MASK, PPC860, EXT, {RT}},
+{"mfcmpe", XSPR(31,339,152), XSPR_MASK, PPC860, EXT, {RT}},
+{"mffscr", XSPR(31,339,153), XSPR_MASK, POWER10, EXT, {RS}},
+{"mfcmpf", XSPR(31,339,153), XSPR_MASK, PPC860, EXT, {RT}},
+{"mfcmpg", XSPR(31,339,154), XSPR_MASK, PPC860, EXT, {RT}},
+{"mfcmph", XSPR(31,339,155), XSPR_MASK, PPC860, EXT, {RT}},
+{"mflctrl1", XSPR(31,339,156), XSPR_MASK, PPC860, EXT, {RT}},
+{"mfuamor", XSPR(31,339,157), XSPR_MASK, POWER7, EXT, {RS}},
+{"mflctrl2", XSPR(31,339,157), XSPR_MASK, PPC860, EXT, {RT}},
+{"mfictrl", XSPR(31,339,158), XSPR_MASK, PPC860, EXT, {RT}},
+{"mfpspb", XSPR(31,339,159), XSPR_MASK, POWER10, EXT, {RS}},
+{"mfbar", XSPR(31,339,159), XSPR_MASK, PPC860, EXT, {RT}},
+{"mfdpdes", XSPR(31,339,176), XSPR_MASK, POWER10, EXT, {RS}},
+{"mfdawr0", XSPR(31,339,180), XSPR_MASK, POWER10, EXT, {RS}},
+{"mfdawr1", XSPR(31,339,181), XSPR_MASK, POWER10, EXT, {RS}},
+{"mfrpr", XSPR(31,339,186), XSPR_MASK, POWER10, EXT, {RS}},
+{"mfciabr", XSPR(31,339,187), XSPR_MASK, POWER10, EXT, {RS}},
+{"mfdawrx0", XSPR(31,339,188), XSPR_MASK, POWER10, EXT, {RS}},
+{"mfdawrx1", XSPR(31,339,189), XSPR_MASK, POWER10, EXT, {RS}},
+{"mfhfscr", XSPR(31,339,190), XSPR_MASK, POWER10, EXT, {RS}},
+{"mfvrsave", XSPR(31,339,256), XSPR_MASK, PPCVEC, EXT, {RT}},
+{"mfusprg0", XSPR(31,339,256), XSPR_MASK, BOOKE, EXT, {RT}},
+{"mfsprg", XSPR(31,339,256), XSPRG_MASK, PPC, EXT, {RT, SPRG}},
+{"mfusprg3", XSPR(31,339,259), XSPR_MASK, POWER10, EXT, {RT}},
+{"mfsprg4", XSPR(31,339,260), XSPR_MASK, PPC405|BOOKE, EXT, {RT}},
+{"mfsprg5", XSPR(31,339,261), XSPR_MASK, PPC405|BOOKE, EXT, {RT}},
+{"mfsprg6", XSPR(31,339,262), XSPR_MASK, PPC405|BOOKE, EXT, {RT}},
+{"mfsprg7", XSPR(31,339,263), XSPR_MASK, PPC405|BOOKE, EXT, {RT}},
+{"mftbu", XSPR(31,339,269), XSPR_MASK, POWER4|BOOKE, EXT, {RT}},
+{"mftb", X(31,339), X_MASK, POWER4|BOOKE, EXT, {RT, TBR}},
+{"mftbl", XSPR(31,339,268), XSPR_MASK, POWER4|BOOKE, EXT, {RT}},
+{"mfsprg0", XSPR(31,339,272), XSPR_MASK, PPC, EXT, {RT}},
+{"mfsprg1", XSPR(31,339,273), XSPR_MASK, PPC, EXT, {RT}},
+{"mfsprg2", XSPR(31,339,274), XSPR_MASK, PPC, EXT, {RT}},
+{"mfsprg3", XSPR(31,339,275), XSPR_MASK, PPC, EXT, {RT}},
+{"mfasr", XSPR(31,339,280), XSPR_MASK, PPC64, EXT, {RT}},
+{"mfear", XSPR(31,339,282), XSPR_MASK, PPC, TITAN|EXT, {RT}},
+{"mfpir", XSPR(31,339,286), XSPR_MASK, BOOKE, EXT, {RT}},
+{"mfpvr", XSPR(31,339,287), XSPR_MASK, PPC, EXT, {RT}},
+{"mfhsprg0", XSPR(31,339,304), XSPR_MASK, POWER10, EXT, {RS}},
+{"mfdbsr", XSPR(31,339,304), XSPR_MASK, BOOKE, EXT, {RT}},
+{"mfhsprg1", XSPR(31,339,305), XSPR_MASK, POWER10, EXT, {RS}},
+{"mfhdisr", XSPR(31,339,306), XSPR_MASK, POWER10, EXT, {RS}},
+{"mfhdar", XSPR(31,339,307), XSPR_MASK, POWER10, EXT, {RS}},
+{"mfspurr", XSPR(31,339,308), XSPR_MASK, POWER10, EXT, {RS}},
+{"mfdbcr0", XSPR(31,339,308), XSPR_MASK, BOOKE, EXT, {RT}},
+{"mfpurr", XSPR(31,339,309), XSPR_MASK, POWER10, EXT, {RS}},
+{"mfdbcr1", XSPR(31,339,309), XSPR_MASK, BOOKE, EXT, {RT}},
+{"mfhdec", XSPR(31,339,310), XSPR_MASK, POWER10, EXT, {RS}},
+{"mfdbcr2", XSPR(31,339,310), XSPR_MASK, BOOKE, EXT, {RT}},
+{"mfiac1", XSPR(31,339,312), XSPR_MASK, BOOKE, EXT, {RT}},
+{"mfhrmor", XSPR(31,339,313), XSPR_MASK, POWER10, EXT, {RS}},
+{"mfiac2", XSPR(31,339,313), XSPR_MASK, BOOKE, EXT, {RT}},
+{"mfhsrr0", XSPR(31,339,314), XSPR_MASK, POWER10, EXT, {RS}},
+{"mfiac3", XSPR(31,339,314), XSPR_MASK, BOOKE, EXT, {RT}},
+{"mfhsrr1", XSPR(31,339,315), XSPR_MASK, POWER10, EXT, {RS}},
+{"mfiac4", XSPR(31,339,315), XSPR_MASK, BOOKE, EXT, {RT}},
+{"mfdac1", XSPR(31,339,316), XSPR_MASK, BOOKE, EXT, {RT}},
+{"mfdac2", XSPR(31,339,317), XSPR_MASK, BOOKE, EXT, {RT}},
+{"mflpcr", XSPR(31,339,318), XSPR_MASK, POWER10, EXT, {RS}},
+{"mfdvc1", XSPR(31,339,318), XSPR_MASK, BOOKE, EXT, {RT}},
+{"mflpidr", XSPR(31,339,319), XSPR_MASK, POWER10, EXT, {RS}},
+{"mfdvc2", XSPR(31,339,319), XSPR_MASK, BOOKE, EXT, {RT}},
+{"mfhmer", XSPR(31,339,336), XSPR_MASK, POWER7, EXT, {RS}},
+{"mftsr", XSPR(31,339,336), XSPR_MASK, BOOKE, EXT, {RT}},
+{"mfhmeer", XSPR(31,339,337), XSPR_MASK, POWER7, EXT, {RS}},
+{"mfpcr", XSPR(31,339,338), XSPR_MASK, POWER10, EXT, {RS}},
+{"mfheir", XSPR(31,339,339), XSPR_MASK, POWER10, EXT, {RS}},
+{"mftcr", XSPR(31,339,340), XSPR_MASK, BOOKE, EXT, {RT}},
+{"mfamor", XSPR(31,339,349), XSPR_MASK, POWER7, EXT, {RS}},
+{"mfivor0", XSPR(31,339,400), XSPR_MASK, BOOKE, EXT, {RT}},
+{"mfivor1", XSPR(31,339,401), XSPR_MASK, BOOKE, EXT, {RT}},
+{"mfivor2", XSPR(31,339,402), XSPR_MASK, BOOKE, EXT, {RT}},
+{"mfivor3", XSPR(31,339,403), XSPR_MASK, BOOKE, EXT, {RT}},
+{"mfivor4", XSPR(31,339,404), XSPR_MASK, BOOKE, EXT, {RT}},
+{"mfivor5", XSPR(31,339,405), XSPR_MASK, BOOKE, EXT, {RT}},
+{"mfivor6", XSPR(31,339,406), XSPR_MASK, BOOKE, EXT, {RT}},
+{"mfivor7", XSPR(31,339,407), XSPR_MASK, BOOKE, EXT, {RT}},
+{"mfivor8", XSPR(31,339,408), XSPR_MASK, BOOKE, EXT, {RT}},
+{"mfivor9", XSPR(31,339,409), XSPR_MASK, BOOKE, EXT, {RT}},
+{"mfivor10", XSPR(31,339,410), XSPR_MASK, BOOKE, EXT, {RT}},
+{"mfivor11", XSPR(31,339,411), XSPR_MASK, BOOKE, EXT, {RT}},
+{"mfivor12", XSPR(31,339,412), XSPR_MASK, BOOKE, EXT, {RT}},
+{"mfivor13", XSPR(31,339,413), XSPR_MASK, BOOKE, EXT, {RT}},
+{"mfivor14", XSPR(31,339,414), XSPR_MASK, BOOKE, EXT, {RT}},
+{"mfivor15", XSPR(31,339,415), XSPR_MASK, BOOKE, EXT, {RT}},
+{"mftir", XSPR(31,339,446), XSPR_MASK, POWER10, EXT, {RS}},
+{"mfptcr", XSPR(31,339,464), XSPR_MASK, POWER10, EXT, {RS}},
+{"mfusprg0", XSPR(31,339,496), XSPR_MASK, POWER10, EXT, {RS}},
+{"mfusprg1", XSPR(31,339,497), XSPR_MASK, POWER10, EXT, {RS}},
+{"mfurmor", XSPR(31,339,505), XSPR_MASK, POWER10, EXT, {RS}},
+{"mfusrr0", XSPR(31,339,506), XSPR_MASK, POWER10, EXT, {RS}},
+{"mfusrr1", XSPR(31,339,507), XSPR_MASK, POWER10, EXT, {RS}},
+{"mfsmfctrl", XSPR(31,339,511), XSPR_MASK, POWER10, EXT, {RS}},
+{"mfspefscr", XSPR(31,339,512), XSPR_MASK, PPCSPE, EXT, {RT}},
+{"mfbbear", XSPR(31,339,513), XSPR_MASK, PPCBRLK, EXT, {RT}},
+{"mfbbtar", XSPR(31,339,514), XSPR_MASK, PPCBRLK, EXT, {RT}},
+{"mfivor32", XSPR(31,339,528), XSPR_MASK, PPCSPE|E6500, EXT, {RT}},
+{"mfivor33", XSPR(31,339,529), XSPR_MASK, PPCSPE|E6500, EXT, {RT}},
+{"mfivor34", XSPR(31,339,530), XSPR_MASK, PPCSPE, EXT, {RT}},
+{"mfivor35", XSPR(31,339,531), XSPR_MASK, PPCPMR, EXT, {RT}},
+{"mfibatu", XSPR(31,339,528), XSPRBAT_MASK, PPC, TITAN|EXT, {RT, SPRBAT}},
+{"mfibatl", XSPR(31,339,529), XSPRBAT_MASK, PPC, TITAN|EXT, {RT, SPRBAT}},
+{"mfdbatu", XSPR(31,339,536), XSPRBAT_MASK, PPC, TITAN|EXT, {RT, SPRBAT}},
+{"mfdbatl", XSPR(31,339,537), XSPRBAT_MASK, PPC, TITAN|EXT, {RT, SPRBAT}},
+{"mfic_cst", XSPR(31,339,560), XSPR_MASK, PPC860, EXT, {RT}},
+{"mfic_adr", XSPR(31,339,561), XSPR_MASK, PPC860, EXT, {RT}},
+{"mfic_dat", XSPR(31,339,562), XSPR_MASK, PPC860, EXT, {RT}},
+{"mfdc_cst", XSPR(31,339,568), XSPR_MASK, PPC860, EXT, {RT}},
+{"mfdc_adr", XSPR(31,339,569), XSPR_MASK, PPC860, EXT, {RT}},
+{"mfdc_dat", XSPR(31,339,570), XSPR_MASK, PPC860, EXT, {RT}},
+{"mfmcsrr0", XSPR(31,339,570), XSPR_MASK, PPCRFMCI, EXT, {RT}},
+{"mfmcsrr1", XSPR(31,339,571), XSPR_MASK, PPCRFMCI, EXT, {RT}},
+{"mfmcsr", XSPR(31,339,572), XSPR_MASK, PPCRFMCI, EXT, {RT}},
+{"mfmcar", XSPR(31,339,573), XSPR_MASK, PPCRFMCI, TITAN|EXT, {RT}},
+{"mfdpdr", XSPR(31,339,630), XSPR_MASK, PPC860, EXT, {RT}},
+{"mfdpir", XSPR(31,339,631), XSPR_MASK, PPC860, EXT, {RT}},
+{"mfimmr", XSPR(31,339,638), XSPR_MASK, PPC860, EXT, {RT}},
+{"mfusier2", XSPR(31,339,736), XSPR_MASK, POWER10, EXT, {RT}},
+{"mfsier2", XSPR(31,339,736), XSPR_MASK, POWER10, EXT, {RT}},
+{"mfusier3", XSPR(31,339,737), XSPR_MASK, POWER10, EXT, {RT}},
+{"mfsier3", XSPR(31,339,737), XSPR_MASK, POWER10, EXT, {RT}},
+{"mfummcr3", XSPR(31,339,738), XSPR_MASK, POWER10, EXT, {RT}},
+{"mfmmcr3", XSPR(31,339,738), XSPR_MASK, POWER10, EXT, {RT}},
+{"mfusier", XSPR(31,339,768), XSPR_MASK, POWER10, EXT, {RT}},
+{"mfsier", XSPR(31,339,768), XSPR_MASK, POWER10, EXT, {RT}},
+{"mfummcr2", XSPR(31,339,769), XSPR_MASK, POWER9, EXT, {RT}},
+{"mfmmcr2", XSPR(31,339,769), XSPR_MASK, POWER9, EXT, {RT}},
+{"mfummcra", XSPR(31,339,770), XSPR_MASK, POWER9, EXT, {RS}},
+{"mfmmcra", XSPR(31,339,770), XSPR_MASK, POWER7, EXT, {RS}},
+{"mfupmc1", XSPR(31,339,771), XSPR_MASK, POWER9, EXT, {RT}},
+{"mfpmc1", XSPR(31,339,771), XSPR_MASK, POWER7, EXT, {RT}},
+{"mfupmc2", XSPR(31,339,772), XSPR_MASK, POWER9, EXT, {RT}},
+{"mfpmc2", XSPR(31,339,772), XSPR_MASK, POWER7, EXT, {RT}},
+{"mfupmc3", XSPR(31,339,773), XSPR_MASK, POWER9, EXT, {RT}},
+{"mfpmc3", XSPR(31,339,773), XSPR_MASK, POWER7, EXT, {RT}},
+{"mfupmc4", XSPR(31,339,774), XSPR_MASK, POWER9, EXT, {RT}},
+{"mfpmc4", XSPR(31,339,774), XSPR_MASK, POWER7, EXT, {RT}},
+{"mfupmc5", XSPR(31,339,775), XSPR_MASK, POWER9, EXT, {RT}},
+{"mfpmc5", XSPR(31,339,775), XSPR_MASK, POWER7, EXT, {RT}},
+{"mfupmc6", XSPR(31,339,776), XSPR_MASK, POWER9, EXT, {RT}},
+{"mfpmc6", XSPR(31,339,776), XSPR_MASK, POWER7, EXT, {RT}},
+{"mfummcr0", XSPR(31,339,779), XSPR_MASK, POWER9, EXT, {RS}},
+{"mfmmcr0", XSPR(31,339,779), XSPR_MASK, POWER7, EXT, {RS}},
+{"mfusiar", XSPR(31,339,780), XSPR_MASK, POWER9, EXT, {RS}},
+{"mfsiar", XSPR(31,339,780), XSPR_MASK, POWER9, EXT, {RS}},
+{"mfusdar", XSPR(31,339,781), XSPR_MASK, POWER9, EXT, {RS}},
+{"mfsdar", XSPR(31,339,781), XSPR_MASK, POWER9, EXT, {RS}},
+{"mfummcr1", XSPR(31,339,782), XSPR_MASK, POWER9, EXT, {RS}},
+{"mfmmcr1", XSPR(31,339,782), XSPR_MASK, POWER7, EXT, {RS}},
+{"mfmi_ctr", XSPR(31,339,784), XSPR_MASK, PPC860, EXT, {RT}},
+{"mfmi_ap", XSPR(31,339,786), XSPR_MASK, PPC860, EXT, {RT}},
+{"mfmi_epn", XSPR(31,339,787), XSPR_MASK, PPC860, EXT, {RT}},
+{"mfmi_twc", XSPR(31,339,789), XSPR_MASK, PPC860, EXT, {RT}},
+{"mfmi_rpn", XSPR(31,339,790), XSPR_MASK, PPC860, EXT, {RT}},
+{"mfmd_ctr", XSPR(31,339,792), XSPR_MASK, PPC860, EXT, {RT}},
+{"mfm_casid", XSPR(31,339,793), XSPR_MASK, PPC860, EXT, {RT}},
+{"mfmd_ap", XSPR(31,339,794), XSPR_MASK, PPC860, EXT, {RT}},
+{"mfmd_epn", XSPR(31,339,795), XSPR_MASK, PPC860, EXT, {RT}},
+{"mfmd_twb", XSPR(31,339,796), XSPR_MASK, PPC860, EXT, {RT}},
+{"mfmd_twc", XSPR(31,339,797), XSPR_MASK, PPC860, EXT, {RT}},
+{"mfmd_rpn", XSPR(31,339,798), XSPR_MASK, PPC860, EXT, {RT}},
+{"mfm_tw", XSPR(31,339,799), XSPR_MASK, PPC860, EXT, {RT}},
+{"mfbescrs", XSPR(31,339,800), XSPR_MASK, POWER9, EXT, {RS}},
+{"mfbescrsu", XSPR(31,339,801), XSPR_MASK, POWER9, EXT, {RS}},
+{"mfbescrr", XSPR(31,339,802), XSPR_MASK, POWER9, EXT, {RS}},
+{"mfbescrru", XSPR(31,339,803), XSPR_MASK, POWER9, EXT, {RS}},
+{"mfebbhr", XSPR(31,339,804), XSPR_MASK, POWER9, EXT, {RS}},
+{"mfebbrr", XSPR(31,339,805), XSPR_MASK, POWER9, EXT, {RS}},
+{"mfbescr", XSPR(31,339,806), XSPR_MASK, POWER9, EXT, {RS}},
+{"mftar", XSPR(31,339,815), XSPR_MASK, POWER9, EXT, {RS}},
+{"mfasdr", XSPR(31,339,816), XSPR_MASK, POWER10, EXT, {RS}},
+{"mfmi_dbcam", XSPR(31,339,816), XSPR_MASK, PPC860, EXT, {RT}},
+{"mfmi_dbram0", XSPR(31,339,817), XSPR_MASK, PPC860, EXT, {RT}},
+{"mfmi_dbram1", XSPR(31,339,818), XSPR_MASK, PPC860, EXT, {RT}},
+{"mfpsscr", XSPR(31,339,823), XSPR_MASK, POWER10, EXT, {RS}},
+{"mfmd_dbcam", XSPR(31,339,824), XSPR_MASK, PPC860, EXT, {RT}},
+{"mfmd_dbram0", XSPR(31,339,825), XSPR_MASK, PPC860, EXT, {RT}},
+{"mfmd_dbram1", XSPR(31,339,826), XSPR_MASK, PPC860, EXT, {RT}},
+{"mfic", XSPR(31,339,848), XSPR_MASK, POWER8, EXT, {RS}},
+{"mfvtb", XSPR(31,339,849), XSPR_MASK, POWER8, EXT, {RS}},
+{"mfhpsscr", XSPR(31,339,855), XSPR_MASK, POWER10, EXT, {RS}},
+{"mfivndx", XSPR(31,339,880), XSPR_MASK, TITAN, EXT, {RT}},
+{"mfdvndx", XSPR(31,339,881), XSPR_MASK, TITAN, EXT, {RT}},
+{"mfivlim", XSPR(31,339,882), XSPR_MASK, TITAN, EXT, {RT}},
+{"mfdvlim", XSPR(31,339,883), XSPR_MASK, TITAN, EXT, {RT}},
+{"mfclcsr", XSPR(31,339,884), XSPR_MASK, TITAN, EXT, {RT}},
+{"mfccr1", XSPR(31,339,888), XSPR_MASK, TITAN, EXT, {RT}},
+{"mfppr", XSPR(31,339,896), XSPR_MASK, POWER7, EXT, {RT}},
+{"mfppr32", XSPR(31,339,898), XSPR_MASK, POWER7, EXT, {RT}},
+{"mfgqr", XSPR(31,339,912), XSPRGQR_MASK, PPCPS, EXT, {RT, SPRGQR}},
+{"mfhid2", XSPR(31,339,920), XSPR_MASK, GEKKO, EXT, {RT}},
+{"mfwpar", XSPR(31,339,921), XSPR_MASK, GEKKO, EXT, {RT}},
+{"mfdmau", XSPR(31,339,922), XSPR_MASK, GEKKO, EXT, {RT}},
+{"mfdmal", XSPR(31,339,923), XSPR_MASK, GEKKO, EXT, {RT}},
+{"mfrstcfg", XSPR(31,339,923), XSPR_MASK, TITAN, EXT, {RT}},
+{"mfdcdbtrl", XSPR(31,339,924), XSPR_MASK, TITAN, EXT, {RT}},
+{"mfdcdbtrh", XSPR(31,339,925), XSPR_MASK, TITAN, EXT, {RT}},
+{"mficdbtr", XSPR(31,339,927), XSPR_MASK, TITAN, EXT, {RT}},
+{"mfummcr0", XSPR(31,339,936), XSPR_MASK, PPC750, EXT, {RT}},
+{"mfupmc1", XSPR(31,339,937), XSPR_MASK, PPC750, EXT, {RT}},
+{"mfupmc2", XSPR(31,339,938), XSPR_MASK, PPC750, EXT, {RT}},
+{"mfusia", XSPR(31,339,939), XSPR_MASK, PPC750, EXT, {RT}},
+{"mfummcr1", XSPR(31,339,940), XSPR_MASK, PPC750, EXT, {RT}},
+{"mfupmc3", XSPR(31,339,941), XSPR_MASK, PPC750, EXT, {RT}},
+{"mfupmc4", XSPR(31,339,942), XSPR_MASK, PPC750, EXT, {RT}},
+{"mfzpr", XSPR(31,339,944), XSPR_MASK, PPC403, EXT, {RT}},
+{"mfpid", XSPR(31,339,945), XSPR_MASK, PPC403, EXT, {RT}},
+{"mfmmucr", XSPR(31,339,946), XSPR_MASK, TITAN, EXT, {RT}},
+{"mfccr0", XSPR(31,339,947), XSPR_MASK, PPC405|TITAN, EXT, {RT}},
+{"mfiac3", XSPR(31,339,948), XSPR_MASK, PPC405, EXT, {RT}},
+{"mfiac4", XSPR(31,339,949), XSPR_MASK, PPC405, EXT, {RT}},
+{"mfdvc1", XSPR(31,339,950), XSPR_MASK, PPC405, EXT, {RT}},
+{"mfdvc2", XSPR(31,339,951), XSPR_MASK, PPC405, EXT, {RT}},
+{"mfmmcr0", XSPR(31,339,952), XSPR_MASK, PPC750, EXT, {RT}},
+{"mfpmc1", XSPR(31,339,953), XSPR_MASK, PPC750, EXT, {RT}},
+{"mfsgr", XSPR(31,339,953), XSPR_MASK, PPC403, EXT, {RT}},
+{"mfdcwr", XSPR(31,339,954), XSPR_MASK, PPC403, EXT, {RT}},
+{"mfpmc2", XSPR(31,339,954), XSPR_MASK, PPC750, EXT, {RT}},
+{"mfsia", XSPR(31,339,955), XSPR_MASK, PPC750, EXT, {RT}},
+{"mfsler", XSPR(31,339,955), XSPR_MASK, PPC405, EXT, {RT}},
+{"mfmmcr1", XSPR(31,339,956), XSPR_MASK, PPC750, EXT, {RT}},
+{"mfsu0r", XSPR(31,339,956), XSPR_MASK, PPC405, EXT, {RT}},
+{"mfdbcr1", XSPR(31,339,957), XSPR_MASK, PPC405, EXT, {RT}},
+{"mfpmc3", XSPR(31,339,957), XSPR_MASK, PPC750, EXT, {RT}},
+{"mfpmc4", XSPR(31,339,958), XSPR_MASK, PPC750, EXT, {RT}},
+{"mficdbdr", XSPR(31,339,979), XSPR_MASK, PPC403|TITAN, EXT, {RT}},
+{"mfesr", XSPR(31,339,980), XSPR_MASK, PPC403, EXT, {RT}},
+{"mfdear", XSPR(31,339,981), XSPR_MASK, PPC403, EXT, {RT}},
+{"mfevpr", XSPR(31,339,982), XSPR_MASK, PPC403, EXT, {RT}},
+{"mfcdbcr", XSPR(31,339,983), XSPR_MASK, PPC403, EXT, {RT}},
+{"mftsr", XSPR(31,339,984), XSPR_MASK, PPC403, EXT, {RT}},
+{"mftcr", XSPR(31,339,986), XSPR_MASK, PPC403, EXT, {RT}},
+{"mfpit", XSPR(31,339,987), XSPR_MASK, PPC403, EXT, {RT}},
+{"mftbhi", XSPR(31,339,988), XSPR_MASK, PPC403, EXT, {RT}},
+{"mftblo", XSPR(31,339,989), XSPR_MASK, PPC403, EXT, {RT}},
+{"mfsrr2", XSPR(31,339,990), XSPR_MASK, PPC403, EXT, {RT}},
+{"mfsrr3", XSPR(31,339,991), XSPR_MASK, PPC403, EXT, {RT}},
+{"mfdbsr", XSPR(31,339,1008), XSPR_MASK, PPC403, EXT, {RT}},
+{"mfhid0", XSPR(31,339,1008), XSPR_MASK, GEKKO, EXT, {RT}},
+{"mfhid1", XSPR(31,339,1009), XSPR_MASK, GEKKO, EXT, {RT}},
+{"mfdbcr0", XSPR(31,339,1010), XSPR_MASK, PPC405, EXT, {RT}},
+{"mfiabr", XSPR(31,339,1010), XSPR_MASK, GEKKO, EXT, {RT}},
+{"mfhid4", XSPR(31,339,1011), XSPR_MASK, BROADWAY, EXT, {RT}},
+{"mfdbdr", XSPR(31,339,1011), XSPR_MASK, TITAN, EXT, {RS}},
+{"mfiac1", XSPR(31,339,1012), XSPR_MASK, PPC403, EXT, {RT}},
+{"mfiac2", XSPR(31,339,1013), XSPR_MASK, PPC403, EXT, {RT}},
+{"mfdabr", XSPR(31,339,1013), XSPR_MASK, PPC750, EXT, {RT}},
+{"mfdac1", XSPR(31,339,1014), XSPR_MASK, PPC403, EXT, {RT}},
+{"mfdac2", XSPR(31,339,1015), XSPR_MASK, PPC403, EXT, {RT}},
+{"mfl2cr", XSPR(31,339,1017), XSPR_MASK, PPC750, EXT, {RT}},
+{"mfdccr", XSPR(31,339,1018), XSPR_MASK, PPC403, EXT, {RT}},
+{"mficcr", XSPR(31,339,1019), XSPR_MASK, PPC403, EXT, {RT}},
+{"mfictc", XSPR(31,339,1019), XSPR_MASK, PPC750, EXT, {RT}},
+{"mfpbl1", XSPR(31,339,1020), XSPR_MASK, PPC403, EXT, {RT}},
+{"mfthrm1", XSPR(31,339,1020), XSPR_MASK, PPC750, EXT, {RT}},
+{"mfpbu1", XSPR(31,339,1021), XSPR_MASK, PPC403, EXT, {RT}},
+{"mfthrm2", XSPR(31,339,1021), XSPR_MASK, PPC750, EXT, {RT}},
+{"mfpbl2", XSPR(31,339,1022), XSPR_MASK, PPC403, EXT, {RT}},
+{"mfthrm3", XSPR(31,339,1022), XSPR_MASK, PPC750, EXT, {RT}},
+{"mfpir", XSPR(31,339,1023), XSPR_MASK, POWER10, EXT, {RT}},
+{"mfpbu2", XSPR(31,339,1023), XSPR_MASK, PPC403, EXT, {RT}},
{"mfspr", X(31,339), X_MASK, COM, 0, {RT, SPR}},
{"lwax", X(31,341), X_MASK, PPC64, 0, {RT, RA0, RB}},
{"dst", XDSS(31,342,0), XDSS_MASK, PPCVEC, 0, {RA, RB, STRM}},
+{"dstt", XDSS(31,342,1), XDSS_MASK, PPCVEC, 0, {RA, RB, STRM}},
{"lhax", X(31,343), X_MASK, COM, 0, {RT, RA0, RB}},
@@ -7169,13 +7168,14 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"tlbia", X(31,370), 0xffffffff, PPC, E500|TITAN, {0}},
-{"mftbu", XSPR(31,371,269), XSPR_MASK, PPC, NO371|POWER4, {RT}},
-{"mftb", X(31,371), X_MASK, PPC, NO371|POWER4, {RT, TBR}},
-{"mftbl", XSPR(31,371,268), XSPR_MASK, PPC, NO371|POWER4, {RT}},
+{"mftbu", XSPR(31,371,269), XSPR_MASK, PPC, NO371|POWER4|EXT, {RT}},
+{"mftb", X(31,371), X_MASK, PPC, NO371|POWER4, {RT, TBR}},
+{"mftbl", XSPR(31,371,268), XSPR_MASK, PPC, NO371|POWER4|EXT, {RT}},
{"lwaux", X(31,373), X_MASK, PPC64, 0, {RT, RAL, RB}},
{"dstst", XDSS(31,374,0), XDSS_MASK, PPCVEC, 0, {RA, RB, STRM}},
+{"dststt", XDSS(31,374,1), XDSS_MASK, PPCVEC, 0, {RA, RB, STRM}},
{"lhaux", X(31,375), X_MASK, COM, 0, {RT, RAL, RB}},
@@ -7243,25 +7243,25 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"sthux", X(31,439), X_MASK, COM, 0, {RS, RAS, RB}},
/* or 1,1,1 */
-{"cctpl", 0x7c210b78, 0xffffffff, CELL, 0, {0}},
+{"cctpl", 0x7c210b78, 0xffffffff, CELL, EXT, {0}},
/* or 2,2,2 */
-{"cctpm", 0x7c421378, 0xffffffff, CELL, 0, {0}},
+{"cctpm", 0x7c421378, 0xffffffff, CELL, EXT, {0}},
/* or 3,3,3 */
-{"cctph", 0x7c631b78, 0xffffffff, CELL, 0, {0}},
+{"cctph", 0x7c631b78, 0xffffffff, CELL, EXT, {0}},
/* or 26,26,26 */
-{"miso", 0x7f5ad378, 0xffffffff, POWER8|E6500, 0, {0}},
+{"miso", 0x7f5ad378, 0xffffffff, POWER8|E6500, EXT, {0}},
/* or 27,27,27 */
-{"yield", 0x7f7bdb78, 0xffffffff, POWER7, 0, {0}},
+{"yield", 0x7f7bdb78, 0xffffffff, POWER7, EXT, {0}},
/* or 28,28,28 */
-{"mdors", 0x7f9ce378, 0xffffffff, E500MC, 0, {0}},
+{"mdors", 0x7f9ce378, 0xffffffff, E500MC, EXT, {0}},
/* or 29,29,29 */
-{"mdoio", 0x7fbdeb78, 0xffffffff, POWER7, 0, {0}},
+{"mdoio", 0x7fbdeb78, 0xffffffff, POWER7, EXT, {0}},
/* or 30,30,30 */
-{"mdoom", 0x7fdef378, 0xffffffff, POWER7, 0, {0}},
+{"mdoom", 0x7fdef378, 0xffffffff, POWER7, EXT, {0}},
-{"mr", XRC(31,444,0), X_MASK, COM, 0, {RA, RSB}},
+{"mr", XRC(31,444,0), X_MASK, COM, EXT, {RA, RSB}},
{"or", XRC(31,444,0), X_MASK, COM, 0, {RA, RS, RB}},
-{"mr.", XRC(31,444,1), X_MASK, COM, 0, {RA, RSB}},
+{"mr.", XRC(31,444,1), X_MASK, COM, EXT, {RA, RSB}},
{"or.", XRC(31,444,1), X_MASK, COM, 0, {RA, RS, RB}},
{"setnbc", X(31,448), XRB_MASK, POWER10, 0, {RT, BI}},
@@ -7321,263 +7321,263 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"slbieg", X(31,466), XRA_MASK, POWER9, 0, {RS, RB}},
-{"mtmq", XSPR(31,467, 0), XSPR_MASK, M601, 0, {RS}},
-{"mtxer", XSPR(31,467, 1), XSPR_MASK, COM, 0, {RS}},
-{"mtudscr", XSPR(31,467, 3), XSPR_MASK, POWER9, 0, {RS}},
-{"mtlr", XSPR(31,467, 8), XSPR_MASK, COM, 0, {RS}},
-{"mtctr", XSPR(31,467, 9), XSPR_MASK, COM, 0, {RS}},
-{"mtuamr", XSPR(31,467, 13), XSPR_MASK, POWER9, 0, {RS}},
-{"mtdscr", XSPR(31,467, 17), XSPR_MASK, POWER6, 0, {RS}},
-{"mttid", XSPR(31,467, 17), XSPR_MASK, POWER, 0, {RS}},
-{"mtdsisr", XSPR(31,467, 18), XSPR_MASK, COM, TITAN, {RS}},
-{"mtdar", XSPR(31,467, 19), XSPR_MASK, COM, TITAN, {RS}},
-{"mtrtcu", XSPR(31,467, 20), XSPR_MASK, COM, TITAN, {RS}},
-{"mtrtcl", XSPR(31,467, 21), XSPR_MASK, COM, TITAN, {RS}},
-{"mtdec", XSPR(31,467, 22), XSPR_MASK, COM, 0, {RS}},
-{"mtsdr0", XSPR(31,467, 24), XSPR_MASK, POWER, 0, {RS}},
-{"mtsdr1", XSPR(31,467, 25), XSPR_MASK, COM, TITAN, {RS}},
-{"mtsrr0", XSPR(31,467, 26), XSPR_MASK, COM, 0, {RS}},
-{"mtsrr1", XSPR(31,467, 27), XSPR_MASK, COM, 0, {RS}},
-{"mtcfar", XSPR(31,467, 28), XSPR_MASK, POWER6, 0, {RS}},
-{"mtamr", XSPR(31,467, 29), XSPR_MASK, POWER7, 0, {RS}},
-{"mtpidr", XSPR(31,467, 48), XSPR_MASK, POWER10, 0, {RS}},
-{"mtpid", XSPR(31,467, 48), XSPR_MASK, BOOKE, 0, {RS}},
-{"mtdecar", XSPR(31,467, 54), XSPR_MASK, BOOKE, 0, {RS}},
-{"mtcsrr0", XSPR(31,467, 58), XSPR_MASK, BOOKE, 0, {RS}},
-{"mtcsrr1", XSPR(31,467, 59), XSPR_MASK, BOOKE, 0, {RS}},
-{"mtiamr", XSPR(31,467, 61), XSPR_MASK, POWER10, 0, {RS}},
-{"mtdear", XSPR(31,467, 61), XSPR_MASK, BOOKE, 0, {RS}},
-{"mtesr", XSPR(31,467, 62), XSPR_MASK, BOOKE, 0, {RS}},
-{"mtivpr", XSPR(31,467, 63), XSPR_MASK, BOOKE, 0, {RS}},
-{"mttfhar", XSPR(31,467,128), XSPR_MASK, POWER9, 0, {RS}},
-{"mttfiar", XSPR(31,467,129), XSPR_MASK, POWER9, 0, {RS}},
-{"mttexasr", XSPR(31,467,130), XSPR_MASK, POWER9, 0, {RS}},
-{"mttexasru", XSPR(31,467,131), XSPR_MASK, POWER9, 0, {RS}},
-{"mtcmpa", XSPR(31,467,144), XSPR_MASK, PPC860, 0, {RS}},
-{"mtcmpb", XSPR(31,467,145), XSPR_MASK, PPC860, 0, {RS}},
-{"mtcmpc", XSPR(31,467,146), XSPR_MASK, PPC860, 0, {RS}},
-{"mtcmpd", XSPR(31,467,147), XSPR_MASK, PPC860, 0, {RS}},
-{"mticr", XSPR(31,467,148), XSPR_MASK, PPC860, 0, {RS}},
-{"mtder", XSPR(31,467,149), XSPR_MASK, PPC860, 0, {RS}},
-{"mtcounta", XSPR(31,467,150), XSPR_MASK, PPC860, 0, {RS}},
-{"mtcountb", XSPR(31,467,151), XSPR_MASK, PPC860, 0, {RS}},
-{"mtctrl", XSPR(31,467,152), XSPR_MASK, POWER4, 0, {RS}},
-{"mtcmpe", XSPR(31,467,152), XSPR_MASK, PPC860, 0, {RS}},
-{"mtfscr", XSPR(31,467,153), XSPR_MASK, POWER10, 0, {RS}},
-{"mtcmpf", XSPR(31,467,153), XSPR_MASK, PPC860, 0, {RS}},
-{"mtcmpg", XSPR(31,467,154), XSPR_MASK, PPC860, 0, {RS}},
-{"mtcmph", XSPR(31,467,155), XSPR_MASK, PPC860, 0, {RS}},
-{"mtlctrl1", XSPR(31,467,156), XSPR_MASK, PPC860, 0, {RS}},
-{"mtuamor", XSPR(31,467,157), XSPR_MASK, POWER7, 0, {RS}},
-{"mtlctrl2", XSPR(31,467,157), XSPR_MASK, PPC860, 0, {RS}},
-{"mtictrl", XSPR(31,467,158), XSPR_MASK, PPC860, 0, {RS}},
-{"mtpspb", XSPR(31,467,159), XSPR_MASK, POWER10, 0, {RS}},
-{"mtbar", XSPR(31,467,159), XSPR_MASK, PPC860, 0, {RS}},
-{"mtdpdes", XSPR(31,467,176), XSPR_MASK, POWER10, 0, {RS}},
-{"mtdawr0", XSPR(31,467,180), XSPR_MASK, POWER10, 0, {RS}},
-{"mtdawr1", XSPR(31,467,181), XSPR_MASK, POWER10, 0, {RS}},
-{"mtrpr", XSPR(31,467,186), XSPR_MASK, POWER10, 0, {RS}},
-{"mtciabr", XSPR(31,467,187), XSPR_MASK, POWER10, 0, {RS}},
-{"mtdawrx0", XSPR(31,467,188), XSPR_MASK, POWER10, 0, {RS}},
-{"mtdawrx1", XSPR(31,467,189), XSPR_MASK, POWER10, 0, {RS}},
-{"mthfscr", XSPR(31,467,190), XSPR_MASK, POWER10, 0, {RS}},
-{"mtvrsave", XSPR(31,467,256), XSPR_MASK, PPCVEC, 0, {RS}},
-{"mtusprg0", XSPR(31,467,256), XSPR_MASK, BOOKE, 0, {RS}},
-{"mtsprg", XSPR(31,467,256), XSPRG_MASK, PPC, 0, {SPRG, RS}},
-{"mtsprg0", XSPR(31,467,272), XSPR_MASK, PPC, 0, {RS}},
-{"mtsprg1", XSPR(31,467,273), XSPR_MASK, PPC, 0, {RS}},
-{"mtsprg2", XSPR(31,467,274), XSPR_MASK, PPC, 0, {RS}},
-{"mtsprg3", XSPR(31,467,275), XSPR_MASK, PPC, 0, {RS}},
-{"mtsprg4", XSPR(31,467,276), XSPR_MASK, PPC405|BOOKE, 0, {RS}},
-{"mtsprg5", XSPR(31,467,277), XSPR_MASK, PPC405|BOOKE, 0, {RS}},
-{"mtsprg6", XSPR(31,467,278), XSPR_MASK, PPC405|BOOKE, 0, {RS}},
-{"mtsprg7", XSPR(31,467,279), XSPR_MASK, PPC405|BOOKE, 0, {RS}},
-{"mtasr", XSPR(31,467,280), XSPR_MASK, PPC64, 0, {RS}},
-{"mtear", XSPR(31,467,282), XSPR_MASK, PPC, TITAN, {RS}},
-{"mttbl", XSPR(31,467,284), XSPR_MASK, PPC, 0, {RS}},
-{"mttbu", XSPR(31,467,285), XSPR_MASK, PPC, 0, {RS}},
-{"mttbu40", XSPR(31,467,286), XSPR_MASK, POWER10, 0, {RS}},
-{"mthsprg0", XSPR(31,467,304), XSPR_MASK, POWER10, 0, {RS}},
-{"mtdbsr", XSPR(31,467,304), XSPR_MASK, BOOKE, 0, {RS}},
-{"mthsprg1", XSPR(31,467,305), XSPR_MASK, POWER10, 0, {RS}},
-{"mthdisr", XSPR(31,467,306), XSPR_MASK, POWER10, 0, {RS}},
-{"mthdar", XSPR(31,467,307), XSPR_MASK, POWER10, 0, {RS}},
-{"mtspurr", XSPR(31,467,308), XSPR_MASK, POWER10, 0, {RS}},
-{"mtdbcr0", XSPR(31,467,308), XSPR_MASK, BOOKE, 0, {RS}},
-{"mtpurr", XSPR(31,467,309), XSPR_MASK, POWER10, 0, {RS}},
-{"mtdbcr1", XSPR(31,467,309), XSPR_MASK, BOOKE, 0, {RS}},
-{"mthdec", XSPR(31,467,310), XSPR_MASK, POWER10, 0, {RS}},
-{"mtdbcr2", XSPR(31,467,310), XSPR_MASK, BOOKE, 0, {RS}},
-{"mtiac1", XSPR(31,467,312), XSPR_MASK, BOOKE, 0, {RS}},
-{"mthrmor", XSPR(31,467,313), XSPR_MASK, POWER10, 0, {RS}},
-{"mtiac2", XSPR(31,467,313), XSPR_MASK, BOOKE, 0, {RS}},
-{"mthsrr0", XSPR(31,467,314), XSPR_MASK, POWER10, 0, {RS}},
-{"mtiac3", XSPR(31,467,314), XSPR_MASK, BOOKE, 0, {RS}},
-{"mthsrr1", XSPR(31,467,315), XSPR_MASK, POWER10, 0, {RS}},
-{"mtiac4", XSPR(31,467,315), XSPR_MASK, BOOKE, 0, {RS}},
-{"mtdac1", XSPR(31,467,316), XSPR_MASK, BOOKE, 0, {RS}},
-{"mtdac2", XSPR(31,467,317), XSPR_MASK, BOOKE, 0, {RS}},
-{"mtlpcr", XSPR(31,467,318), XSPR_MASK, POWER10, 0, {RS}},
-{"mtdvc1", XSPR(31,467,318), XSPR_MASK, BOOKE, 0, {RS}},
-{"mtlpidr", XSPR(31,467,319), XSPR_MASK, POWER10, 0, {RS}},
-{"mtdvc2", XSPR(31,467,319), XSPR_MASK, BOOKE, 0, {RS}},
-{"mthmer", XSPR(31,467,336), XSPR_MASK, POWER7, 0, {RS}},
-{"mttsr", XSPR(31,467,336), XSPR_MASK, BOOKE, 0, {RS}},
-{"mthmeer", XSPR(31,467,337), XSPR_MASK, POWER7, 0, {RS}},
-{"mtpcr", XSPR(31,467,338), XSPR_MASK, POWER10, 0, {RS}},
-{"mtheir", XSPR(31,467,339), XSPR_MASK, POWER10, 0, {RS}},
-{"mttcr", XSPR(31,467,340), XSPR_MASK, BOOKE, 0, {RS}},
-{"mtamor", XSPR(31,467,349), XSPR_MASK, POWER7, 0, {RS}},
-{"mtivor0", XSPR(31,467,400), XSPR_MASK, BOOKE, 0, {RS}},
-{"mtivor1", XSPR(31,467,401), XSPR_MASK, BOOKE, 0, {RS}},
-{"mtivor2", XSPR(31,467,402), XSPR_MASK, BOOKE, 0, {RS}},
-{"mtivor3", XSPR(31,467,403), XSPR_MASK, BOOKE, 0, {RS}},
-{"mtivor4", XSPR(31,467,404), XSPR_MASK, BOOKE, 0, {RS}},
-{"mtivor5", XSPR(31,467,405), XSPR_MASK, BOOKE, 0, {RS}},
-{"mtivor6", XSPR(31,467,406), XSPR_MASK, BOOKE, 0, {RS}},
-{"mtivor7", XSPR(31,467,407), XSPR_MASK, BOOKE, 0, {RS}},
-{"mtivor8", XSPR(31,467,408), XSPR_MASK, BOOKE, 0, {RS}},
-{"mtivor9", XSPR(31,467,409), XSPR_MASK, BOOKE, 0, {RS}},
-{"mtivor10", XSPR(31,467,410), XSPR_MASK, BOOKE, 0, {RS}},
-{"mtivor11", XSPR(31,467,411), XSPR_MASK, BOOKE, 0, {RS}},
-{"mtivor12", XSPR(31,467,412), XSPR_MASK, BOOKE, 0, {RS}},
-{"mtivor13", XSPR(31,467,413), XSPR_MASK, BOOKE, 0, {RS}},
-{"mtivor14", XSPR(31,467,414), XSPR_MASK, BOOKE, 0, {RS}},
-{"mtivor15", XSPR(31,467,415), XSPR_MASK, BOOKE, 0, {RS}},
-{"mtptcr", XSPR(31,467,464), XSPR_MASK, POWER10, 0, {RS}},
-{"mtusprg0", XSPR(31,467,496), XSPR_MASK, POWER10, 0, {RS}},
-{"mtusprg1", XSPR(31,467,497), XSPR_MASK, POWER10, 0, {RS}},
-{"mturmor", XSPR(31,467,505), XSPR_MASK, POWER10, 0, {RS}},
-{"mtusrr0", XSPR(31,467,506), XSPR_MASK, POWER10, 0, {RS}},
-{"mtusrr1", XSPR(31,467,507), XSPR_MASK, POWER10, 0, {RS}},
-{"mtsmfctrl", XSPR(31,467,511), XSPR_MASK, POWER10, 0, {RS}},
-{"mtspefscr", XSPR(31,467,512), XSPR_MASK, PPCSPE, 0, {RS}},
-{"mtbbear", XSPR(31,467,513), XSPR_MASK, PPCBRLK, 0, {RS}},
-{"mtbbtar", XSPR(31,467,514), XSPR_MASK, PPCBRLK, 0, {RS}},
-{"mtivor32", XSPR(31,467,528), XSPR_MASK, PPCSPE|E6500, 0, {RS}},
-{"mtivor33", XSPR(31,467,529), XSPR_MASK, PPCSPE|E6500, 0, {RS}},
-{"mtivor34", XSPR(31,467,530), XSPR_MASK, PPCSPE, 0, {RS}},
-{"mtivor35", XSPR(31,467,531), XSPR_MASK, PPCPMR, 0, {RS}},
-{"mtibatu", XSPR(31,467,528), XSPRBAT_MASK, PPC, TITAN, {SPRBAT, RS}},
-{"mtibatl", XSPR(31,467,529), XSPRBAT_MASK, PPC, TITAN, {SPRBAT, RS}},
-{"mtdbatu", XSPR(31,467,536), XSPRBAT_MASK, PPC, TITAN, {SPRBAT, RS}},
-{"mtdbatl", XSPR(31,467,537), XSPRBAT_MASK, PPC, TITAN, {SPRBAT, RS}},
-{"mtmcsrr0", XSPR(31,467,570), XSPR_MASK, PPCRFMCI, 0, {RS}},
-{"mtmcsrr1", XSPR(31,467,571), XSPR_MASK, PPCRFMCI, 0, {RS}},
-{"mtmcsr", XSPR(31,467,572), XSPR_MASK, PPCRFMCI, 0, {RS}},
-{"mtsier2", XSPR(31,467,752), XSPR_MASK, POWER10, 0, {RS}},
-{"mtsier3", XSPR(31,467,753), XSPR_MASK, POWER10, 0, {RS}},
-{"mtmmcr3", XSPR(31,467,754), XSPR_MASK, POWER10, 0, {RS}},
-{"mtummcr2", XSPR(31,467,769), XSPR_MASK, POWER9, 0, {RS}},
-{"mtmmcr2", XSPR(31,467,769), XSPR_MASK, POWER9, 0, {RS}},
-{"mtummcra", XSPR(31,467,770), XSPR_MASK, POWER9, 0, {RS}},
-{"mtupmc1", XSPR(31,467,771), XSPR_MASK, POWER9, 0, {RS}},
-{"mtupmc2", XSPR(31,467,772), XSPR_MASK, POWER9, 0, {RS}},
-{"mtupmc3", XSPR(31,467,773), XSPR_MASK, POWER9, 0, {RS}},
-{"mtupmc4", XSPR(31,467,774), XSPR_MASK, POWER9, 0, {RS}},
-{"mtupmc5", XSPR(31,467,775), XSPR_MASK, POWER9, 0, {RS}},
-{"mtupmc6", XSPR(31,467,776), XSPR_MASK, POWER9, 0, {RS}},
-{"mtummcr0", XSPR(31,467,779), XSPR_MASK, POWER9, 0, {RS}},
-{"mtsier", XSPR(31,467,784), XSPR_MASK, POWER10, 0, {RS}},
-{"mtmmcra", XSPR(31,467,786), XSPR_MASK, POWER7, 0, {RS}},
-{"mtpmc1", XSPR(31,467,787), XSPR_MASK, POWER7, 0, {RS}},
-{"mtpmc2", XSPR(31,467,788), XSPR_MASK, POWER7, 0, {RS}},
-{"mtpmc3", XSPR(31,467,789), XSPR_MASK, POWER7, 0, {RS}},
-{"mtpmc4", XSPR(31,467,790), XSPR_MASK, POWER7, 0, {RS}},
-{"mtpmc5", XSPR(31,467,791), XSPR_MASK, POWER7, 0, {RS}},
-{"mtpmc6", XSPR(31,467,792), XSPR_MASK, POWER7, 0, {RS}},
-{"mtmmcr0", XSPR(31,467,795), XSPR_MASK, POWER7, 0, {RS}},
-{"mtsiar", XSPR(31,467,796), XSPR_MASK, POWER10, 0, {RS}},
-{"mtsdar", XSPR(31,467,797), XSPR_MASK, POWER10, 0, {RS}},
-{"mtmmcr1", XSPR(31,467,798), XSPR_MASK, POWER7, 0, {RS}},
-{"mtbescrs", XSPR(31,467,800), XSPR_MASK, POWER9, 0, {RS}},
-{"mtbescrsu", XSPR(31,467,801), XSPR_MASK, POWER9, 0, {RS}},
-{"mtbescrr", XSPR(31,467,802), XSPR_MASK, POWER9, 0, {RS}},
-{"mtbescrru", XSPR(31,467,803), XSPR_MASK, POWER9, 0, {RS}},
-{"mtebbhr", XSPR(31,467,804), XSPR_MASK, POWER9, 0, {RS}},
-{"mtebbrr", XSPR(31,467,805), XSPR_MASK, POWER9, 0, {RS}},
-{"mtbescr", XSPR(31,467,806), XSPR_MASK, POWER9, 0, {RS}},
-{"mttar", XSPR(31,467,815), XSPR_MASK, POWER9, 0, {RS}},
-{"mtasdr", XSPR(31,467,816), XSPR_MASK, POWER10, 0, {RS}},
-{"mtpsscr", XSPR(31,467,823), XSPR_MASK, POWER10, 0, {RS}},
-{"mtic", XSPR(31,467,848), XSPR_MASK, POWER8, 0, {RS}},
-{"mtvtb", XSPR(31,467,849), XSPR_MASK, POWER8, 0, {RS}},
-{"mthpsscr", XSPR(31,467,855), XSPR_MASK, POWER10, 0, {RS}},
-{"mtivndx", XSPR(31,467,880), XSPR_MASK, TITAN, 0, {RS}},
-{"mtdvndx", XSPR(31,467,881), XSPR_MASK, TITAN, 0, {RS}},
-{"mtivlim", XSPR(31,467,882), XSPR_MASK, TITAN, 0, {RS}},
-{"mtdvlim", XSPR(31,467,883), XSPR_MASK, TITAN, 0, {RS}},
-{"mtclcsr", XSPR(31,467,884), XSPR_MASK, TITAN, 0, {RS}},
-{"mtccr1", XSPR(31,467,888), XSPR_MASK, TITAN, 0, {RS}},
-{"mtppr", XSPR(31,467,896), XSPR_MASK, POWER7, 0, {RS}},
-{"mtppr32", XSPR(31,467,898), XSPR_MASK, POWER7, 0, {RS}},
-{"mtgqr", XSPR(31,467,912), XSPRGQR_MASK, PPCPS, 0, {SPRGQR, RS}},
-{"mthid2", XSPR(31,467,920), XSPR_MASK, GEKKO, 0, {RS}},
-{"mtwpar", XSPR(31,467,921), XSPR_MASK, GEKKO, 0, {RS}},
-{"mtdmau", XSPR(31,467,922), XSPR_MASK, GEKKO, 0, {RS}},
-{"mtdmal", XSPR(31,467,923), XSPR_MASK, GEKKO, 0, {RS}},
-{"mtummcr0", XSPR(31,467,936), XSPR_MASK, PPC750, 0, {RS}},
-{"mtupmc1", XSPR(31,467,937), XSPR_MASK, PPC750, 0, {RS}},
-{"mtupmc2", XSPR(31,467,938), XSPR_MASK, PPC750, 0, {RS}},
-{"mtusia", XSPR(31,467,939), XSPR_MASK, PPC750, 0, {RS}},
-{"mtummcr1", XSPR(31,467,940), XSPR_MASK, PPC750, 0, {RS}},
-{"mtupmc3", XSPR(31,467,941), XSPR_MASK, PPC750, 0, {RS}},
-{"mtupmc4", XSPR(31,467,942), XSPR_MASK, PPC750, 0, {RS}},
-{"mtzpr", XSPR(31,467,944), XSPR_MASK, PPC403, 0, {RS}},
-{"mtpid", XSPR(31,467,945), XSPR_MASK, PPC403, 0, {RS}},
-{"mtrmmucr", XSPR(31,467,946), XSPR_MASK, TITAN, 0, {RS}},
-{"mtccr0", XSPR(31,467,947), XSPR_MASK, PPC405|TITAN, 0, {RS}},
-{"mtiac3", XSPR(31,467,948), XSPR_MASK, PPC405, 0, {RS}},
-{"mtiac4", XSPR(31,467,949), XSPR_MASK, PPC405, 0, {RS}},
-{"mtdvc1", XSPR(31,467,950), XSPR_MASK, PPC405, 0, {RS}},
-{"mtdvc2", XSPR(31,467,951), XSPR_MASK, PPC405, 0, {RS}},
-{"mtmmcr0", XSPR(31,467,952), XSPR_MASK, PPC750, 0, {RS}},
-{"mtpmc1", XSPR(31,467,953), XSPR_MASK, PPC750, 0, {RS}},
-{"mtsgr", XSPR(31,467,953), XSPR_MASK, PPC403, 0, {RS}},
-{"mtdcwr", XSPR(31,467,954), XSPR_MASK, PPC403, 0, {RS}},
-{"mtpmc2", XSPR(31,467,954), XSPR_MASK, PPC750, 0, {RS}},
-{"mtsia", XSPR(31,467,955), XSPR_MASK, PPC750, 0, {RS}},
-{"mtsler", XSPR(31,467,955), XSPR_MASK, PPC405, 0, {RS}},
-{"mtmmcr1", XSPR(31,467,956), XSPR_MASK, PPC750, 0, {RS}},
-{"mtsu0r", XSPR(31,467,956), XSPR_MASK, PPC405, 0, {RS}},
-{"mtdbcr1", XSPR(31,467,957), XSPR_MASK, PPC405, 0, {RS}},
-{"mtpmc3", XSPR(31,467,957), XSPR_MASK, PPC750, 0, {RS}},
-{"mtpmc4", XSPR(31,467,958), XSPR_MASK, PPC750, 0, {RS}},
-{"mticdbdr", XSPR(31,467,979), XSPR_MASK, PPC403, 0, {RS}},
-{"mtesr", XSPR(31,467,980), XSPR_MASK, PPC403, 0, {RS}},
-{"mtdear", XSPR(31,467,981), XSPR_MASK, PPC403, 0, {RS}},
-{"mtevpr", XSPR(31,467,982), XSPR_MASK, PPC403, 0, {RS}},
-{"mtcdbcr", XSPR(31,467,983), XSPR_MASK, PPC403, 0, {RS}},
-{"mttsr", XSPR(31,467,984), XSPR_MASK, PPC403, 0, {RS}},
-{"mttcr", XSPR(31,467,986), XSPR_MASK, PPC403, 0, {RS}},
-{"mtpit", XSPR(31,467,987), XSPR_MASK, PPC403, 0, {RS}},
-{"mttbhi", XSPR(31,467,988), XSPR_MASK, PPC403, 0, {RS}},
-{"mttblo", XSPR(31,467,989), XSPR_MASK, PPC403, 0, {RS}},
-{"mtsrr2", XSPR(31,467,990), XSPR_MASK, PPC403, 0, {RS}},
-{"mtsrr3", XSPR(31,467,991), XSPR_MASK, PPC403, 0, {RS}},
-{"mtdbsr", XSPR(31,467,1008), XSPR_MASK, PPC403, 0, {RS}},
-{"mthid0", XSPR(31,467,1008), XSPR_MASK, GEKKO, 0, {RS}},
-{"mthid1", XSPR(31,467,1009), XSPR_MASK, GEKKO, 0, {RS}},
-{"mtdbcr0", XSPR(31,467,1010), XSPR_MASK, PPC405, 0, {RS}},
-{"mtiabr", XSPR(31,467,1010), XSPR_MASK, GEKKO, 0, {RS}},
-{"mthid4", XSPR(31,467,1011), XSPR_MASK, BROADWAY, 0, {RS}},
-{"mtdbdr", XSPR(31,467,1011), XSPR_MASK, TITAN, 0, {RS}},
-{"mtiac1", XSPR(31,467,1012), XSPR_MASK, PPC403, 0, {RS}},
-{"mtiac2", XSPR(31,467,1013), XSPR_MASK, PPC403, 0, {RS}},
-{"mtdabr", XSPR(31,467,1013), XSPR_MASK, PPC750, 0, {RS}},
-{"mtdac1", XSPR(31,467,1014), XSPR_MASK, PPC403, 0, {RS}},
-{"mtdac2", XSPR(31,467,1015), XSPR_MASK, PPC403, 0, {RS}},
-{"mtl2cr", XSPR(31,467,1017), XSPR_MASK, PPC750, 0, {RS}},
-{"mtdccr", XSPR(31,467,1018), XSPR_MASK, PPC403, 0, {RS}},
-{"mticcr", XSPR(31,467,1019), XSPR_MASK, PPC403, 0, {RS}},
-{"mtictc", XSPR(31,467,1019), XSPR_MASK, PPC750, 0, {RS}},
-{"mtpbl1", XSPR(31,467,1020), XSPR_MASK, PPC403, 0, {RS}},
-{"mtthrm1", XSPR(31,467,1020), XSPR_MASK, PPC750, 0, {RS}},
-{"mtpbu1", XSPR(31,467,1021), XSPR_MASK, PPC403, 0, {RS}},
-{"mtthrm2", XSPR(31,467,1021), XSPR_MASK, PPC750, 0, {RS}},
-{"mtpbl2", XSPR(31,467,1022), XSPR_MASK, PPC403, 0, {RS}},
-{"mtthrm3", XSPR(31,467,1022), XSPR_MASK, PPC750, 0, {RS}},
-{"mtpbu2", XSPR(31,467,1023), XSPR_MASK, PPC403, 0, {RS}},
+{"mtmq", XSPR(31,467, 0), XSPR_MASK, M601, EXT, {RS}},
+{"mtxer", XSPR(31,467, 1), XSPR_MASK, COM, EXT, {RS}},
+{"mtudscr", XSPR(31,467, 3), XSPR_MASK, POWER9, EXT, {RS}},
+{"mtlr", XSPR(31,467, 8), XSPR_MASK, COM, EXT, {RS}},
+{"mtctr", XSPR(31,467, 9), XSPR_MASK, COM, EXT, {RS}},
+{"mtuamr", XSPR(31,467, 13), XSPR_MASK, POWER9, EXT, {RS}},
+{"mtdscr", XSPR(31,467, 17), XSPR_MASK, POWER6, EXT, {RS}},
+{"mttid", XSPR(31,467, 17), XSPR_MASK, POWER, EXT, {RS}},
+{"mtdsisr", XSPR(31,467, 18), XSPR_MASK, COM, TITAN|EXT, {RS}},
+{"mtdar", XSPR(31,467, 19), XSPR_MASK, COM, TITAN|EXT, {RS}},
+{"mtrtcu", XSPR(31,467, 20), XSPR_MASK, COM, TITAN|EXT, {RS}},
+{"mtrtcl", XSPR(31,467, 21), XSPR_MASK, COM, TITAN|EXT, {RS}},
+{"mtdec", XSPR(31,467, 22), XSPR_MASK, COM, EXT, {RS}},
+{"mtsdr0", XSPR(31,467, 24), XSPR_MASK, POWER, EXT, {RS}},
+{"mtsdr1", XSPR(31,467, 25), XSPR_MASK, COM, TITAN|EXT, {RS}},
+{"mtsrr0", XSPR(31,467, 26), XSPR_MASK, COM, EXT, {RS}},
+{"mtsrr1", XSPR(31,467, 27), XSPR_MASK, COM, EXT, {RS}},
+{"mtcfar", XSPR(31,467, 28), XSPR_MASK, POWER6, EXT, {RS}},
+{"mtamr", XSPR(31,467, 29), XSPR_MASK, POWER7, EXT, {RS}},
+{"mtpidr", XSPR(31,467, 48), XSPR_MASK, POWER10, EXT, {RS}},
+{"mtpid", XSPR(31,467, 48), XSPR_MASK, BOOKE, EXT, {RS}},
+{"mtdecar", XSPR(31,467, 54), XSPR_MASK, BOOKE, EXT, {RS}},
+{"mtcsrr0", XSPR(31,467, 58), XSPR_MASK, BOOKE, EXT, {RS}},
+{"mtcsrr1", XSPR(31,467, 59), XSPR_MASK, BOOKE, EXT, {RS}},
+{"mtiamr", XSPR(31,467, 61), XSPR_MASK, POWER10, EXT, {RS}},
+{"mtdear", XSPR(31,467, 61), XSPR_MASK, BOOKE, EXT, {RS}},
+{"mtesr", XSPR(31,467, 62), XSPR_MASK, BOOKE, EXT, {RS}},
+{"mtivpr", XSPR(31,467, 63), XSPR_MASK, BOOKE, EXT, {RS}},
+{"mttfhar", XSPR(31,467,128), XSPR_MASK, POWER9, EXT, {RS}},
+{"mttfiar", XSPR(31,467,129), XSPR_MASK, POWER9, EXT, {RS}},
+{"mttexasr", XSPR(31,467,130), XSPR_MASK, POWER9, EXT, {RS}},
+{"mttexasru", XSPR(31,467,131), XSPR_MASK, POWER9, EXT, {RS}},
+{"mtcmpa", XSPR(31,467,144), XSPR_MASK, PPC860, EXT, {RS}},
+{"mtcmpb", XSPR(31,467,145), XSPR_MASK, PPC860, EXT, {RS}},
+{"mtcmpc", XSPR(31,467,146), XSPR_MASK, PPC860, EXT, {RS}},
+{"mtcmpd", XSPR(31,467,147), XSPR_MASK, PPC860, EXT, {RS}},
+{"mticr", XSPR(31,467,148), XSPR_MASK, PPC860, EXT, {RS}},
+{"mtder", XSPR(31,467,149), XSPR_MASK, PPC860, EXT, {RS}},
+{"mtcounta", XSPR(31,467,150), XSPR_MASK, PPC860, EXT, {RS}},
+{"mtcountb", XSPR(31,467,151), XSPR_MASK, PPC860, EXT, {RS}},
+{"mtctrl", XSPR(31,467,152), XSPR_MASK, POWER4, EXT, {RS}},
+{"mtcmpe", XSPR(31,467,152), XSPR_MASK, PPC860, EXT, {RS}},
+{"mtfscr", XSPR(31,467,153), XSPR_MASK, POWER10, EXT, {RS}},
+{"mtcmpf", XSPR(31,467,153), XSPR_MASK, PPC860, EXT, {RS}},
+{"mtcmpg", XSPR(31,467,154), XSPR_MASK, PPC860, EXT, {RS}},
+{"mtcmph", XSPR(31,467,155), XSPR_MASK, PPC860, EXT, {RS}},
+{"mtlctrl1", XSPR(31,467,156), XSPR_MASK, PPC860, EXT, {RS}},
+{"mtuamor", XSPR(31,467,157), XSPR_MASK, POWER7, EXT, {RS}},
+{"mtlctrl2", XSPR(31,467,157), XSPR_MASK, PPC860, EXT, {RS}},
+{"mtictrl", XSPR(31,467,158), XSPR_MASK, PPC860, EXT, {RS}},
+{"mtpspb", XSPR(31,467,159), XSPR_MASK, POWER10, EXT, {RS}},
+{"mtbar", XSPR(31,467,159), XSPR_MASK, PPC860, EXT, {RS}},
+{"mtdpdes", XSPR(31,467,176), XSPR_MASK, POWER10, EXT, {RS}},
+{"mtdawr0", XSPR(31,467,180), XSPR_MASK, POWER10, EXT, {RS}},
+{"mtdawr1", XSPR(31,467,181), XSPR_MASK, POWER10, EXT, {RS}},
+{"mtrpr", XSPR(31,467,186), XSPR_MASK, POWER10, EXT, {RS}},
+{"mtciabr", XSPR(31,467,187), XSPR_MASK, POWER10, EXT, {RS}},
+{"mtdawrx0", XSPR(31,467,188), XSPR_MASK, POWER10, EXT, {RS}},
+{"mtdawrx1", XSPR(31,467,189), XSPR_MASK, POWER10, EXT, {RS}},
+{"mthfscr", XSPR(31,467,190), XSPR_MASK, POWER10, EXT, {RS}},
+{"mtvrsave", XSPR(31,467,256), XSPR_MASK, PPCVEC, EXT, {RS}},
+{"mtusprg0", XSPR(31,467,256), XSPR_MASK, BOOKE, EXT, {RS}},
+{"mtsprg", XSPR(31,467,256), XSPRG_MASK, PPC, EXT, {SPRG, RS}},
+{"mtsprg0", XSPR(31,467,272), XSPR_MASK, PPC, EXT, {RS}},
+{"mtsprg1", XSPR(31,467,273), XSPR_MASK, PPC, EXT, {RS}},
+{"mtsprg2", XSPR(31,467,274), XSPR_MASK, PPC, EXT, {RS}},
+{"mtsprg3", XSPR(31,467,275), XSPR_MASK, PPC, EXT, {RS}},
+{"mtsprg4", XSPR(31,467,276), XSPR_MASK, PPC405|BOOKE, EXT, {RS}},
+{"mtsprg5", XSPR(31,467,277), XSPR_MASK, PPC405|BOOKE, EXT, {RS}},
+{"mtsprg6", XSPR(31,467,278), XSPR_MASK, PPC405|BOOKE, EXT, {RS}},
+{"mtsprg7", XSPR(31,467,279), XSPR_MASK, PPC405|BOOKE, EXT, {RS}},
+{"mtasr", XSPR(31,467,280), XSPR_MASK, PPC64, EXT, {RS}},
+{"mtear", XSPR(31,467,282), XSPR_MASK, PPC, TITAN|EXT, {RS}},
+{"mttbl", XSPR(31,467,284), XSPR_MASK, PPC, EXT, {RS}},
+{"mttbu", XSPR(31,467,285), XSPR_MASK, PPC, EXT, {RS}},
+{"mttbu40", XSPR(31,467,286), XSPR_MASK, POWER10, EXT, {RS}},
+{"mthsprg0", XSPR(31,467,304), XSPR_MASK, POWER10, EXT, {RS}},
+{"mtdbsr", XSPR(31,467,304), XSPR_MASK, BOOKE, EXT, {RS}},
+{"mthsprg1", XSPR(31,467,305), XSPR_MASK, POWER10, EXT, {RS}},
+{"mthdisr", XSPR(31,467,306), XSPR_MASK, POWER10, EXT, {RS}},
+{"mthdar", XSPR(31,467,307), XSPR_MASK, POWER10, EXT, {RS}},
+{"mtspurr", XSPR(31,467,308), XSPR_MASK, POWER10, EXT, {RS}},
+{"mtdbcr0", XSPR(31,467,308), XSPR_MASK, BOOKE, EXT, {RS}},
+{"mtpurr", XSPR(31,467,309), XSPR_MASK, POWER10, EXT, {RS}},
+{"mtdbcr1", XSPR(31,467,309), XSPR_MASK, BOOKE, EXT, {RS}},
+{"mthdec", XSPR(31,467,310), XSPR_MASK, POWER10, EXT, {RS}},
+{"mtdbcr2", XSPR(31,467,310), XSPR_MASK, BOOKE, EXT, {RS}},
+{"mtiac1", XSPR(31,467,312), XSPR_MASK, BOOKE, EXT, {RS}},
+{"mthrmor", XSPR(31,467,313), XSPR_MASK, POWER10, EXT, {RS}},
+{"mtiac2", XSPR(31,467,313), XSPR_MASK, BOOKE, EXT, {RS}},
+{"mthsrr0", XSPR(31,467,314), XSPR_MASK, POWER10, EXT, {RS}},
+{"mtiac3", XSPR(31,467,314), XSPR_MASK, BOOKE, EXT, {RS}},
+{"mthsrr1", XSPR(31,467,315), XSPR_MASK, POWER10, EXT, {RS}},
+{"mtiac4", XSPR(31,467,315), XSPR_MASK, BOOKE, EXT, {RS}},
+{"mtdac1", XSPR(31,467,316), XSPR_MASK, BOOKE, EXT, {RS}},
+{"mtdac2", XSPR(31,467,317), XSPR_MASK, BOOKE, EXT, {RS}},
+{"mtlpcr", XSPR(31,467,318), XSPR_MASK, POWER10, EXT, {RS}},
+{"mtdvc1", XSPR(31,467,318), XSPR_MASK, BOOKE, EXT, {RS}},
+{"mtlpidr", XSPR(31,467,319), XSPR_MASK, POWER10, EXT, {RS}},
+{"mtdvc2", XSPR(31,467,319), XSPR_MASK, BOOKE, EXT, {RS}},
+{"mthmer", XSPR(31,467,336), XSPR_MASK, POWER7, EXT, {RS}},
+{"mttsr", XSPR(31,467,336), XSPR_MASK, BOOKE, EXT, {RS}},
+{"mthmeer", XSPR(31,467,337), XSPR_MASK, POWER7, EXT, {RS}},
+{"mtpcr", XSPR(31,467,338), XSPR_MASK, POWER10, EXT, {RS}},
+{"mtheir", XSPR(31,467,339), XSPR_MASK, POWER10, EXT, {RS}},
+{"mttcr", XSPR(31,467,340), XSPR_MASK, BOOKE, EXT, {RS}},
+{"mtamor", XSPR(31,467,349), XSPR_MASK, POWER7, EXT, {RS}},
+{"mtivor0", XSPR(31,467,400), XSPR_MASK, BOOKE, EXT, {RS}},
+{"mtivor1", XSPR(31,467,401), XSPR_MASK, BOOKE, EXT, {RS}},
+{"mtivor2", XSPR(31,467,402), XSPR_MASK, BOOKE, EXT, {RS}},
+{"mtivor3", XSPR(31,467,403), XSPR_MASK, BOOKE, EXT, {RS}},
+{"mtivor4", XSPR(31,467,404), XSPR_MASK, BOOKE, EXT, {RS}},
+{"mtivor5", XSPR(31,467,405), XSPR_MASK, BOOKE, EXT, {RS}},
+{"mtivor6", XSPR(31,467,406), XSPR_MASK, BOOKE, EXT, {RS}},
+{"mtivor7", XSPR(31,467,407), XSPR_MASK, BOOKE, EXT, {RS}},
+{"mtivor8", XSPR(31,467,408), XSPR_MASK, BOOKE, EXT, {RS}},
+{"mtivor9", XSPR(31,467,409), XSPR_MASK, BOOKE, EXT, {RS}},
+{"mtivor10", XSPR(31,467,410), XSPR_MASK, BOOKE, EXT, {RS}},
+{"mtivor11", XSPR(31,467,411), XSPR_MASK, BOOKE, EXT, {RS}},
+{"mtivor12", XSPR(31,467,412), XSPR_MASK, BOOKE, EXT, {RS}},
+{"mtivor13", XSPR(31,467,413), XSPR_MASK, BOOKE, EXT, {RS}},
+{"mtivor14", XSPR(31,467,414), XSPR_MASK, BOOKE, EXT, {RS}},
+{"mtivor15", XSPR(31,467,415), XSPR_MASK, BOOKE, EXT, {RS}},
+{"mtptcr", XSPR(31,467,464), XSPR_MASK, POWER10, EXT, {RS}},
+{"mtusprg0", XSPR(31,467,496), XSPR_MASK, POWER10, EXT, {RS}},
+{"mtusprg1", XSPR(31,467,497), XSPR_MASK, POWER10, EXT, {RS}},
+{"mturmor", XSPR(31,467,505), XSPR_MASK, POWER10, EXT, {RS}},
+{"mtusrr0", XSPR(31,467,506), XSPR_MASK, POWER10, EXT, {RS}},
+{"mtusrr1", XSPR(31,467,507), XSPR_MASK, POWER10, EXT, {RS}},
+{"mtsmfctrl", XSPR(31,467,511), XSPR_MASK, POWER10, EXT, {RS}},
+{"mtspefscr", XSPR(31,467,512), XSPR_MASK, PPCSPE, EXT, {RS}},
+{"mtbbear", XSPR(31,467,513), XSPR_MASK, PPCBRLK, EXT, {RS}},
+{"mtbbtar", XSPR(31,467,514), XSPR_MASK, PPCBRLK, EXT, {RS}},
+{"mtivor32", XSPR(31,467,528), XSPR_MASK, PPCSPE|E6500, EXT, {RS}},
+{"mtivor33", XSPR(31,467,529), XSPR_MASK, PPCSPE|E6500, EXT, {RS}},
+{"mtivor34", XSPR(31,467,530), XSPR_MASK, PPCSPE, EXT, {RS}},
+{"mtivor35", XSPR(31,467,531), XSPR_MASK, PPCPMR, EXT, {RS}},
+{"mtibatu", XSPR(31,467,528), XSPRBAT_MASK, PPC, TITAN|EXT, {SPRBAT, RS}},
+{"mtibatl", XSPR(31,467,529), XSPRBAT_MASK, PPC, TITAN|EXT, {SPRBAT, RS}},
+{"mtdbatu", XSPR(31,467,536), XSPRBAT_MASK, PPC, TITAN|EXT, {SPRBAT, RS}},
+{"mtdbatl", XSPR(31,467,537), XSPRBAT_MASK, PPC, TITAN|EXT, {SPRBAT, RS}},
+{"mtmcsrr0", XSPR(31,467,570), XSPR_MASK, PPCRFMCI, EXT, {RS}},
+{"mtmcsrr1", XSPR(31,467,571), XSPR_MASK, PPCRFMCI, EXT, {RS}},
+{"mtmcsr", XSPR(31,467,572), XSPR_MASK, PPCRFMCI, EXT, {RS}},
+{"mtsier2", XSPR(31,467,752), XSPR_MASK, POWER10, EXT, {RS}},
+{"mtsier3", XSPR(31,467,753), XSPR_MASK, POWER10, EXT, {RS}},
+{"mtmmcr3", XSPR(31,467,754), XSPR_MASK, POWER10, EXT, {RS}},
+{"mtummcr2", XSPR(31,467,769), XSPR_MASK, POWER9, EXT, {RS}},
+{"mtmmcr2", XSPR(31,467,769), XSPR_MASK, POWER9, EXT, {RS}},
+{"mtummcra", XSPR(31,467,770), XSPR_MASK, POWER9, EXT, {RS}},
+{"mtupmc1", XSPR(31,467,771), XSPR_MASK, POWER9, EXT, {RS}},
+{"mtupmc2", XSPR(31,467,772), XSPR_MASK, POWER9, EXT, {RS}},
+{"mtupmc3", XSPR(31,467,773), XSPR_MASK, POWER9, EXT, {RS}},
+{"mtupmc4", XSPR(31,467,774), XSPR_MASK, POWER9, EXT, {RS}},
+{"mtupmc5", XSPR(31,467,775), XSPR_MASK, POWER9, EXT, {RS}},
+{"mtupmc6", XSPR(31,467,776), XSPR_MASK, POWER9, EXT, {RS}},
+{"mtummcr0", XSPR(31,467,779), XSPR_MASK, POWER9, EXT, {RS}},
+{"mtsier", XSPR(31,467,784), XSPR_MASK, POWER10, EXT, {RS}},
+{"mtmmcra", XSPR(31,467,786), XSPR_MASK, POWER7, EXT, {RS}},
+{"mtpmc1", XSPR(31,467,787), XSPR_MASK, POWER7, EXT, {RS}},
+{"mtpmc2", XSPR(31,467,788), XSPR_MASK, POWER7, EXT, {RS}},
+{"mtpmc3", XSPR(31,467,789), XSPR_MASK, POWER7, EXT, {RS}},
+{"mtpmc4", XSPR(31,467,790), XSPR_MASK, POWER7, EXT, {RS}},
+{"mtpmc5", XSPR(31,467,791), XSPR_MASK, POWER7, EXT, {RS}},
+{"mtpmc6", XSPR(31,467,792), XSPR_MASK, POWER7, EXT, {RS}},
+{"mtmmcr0", XSPR(31,467,795), XSPR_MASK, POWER7, EXT, {RS}},
+{"mtsiar", XSPR(31,467,796), XSPR_MASK, POWER10, EXT, {RS}},
+{"mtsdar", XSPR(31,467,797), XSPR_MASK, POWER10, EXT, {RS}},
+{"mtmmcr1", XSPR(31,467,798), XSPR_MASK, POWER7, EXT, {RS}},
+{"mtbescrs", XSPR(31,467,800), XSPR_MASK, POWER9, EXT, {RS}},
+{"mtbescrsu", XSPR(31,467,801), XSPR_MASK, POWER9, EXT, {RS}},
+{"mtbescrr", XSPR(31,467,802), XSPR_MASK, POWER9, EXT, {RS}},
+{"mtbescrru", XSPR(31,467,803), XSPR_MASK, POWER9, EXT, {RS}},
+{"mtebbhr", XSPR(31,467,804), XSPR_MASK, POWER9, EXT, {RS}},
+{"mtebbrr", XSPR(31,467,805), XSPR_MASK, POWER9, EXT, {RS}},
+{"mtbescr", XSPR(31,467,806), XSPR_MASK, POWER9, EXT, {RS}},
+{"mttar", XSPR(31,467,815), XSPR_MASK, POWER9, EXT, {RS}},
+{"mtasdr", XSPR(31,467,816), XSPR_MASK, POWER10, EXT, {RS}},
+{"mtpsscr", XSPR(31,467,823), XSPR_MASK, POWER10, EXT, {RS}},
+{"mtic", XSPR(31,467,848), XSPR_MASK, POWER8, EXT, {RS}},
+{"mtvtb", XSPR(31,467,849), XSPR_MASK, POWER8, EXT, {RS}},
+{"mthpsscr", XSPR(31,467,855), XSPR_MASK, POWER10, EXT, {RS}},
+{"mtivndx", XSPR(31,467,880), XSPR_MASK, TITAN, EXT, {RS}},
+{"mtdvndx", XSPR(31,467,881), XSPR_MASK, TITAN, EXT, {RS}},
+{"mtivlim", XSPR(31,467,882), XSPR_MASK, TITAN, EXT, {RS}},
+{"mtdvlim", XSPR(31,467,883), XSPR_MASK, TITAN, EXT, {RS}},
+{"mtclcsr", XSPR(31,467,884), XSPR_MASK, TITAN, EXT, {RS}},
+{"mtccr1", XSPR(31,467,888), XSPR_MASK, TITAN, EXT, {RS}},
+{"mtppr", XSPR(31,467,896), XSPR_MASK, POWER7, EXT, {RS}},
+{"mtppr32", XSPR(31,467,898), XSPR_MASK, POWER7, EXT, {RS}},
+{"mtgqr", XSPR(31,467,912), XSPRGQR_MASK, PPCPS, EXT, {SPRGQR, RS}},
+{"mthid2", XSPR(31,467,920), XSPR_MASK, GEKKO, EXT, {RS}},
+{"mtwpar", XSPR(31,467,921), XSPR_MASK, GEKKO, EXT, {RS}},
+{"mtdmau", XSPR(31,467,922), XSPR_MASK, GEKKO, EXT, {RS}},
+{"mtdmal", XSPR(31,467,923), XSPR_MASK, GEKKO, EXT, {RS}},
+{"mtummcr0", XSPR(31,467,936), XSPR_MASK, PPC750, EXT, {RS}},
+{"mtupmc1", XSPR(31,467,937), XSPR_MASK, PPC750, EXT, {RS}},
+{"mtupmc2", XSPR(31,467,938), XSPR_MASK, PPC750, EXT, {RS}},
+{"mtusia", XSPR(31,467,939), XSPR_MASK, PPC750, EXT, {RS}},
+{"mtummcr1", XSPR(31,467,940), XSPR_MASK, PPC750, EXT, {RS}},
+{"mtupmc3", XSPR(31,467,941), XSPR_MASK, PPC750, EXT, {RS}},
+{"mtupmc4", XSPR(31,467,942), XSPR_MASK, PPC750, EXT, {RS}},
+{"mtzpr", XSPR(31,467,944), XSPR_MASK, PPC403, EXT, {RS}},
+{"mtpid", XSPR(31,467,945), XSPR_MASK, PPC403, EXT, {RS}},
+{"mtrmmucr", XSPR(31,467,946), XSPR_MASK, TITAN, EXT, {RS}},
+{"mtccr0", XSPR(31,467,947), XSPR_MASK, PPC405|TITAN, EXT, {RS}},
+{"mtiac3", XSPR(31,467,948), XSPR_MASK, PPC405, EXT, {RS}},
+{"mtiac4", XSPR(31,467,949), XSPR_MASK, PPC405, EXT, {RS}},
+{"mtdvc1", XSPR(31,467,950), XSPR_MASK, PPC405, EXT, {RS}},
+{"mtdvc2", XSPR(31,467,951), XSPR_MASK, PPC405, EXT, {RS}},
+{"mtmmcr0", XSPR(31,467,952), XSPR_MASK, PPC750, EXT, {RS}},
+{"mtpmc1", XSPR(31,467,953), XSPR_MASK, PPC750, EXT, {RS}},
+{"mtsgr", XSPR(31,467,953), XSPR_MASK, PPC403, EXT, {RS}},
+{"mtdcwr", XSPR(31,467,954), XSPR_MASK, PPC403, EXT, {RS}},
+{"mtpmc2", XSPR(31,467,954), XSPR_MASK, PPC750, EXT, {RS}},
+{"mtsia", XSPR(31,467,955), XSPR_MASK, PPC750, EXT, {RS}},
+{"mtsler", XSPR(31,467,955), XSPR_MASK, PPC405, EXT, {RS}},
+{"mtmmcr1", XSPR(31,467,956), XSPR_MASK, PPC750, EXT, {RS}},
+{"mtsu0r", XSPR(31,467,956), XSPR_MASK, PPC405, EXT, {RS}},
+{"mtdbcr1", XSPR(31,467,957), XSPR_MASK, PPC405, EXT, {RS}},
+{"mtpmc3", XSPR(31,467,957), XSPR_MASK, PPC750, EXT, {RS}},
+{"mtpmc4", XSPR(31,467,958), XSPR_MASK, PPC750, EXT, {RS}},
+{"mticdbdr", XSPR(31,467,979), XSPR_MASK, PPC403, EXT, {RS}},
+{"mtesr", XSPR(31,467,980), XSPR_MASK, PPC403, EXT, {RS}},
+{"mtdear", XSPR(31,467,981), XSPR_MASK, PPC403, EXT, {RS}},
+{"mtevpr", XSPR(31,467,982), XSPR_MASK, PPC403, EXT, {RS}},
+{"mtcdbcr", XSPR(31,467,983), XSPR_MASK, PPC403, EXT, {RS}},
+{"mttsr", XSPR(31,467,984), XSPR_MASK, PPC403, EXT, {RS}},
+{"mttcr", XSPR(31,467,986), XSPR_MASK, PPC403, EXT, {RS}},
+{"mtpit", XSPR(31,467,987), XSPR_MASK, PPC403, EXT, {RS}},
+{"mttbhi", XSPR(31,467,988), XSPR_MASK, PPC403, EXT, {RS}},
+{"mttblo", XSPR(31,467,989), XSPR_MASK, PPC403, EXT, {RS}},
+{"mtsrr2", XSPR(31,467,990), XSPR_MASK, PPC403, EXT, {RS}},
+{"mtsrr3", XSPR(31,467,991), XSPR_MASK, PPC403, EXT, {RS}},
+{"mtdbsr", XSPR(31,467,1008), XSPR_MASK, PPC403, EXT, {RS}},
+{"mthid0", XSPR(31,467,1008), XSPR_MASK, GEKKO, EXT, {RS}},
+{"mthid1", XSPR(31,467,1009), XSPR_MASK, GEKKO, EXT, {RS}},
+{"mtdbcr0", XSPR(31,467,1010), XSPR_MASK, PPC405, EXT, {RS}},
+{"mtiabr", XSPR(31,467,1010), XSPR_MASK, GEKKO, EXT, {RS}},
+{"mthid4", XSPR(31,467,1011), XSPR_MASK, BROADWAY, EXT, {RS}},
+{"mtdbdr", XSPR(31,467,1011), XSPR_MASK, TITAN, EXT, {RS}},
+{"mtiac1", XSPR(31,467,1012), XSPR_MASK, PPC403, EXT, {RS}},
+{"mtiac2", XSPR(31,467,1013), XSPR_MASK, PPC403, EXT, {RS}},
+{"mtdabr", XSPR(31,467,1013), XSPR_MASK, PPC750, EXT, {RS}},
+{"mtdac1", XSPR(31,467,1014), XSPR_MASK, PPC403, EXT, {RS}},
+{"mtdac2", XSPR(31,467,1015), XSPR_MASK, PPC403, EXT, {RS}},
+{"mtl2cr", XSPR(31,467,1017), XSPR_MASK, PPC750, EXT, {RS}},
+{"mtdccr", XSPR(31,467,1018), XSPR_MASK, PPC403, EXT, {RS}},
+{"mticcr", XSPR(31,467,1019), XSPR_MASK, PPC403, EXT, {RS}},
+{"mtictc", XSPR(31,467,1019), XSPR_MASK, PPC750, EXT, {RS}},
+{"mtpbl1", XSPR(31,467,1020), XSPR_MASK, PPC403, EXT, {RS}},
+{"mtthrm1", XSPR(31,467,1020), XSPR_MASK, PPC750, EXT, {RS}},
+{"mtpbu1", XSPR(31,467,1021), XSPR_MASK, PPC403, EXT, {RS}},
+{"mtthrm2", XSPR(31,467,1021), XSPR_MASK, PPC750, EXT, {RS}},
+{"mtpbl2", XSPR(31,467,1022), XSPR_MASK, PPC403, EXT, {RS}},
+{"mtthrm3", XSPR(31,467,1022), XSPR_MASK, PPC750, EXT, {RS}},
+{"mtpbu2", XSPR(31,467,1023), XSPR_MASK, PPC403, EXT, {RS}},
{"mtspr", X(31,467), X_MASK, COM, 0, {SPR, RS}},
{"dcbi", X(31,470), XRT_MASK, PPC, 0, {RA0, RB}},
@@ -7627,10 +7627,10 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"subfco", XO(31,8,1,0), XO_MASK, PPCCOM, 0, {RT, RA, RB}},
{"sfo", XO(31,8,1,0), XO_MASK, PWRCOM, 0, {RT, RA, RB}},
-{"subco", XO(31,8,1,0), XO_MASK, PPCCOM, 0, {RT, RB, RA}},
+{"subco", XO(31,8,1,0), XO_MASK, PPCCOM, EXT, {RT, RB, RA}},
{"subfco.", XO(31,8,1,1), XO_MASK, PPCCOM, 0, {RT, RA, RB}},
{"sfo.", XO(31,8,1,1), XO_MASK, PWRCOM, 0, {RT, RA, RB}},
-{"subco.", XO(31,8,1,1), XO_MASK, PPCCOM, 0, {RT, RB, RA}},
+{"subco.", XO(31,8,1,1), XO_MASK, PPCCOM, EXT, {RT, RB, RA}},
{"addco", XO(31,10,1,0), XO_MASK, PPCCOM, 0, {RT, RA, RB}},
{"ao", XO(31,10,1,0), XO_MASK, PWRCOM, 0, {RT, RA, RB}},
@@ -7679,9 +7679,9 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"lhfcmux", APU(31,551,0), APU_MASK, PPC405, 0, {FCRT, RA, RB}},
{"subfo", XO(31,40,1,0), XO_MASK, PPC, 0, {RT, RA, RB}},
-{"subo", XO(31,40,1,0), XO_MASK, PPC, 0, {RT, RB, RA}},
+{"subo", XO(31,40,1,0), XO_MASK, PPC, EXT, {RT, RB, RA}},
{"subfo.", XO(31,40,1,1), XO_MASK, PPC, 0, {RT, RA, RB}},
-{"subo.", XO(31,40,1,1), XO_MASK, PPC, 0, {RT, RB, RA}},
+{"subo.", XO(31,40,1,1), XO_MASK, PPC, EXT, {RT, RB, RA}},
{"tlbsync", X(31,566), 0xffffffff, PPC, 0, {0}},
@@ -7710,21 +7710,21 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"lswi", X(31,597), X_MASK, PPCCOM, E500|E500MC, {RT, RAX, NBI}},
{"lsi", X(31,597), X_MASK, PWRCOM, 0, {RT, RA0, NB}},
-{"hwsync", XSYNC(31,598,0), 0xffffffff, POWER4, BOOKE|PPC476, {0}},
-{"lwsync", XSYNC(31,598,1), 0xffffffff, PPC, E500, {0}},
-{"ptesync", XSYNC(31,598,2), 0xffffffff, PPC64, 0, {0}},
-{"phwsync", XSYNCLS(31,598,4,0), 0xffffffff, POWER10, 0, {0}},
-{"plwsync", XSYNCLS(31,598,5,0), 0xffffffff, POWER10, 0, {0}},
-{"stncisync", XSYNCLS(31,598,1,1), 0xffffffff, POWER10, 0, {0}},
-{"stcisync", XSYNCLS(31,598,0,2), 0xffffffff, POWER10, 0, {0}},
-{"stsync", XSYNCLS(31,598,0,3), 0xffffffff, POWER10, 0, {0}},
-{"sync", X(31,598), XSYNCLS_MASK, POWER10, BOOKE|PPC476, {LS3, SC2}},
-{"sync", X(31,598), XSYNCLE_MASK, E6500, 0, {LS, ESYNC}},
-{"sync", X(31,598), XSYNC_MASK, PPCCOM, POWER10|BOOKE|PPC476, {LS}},
-{"msync", X(31,598), 0xffffffff, BOOKE|PPCA2|PPC476, 0, {0}},
-{"sync", X(31,598), 0xffffffff, BOOKE|PPC476, E6500, {0}},
-{"lwsync", X(31,598), 0xffffffff, E500, 0, {0}},
-{"dcs", X(31,598), 0xffffffff, PWRCOM, 0, {0}},
+{"hwsync", XSYNC(31,598,0), 0xffffffff, POWER4, BOOKE|PPC476|EXT, {0}},
+{"lwsync", XSYNC(31,598,1), 0xffffffff, PPC, E500|EXT, {0}},
+{"ptesync", XSYNC(31,598,2), 0xffffffff, PPC64, EXT, {0}},
+{"phwsync", XSYNCLS(31,598,4,0), 0xffffffff, POWER10, EXT, {0}},
+{"plwsync", XSYNCLS(31,598,5,0), 0xffffffff, POWER10, EXT, {0}},
+{"stncisync", XSYNCLS(31,598,1,1), 0xffffffff, POWER10, EXT, {0}},
+{"stcisync", XSYNCLS(31,598,0,2), 0xffffffff, POWER10, EXT, {0}},
+{"stsync", XSYNCLS(31,598,0,3), 0xffffffff, POWER10, EXT, {0}},
+{"sync", X(31,598), XSYNCLS_MASK, POWER10, BOOKE|PPC476, {LS3, SC2}},
+{"sync", X(31,598), XSYNCLE_MASK, E6500, 0, {LS, ESYNC}},
+{"sync", X(31,598), XSYNC_MASK, PPCCOM, POWER10|BOOKE|PPC476, {LS}},
+{"msync", X(31,598), 0xffffffff, BOOKE|PPCA2|PPC476, 0, {0}},
+{"sync", X(31,598), 0xffffffff, BOOKE|PPC476, E6500, {0}},
+{"lwsync", X(31,598), 0xffffffff, E500, 0, {0}},
+{"dcs", X(31,598), 0xffffffff, PWRCOM, 0, {0}},
{"lfdx", X(31,599), X_MASK, COM, PPCEFS, {FRT, RA0, RB}},
@@ -7878,8 +7878,8 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"mullwo.", XO(31,235,1,1), XO_MASK, PPCCOM, 0, {RT, RA, RB}},
{"mulso.", XO(31,235,1,1), XO_MASK, PWRCOM, 0, {RT, RA, RB}},
-{"tsuspend.", XRCL(31,750,0,1), XRTRARB_MASK,PPCHTM, 0, {0}},
-{"tresume.", XRCL(31,750,1,1), XRTRARB_MASK,PPCHTM, 0, {0}},
+{"tsuspend.", XRCL(31,750,0,1), XRTRARB_MASK,PPCHTM, EXT, {0}},
+{"tresume.", XRCL(31,750,1,1), XRTRARB_MASK,PPCHTM, EXT, {0}},
{"tsr.", XRC(31,750,1), XRTLRARB_MASK,PPCHTM, 0, {L}},
{"hashchk", X(31,754), XRC_MASK, POWER8, 0, {RB, DW, RA0}},
@@ -7954,6 +7954,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"lhzcix", X(31,821), X_MASK, POWER6, 0, {RT, RA0, RB}},
{"dss", XDSS(31,822,0), XDSS_MASK, PPCVEC, 0, {STRM}},
+{"dssall", XDSS(31,822,1), XDSS_MASK, PPCVEC, 0, {0}},
{"lfqux", X(31,823), X_MASK, POWER2, 0, {FRT, RA, RB}},
@@ -8062,8 +8063,8 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"stvfrxl", X(31,933), X_MASK, E6500, 0, {VS, RA0, RB}},
-{"wclrone", XOPL2(31,934,2),XRT_MASK, PPCA2, 0, {RA0, RB}},
-{"wclrall", X(31,934), XRARB_MASK, PPCA2, 0, {L2}},
+{"wclrone", XOPL2(31,934,2),XRT_MASK, PPCA2, EXT, {RA0, RB}},
+{"wclrall", X(31,934), XRARB_MASK, PPCA2, EXT, {L2}},
{"wclr", X(31,934), X_MASK, PPCA2, 0, {L2, RA0, RB}},
{"stvrxl", X(31,935), X_MASK, CELL, 0, {VS, RA0, RB}},
@@ -8078,8 +8079,8 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"treclaim.", XRC(31,942,1), XRTRB_MASK, PPCHTM, 0, {RA}},
-{"tlbrehi", XTLB(31,946,0), XTLB_MASK, PPC403, PPCA2, {RT, RA}},
-{"tlbrelo", XTLB(31,946,1), XTLB_MASK, PPC403, PPCA2, {RT, RA}},
+{"tlbrehi", XTLB(31,946,0), XTLB_MASK, PPC403, PPCA2|EXT, {RT, RA}},
+{"tlbrelo", XTLB(31,946,1), XTLB_MASK, PPC403, PPCA2|EXT, {RT, RA}},
{"tlbre", X(31,946), X_MASK, PPC403|BOOKE|PPCA2|PPC476, 0, {RSO, RAOPT, SHO}},
{"sthcix", X(31,949), X_MASK, POWER6, 0, {RS, RA0, RB}},
@@ -8110,8 +8111,8 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"stxvx", X(31,972), XX1_MASK, POWER8, POWER9|PPCVSX3, {XS6, RA0, RB}},
{"tlbld", X(31,978), XRTRA_MASK, PPC, PPC403|BOOKE|PPCA2|PPC476, {RB}},
-{"tlbwehi", XTLB(31,978,0), XTLB_MASK, PPC403, 0, {RT, RA}},
-{"tlbwelo", XTLB(31,978,1), XTLB_MASK, PPC403, 0, {RT, RA}},
+{"tlbwehi", XTLB(31,978,0), XTLB_MASK, PPC403, EXT, {RT, RA}},
+{"tlbwelo", XTLB(31,978,1), XTLB_MASK, PPC403, EXT, {RT, RA}},
{"tlbwe", X(31,978), X_MASK, PPC403|BOOKE|PPCA2|PPC476, 0, {RSO, RAOPT, SHO}},
{"slbfee.", XRC(31,979,1), XRA_MASK, POWER6, 0, {RT, RB}},
@@ -8150,14 +8151,9 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"dcbz", X(31,1014), XRT_MASK, PPC, 0, {RA0, RB}},
{"dclz", X(31,1014), XRT_MASK, PPC, 0, {RA0, RB}},
-
-{"dcbzep", XRT(31,1023,0), XRT_MASK, E500MC|PPCA2, 0, {RA0, RB}},
-
{"dcbzl", XOPL(31,1014,1), XRT_MASK, POWER4|E500MC, PPC476, {RA0, RB}},
-{"dstt", XDSS(31,342,1), XDSS_MASK, PPCVEC, 0, {RA, RB, STRM}},
-{"dststt", XDSS(31,374,1), XDSS_MASK, PPCVEC, 0, {RA, RB, STRM}},
-{"dssall", XDSS(31,822,1), XDSS_MASK, PPCVEC, 0, {0}},
+{"dcbzep", XRT(31,1023,0), XRT_MASK, E500MC|PPCA2, 0, {RA0, RB}},
{"db8cyc", 0x7f9ce378, 0xffffffff, CELL, 0, {0}},
{"db10cyc", 0x7fbdeb78, 0xffffffff, CELL, 0, {0}},
@@ -8405,10 +8401,10 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"xxsel", XX4(60,3), XX4_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6, XC6}},
{"xssubsp", XX3(60,8), XX3_MASK, PPCVSX2, PPCVLE, {XT6, XA6, XB6}},
{"xsmaddmsp", XX3(60,9), XX3_MASK, PPCVSX2, PPCVLE, {XT6, XA6, XB6}},
-{"xxspltd", XX3(60,10), XX3DM_MASK, PPCVSX, PPCVLE, {XT6, XAB6, DMEX}},
-{"xxmrghd", XX3(60,10), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},
-{"xxswapd", XX3(60,10)|(2<<8), XX3_MASK, PPCVSX, PPCVLE, {XT6, XAB6}},
-{"xxmrgld", XX3(60,10)|(3<<8), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},
+{"xxspltd", XX3(60,10), XX3DM_MASK, PPCVSX, PPCVLE|EXT, {XT6, XAB6, DMEX}},
+{"xxmrghd", XX3(60,10), XX3_MASK, PPCVSX, PPCVLE|EXT, {XT6, XA6, XB6}},
+{"xxswapd", XX3(60,10)|(2<<8), XX3_MASK, PPCVSX, PPCVLE|EXT, {XT6, XAB6}},
+{"xxmrgld", XX3(60,10)|(3<<8), XX3_MASK, PPCVSX, PPCVLE|EXT, {XT6, XA6, XB6}},
{"xxpermdi", XX3(60,10), XX3DM_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6, DM}},
{"xscmpgtdp", XX3(60,11), XX3_MASK, PPCVSX3, PPCVLE, {XT6, XA6, XB6}},
{"xsresp", XX2(60,26), XX2_MASK, PPCVSX2, PPCVLE, {XT6, XB6}},
@@ -8516,7 +8512,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"xsrsp", XX2(60,281), XX2_MASK, PPCVSX2, PPCVLE, {XT6, XB6}},
{"xsmaxjdp", XX3(60,144), XX3_MASK, PPCVSX3, PPCVLE, {XT6, XA6, XB6}},
{"xsnmsubasp", XX3(60,145), XX3_MASK, PPCVSX2, PPCVLE, {XT6, XA6, XB6}},
-{"xxmr", XX3(60,146), XX3_MASK, PPCVSX, PPCVLE, {XT6, XAB6}},
+{"xxmr", XX3(60,146), XX3_MASK, PPCVSX, PPCVLE|EXT, {XT6, XAB6}},
{"xxlor", XX3(60,146), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},
{"xscvuxdsp", XX2(60,296), XX2_MASK, PPCVSX2, PPCVLE, {XT6, XB6}},
{"xststdcsp", XX2(60,298), XX2BFD_MASK, PPCVSX3, PPCVLE, {BF, XB6, DCMX}},
@@ -8526,7 +8522,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"xscvsxdsp", XX2(60,312), XX2_MASK, PPCVSX2, PPCVLE, {XT6, XB6}},
{"xsmaxdp", XX3(60,160), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},
{"xsnmaddadp", XX3(60,161), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},
-{"xxlnot", XX3(60,162), XX3_MASK, PPCVSX, PPCVLE, {XT6, XAB6}},
+{"xxlnot", XX3(60,162), XX3_MASK, PPCVSX, PPCVLE|EXT, {XT6, XAB6}},
{"xxlnor", XX3(60,162), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},
{"xscvdpuxds", XX2(60,328), XX2_MASK, PPCVSX, PPCVLE, {XT6, XB6}},
{"xscvspdp", XX2(60,329), XX2_MASK, PPCVSX, PPCVLE, {XT6, XB6}},
@@ -8558,7 +8554,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"xvnmaddmsp", XX3(60,201), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},
{"xvcvspsxds", XX2(60,408), XX2_MASK, PPCVSX, PPCVLE, {XT6, XB6}},
{"xvabssp", XX2(60,409), XX2_MASK, PPCVSX, PPCVLE, {XT6, XB6}},
-{"xvmovsp", XX3(60,208), XX3_MASK, PPCVSX, PPCVLE, {XT6, XAB6}},
+{"xvmovsp", XX3(60,208), XX3_MASK, PPCVSX, PPCVLE|EXT, {XT6, XAB6}},
{"xvcpsgnsp", XX3(60,208), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},
{"xvnmsubasp", XX3(60,209), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},
{"xvcvuxdsp", XX2(60,424), XX2_MASK, PPCVSX, PPCVLE, {XT6, XB6}},
@@ -8594,7 +8590,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"xvcvhpsp", XX2VA(60,475,24),XX2_MASK, PPCVSX3, PPCVLE, {XT6, XB6}},
{"xvcvsphp", XX2VA(60,475,25),XX2_MASK, PPCVSX3, PPCVLE, {XT6, XB6}},
{"xxbrq", XX2VA(60,475,31),XX2_MASK, PPCVSX3, PPCVLE, {XT6, XB6}},
-{"xvmovdp", XX3(60,240), XX3_MASK, PPCVSX, PPCVLE, {XT6, XAB6}},
+{"xvmovdp", XX3(60,240), XX3_MASK, PPCVSX, PPCVLE|EXT, {XT6, XAB6}},
{"xvcpsgndp", XX3(60,240), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},
{"xvnmsubadp", XX3(60,241), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},
{"xvcvuxddp", XX2(60,488), XX2_MASK, PPCVSX, PPCVLE, {XT6, XB6}},
@@ -8941,10 +8937,10 @@ const unsigned int powerpc_num_opcodes =
const struct powerpc_opcode prefix_opcodes[] = {
{"pnop", PMRR, PREFIX_MASK, POWER10, 0, {0}},
-{"pli", PMLS|OP(14), P_DRAPCREL_MASK, POWER10, 0, {RT, SI34}},
+{"pli", PMLS|OP(14), P_DRAPCREL_MASK, POWER10, EXT, {RT, SI34}},
{"paddi", PMLS|OP(14), P_D_MASK, POWER10, 0, {RT, RA0, SI34, PCREL0}},
-{"psubi", PMLS|OP(14), P_D_MASK, POWER10, 0, {RT, RA0, NSI34, PCREL0}},
-{"pla", PMLS|OP(14), P_D_MASK, POWER10, 0, {RT, D34, PRA0, PCREL}},
+{"psubi", PMLS|OP(14), P_D_MASK, POWER10, EXT, {RT, RA0, NSI34, PCREL0}},
+{"pla", PMLS|OP(14), P_D_MASK, POWER10, EXT, {RT, D34, PRA0, PCREL}},
{"xxsplti32dx", P8RR|VSOP(32,0), P_VSI_MASK, POWER10, 0, {XTS, IX, IMM32}},
{"xxspltidp", P8RR|VSOP(32,2), P_VS_MASK, POWER10, 0, {XTS, IMM32}},
{"xxspltiw", P8RR|VSOP(32,3), P_VS_MASK, POWER10, 0, {XTS, IMM32}},
@@ -9739,15 +9735,15 @@ const struct powerpc_opcode vle_opcodes[] = {
{"e_subi", SCI8(6,16), SCI8_MASK, PPCVLE, 0, {RT, RA, SCLSCI8N}},
{"e_addi.", SCI8(6,17), SCI8_MASK, PPCVLE, 0, {RT, RA, SCLSCI8}},
{"e_addic", SCI8(6,18), SCI8_MASK, PPCVLE, 0, {RT, RA, SCLSCI8}},
-{"e_subic", SCI8(6,18), SCI8_MASK, PPCVLE, 0, {RT, RA, SCLSCI8N}},
+{"e_subic", SCI8(6,18), SCI8_MASK, PPCVLE, EXT, {RT, RA, SCLSCI8N}},
{"e_addic.", SCI8(6,19), SCI8_MASK, PPCVLE, 0, {RT, RA, SCLSCI8}},
-{"e_subic.", SCI8(6,19), SCI8_MASK, PPCVLE, 0, {RT, RA, SCLSCI8N}},
+{"e_subic.", SCI8(6,19), SCI8_MASK, PPCVLE, EXT, {RT, RA, SCLSCI8N}},
{"e_mulli", SCI8(6,20), SCI8_MASK, PPCVLE, 0, {RT, RA, SCLSCI8}},
{"e_subfic", SCI8(6,22), SCI8_MASK, PPCVLE, 0, {RT, RA, SCLSCI8}},
{"e_subfic.", SCI8(6,23), SCI8_MASK, PPCVLE, 0, {RT, RA, SCLSCI8}},
{"e_andi", SCI8(6,24), SCI8_MASK, PPCVLE, 0, {RA, RS, SCLSCI8}},
{"e_andi.", SCI8(6,25), SCI8_MASK, PPCVLE, 0, {RA, RS, SCLSCI8}},
-{"e_nop", SCI8(6,26), 0xffffffff, PPCVLE, 0, {0}},
+{"e_nop", SCI8(6,26), 0xffffffff, PPCVLE, EXT, {0}},
{"e_ori", SCI8(6,26), SCI8_MASK, PPCVLE, 0, {RA, RS, SCLSCI8}},
{"e_ori.", SCI8(6,27), SCI8_MASK, PPCVLE, 0, {RA, RS, SCLSCI8}},
{"e_xori", SCI8(6,28), SCI8_MASK, PPCVLE, 0, {RA, RS, SCLSCI8}},
@@ -9779,8 +9775,8 @@ const struct powerpc_opcode vle_opcodes[] = {
{"e_lmvmcsrrw", OPVUPRT(6,16,7),OPVUPRT_MASK, PPCVLE, 0, {D8, RA0}},
{"e_stmvmcsrrw", OPVUPRT(6,17,7),OPVUPRT_MASK, PPCVLE, 0, {D8, RA0}},
{"e_add16i", OP(7), OP_MASK, PPCVLE, 0, {RT, RA, SI}},
-{"e_la", OP(7), OP_MASK, PPCVLE, 0, {RT, D, RA0}},
-{"e_sub16i", OP(7), OP_MASK, PPCVLE, 0, {RT, RA, NSI}},
+{"e_la", OP(7), OP_MASK, PPCVLE, EXT, {RT, D, RA0}},
+{"e_sub16i", OP(7), OP_MASK, PPCVLE, EXT, {RT, RA, NSI}},
{"se_addi", SE_IM5(8,0), SE_IM5_MASK, PPCVLE, 0, {RX, OIMM5}},
{"se_cmpli", SE_IM5(8,1), SE_IM5_MASK, PPCVLE, 0, {RX, OIMM5}},
@@ -9797,7 +9793,7 @@ const struct powerpc_opcode vle_opcodes[] = {
{"se_srw", SE_RR(16,0), SE_RR_MASK, PPCVLE, 0, {RX, RY}},
{"se_sraw", SE_RR(16,1), SE_RR_MASK, PPCVLE, 0, {RX, RY}},
{"se_slw", SE_RR(16,2), SE_RR_MASK, PPCVLE, 0, {RX, RY}},
-{"se_nop", SE_RR(17,0), 0xffff, PPCVLE, 0, {0}},
+{"se_nop", SE_RR(17,0), 0xffff, PPCVLE, EXT, {0}},
{"se_or", SE_RR(17,0), SE_RR_MASK, PPCVLE, 0, {RX, RY}},
{"se_andc", SE_RR(17,1), SE_RR_MASK, PPCVLE, 0, {RX, RY}},
{"se_and", SE_RR(17,2), SE_RR_MASK, PPCVLE, 0, {RX, RY}},
@@ -9827,59 +9823,59 @@ const struct powerpc_opcode vle_opcodes[] = {
{"e_cmpl16i", I16A(28,21), I16A_MASK, PPCVLE, 0, {RA, VLEUIMM}},
{"e_mull2i", I16A(28,20), I16A_MASK, PPCVLE, 0, {RA, VLESIMM}},
{"e_cmp16i", IA16(28,19), IA16_MASK, PPCVLE, 0, {RA, VLESIMM}},
-{"e_sub2is", I16A(28,18), I16A_MASK, PPCVLE, 0, {RA, VLENSIMM}},
+{"e_sub2is", I16A(28,18), I16A_MASK, PPCVLE, EXT, {RA, VLENSIMM}},
{"e_add2is", I16A(28,18), I16A_MASK, PPCVLE, 0, {RA, VLESIMM}},
-{"e_sub2i.", I16A(28,17), I16A_MASK, PPCVLE, 0, {RA, VLENSIMM}},
+{"e_sub2i.", I16A(28,17), I16A_MASK, PPCVLE, EXT, {RA, VLENSIMM}},
{"e_add2i.", I16A(28,17), I16A_MASK, PPCVLE, 0, {RA, VLESIMM}},
{"e_li", LI20(28,0), LI20_MASK, PPCVLE, 0, {RT, IMM20}},
{"e_rlwimi", M(29,0), M_MASK, PPCVLE, 0, {RA, RS, SH, MB, ME}},
{"e_rlwinm", M(29,1), M_MASK, PPCVLE, 0, {RA, RT, SH, MBE, ME}},
{"e_b", BD24(30,0,0), BD24_MASK, PPCVLE, 0, {B24}},
{"e_bl", BD24(30,0,1), BD24_MASK, PPCVLE, 0, {B24}},
-{"e_bdnz", EBD15(30,8,BO32DNZ,0), EBD15_MASK, PPCVLE, 0, {B15}},
-{"e_bdnzl", EBD15(30,8,BO32DNZ,1), EBD15_MASK, PPCVLE, 0, {B15}},
-{"e_bdz", EBD15(30,8,BO32DZ,0), EBD15_MASK, PPCVLE, 0, {B15}},
-{"e_bdzl", EBD15(30,8,BO32DZ,1), EBD15_MASK, PPCVLE, 0, {B15}},
-{"e_bge", EBD15BI(30,8,BO32F,CBLT,0), EBD15BI_MASK, PPCVLE, 0, {CRS,B15}},
-{"e_bgel", EBD15BI(30,8,BO32F,CBLT,1), EBD15BI_MASK, PPCVLE, 0, {CRS,B15}},
-{"e_bnl", EBD15BI(30,8,BO32F,CBLT,0), EBD15BI_MASK, PPCVLE, 0, {CRS,B15}},
-{"e_bnll", EBD15BI(30,8,BO32F,CBLT,1), EBD15BI_MASK, PPCVLE, 0, {CRS,B15}},
-{"e_blt", EBD15BI(30,8,BO32T,CBLT,0), EBD15BI_MASK, PPCVLE, 0, {CRS,B15}},
-{"e_bltl", EBD15BI(30,8,BO32T,CBLT,1), EBD15BI_MASK, PPCVLE, 0, {CRS,B15}},
-{"e_bgt", EBD15BI(30,8,BO32T,CBGT,0), EBD15BI_MASK, PPCVLE, 0, {CRS,B15}},
-{"e_bgtl", EBD15BI(30,8,BO32T,CBGT,1), EBD15BI_MASK, PPCVLE, 0, {CRS,B15}},
-{"e_ble", EBD15BI(30,8,BO32F,CBGT,0), EBD15BI_MASK, PPCVLE, 0, {CRS,B15}},
-{"e_blel", EBD15BI(30,8,BO32F,CBGT,1), EBD15BI_MASK, PPCVLE, 0, {CRS,B15}},
-{"e_bng", EBD15BI(30,8,BO32F,CBGT,0), EBD15BI_MASK, PPCVLE, 0, {CRS,B15}},
-{"e_bngl", EBD15BI(30,8,BO32F,CBGT,1), EBD15BI_MASK, PPCVLE, 0, {CRS,B15}},
-{"e_bne", EBD15BI(30,8,BO32F,CBEQ,0), EBD15BI_MASK, PPCVLE, 0, {CRS,B15}},
-{"e_bnel", EBD15BI(30,8,BO32F,CBEQ,1), EBD15BI_MASK, PPCVLE, 0, {CRS,B15}},
-{"e_beq", EBD15BI(30,8,BO32T,CBEQ,0), EBD15BI_MASK, PPCVLE, 0, {CRS,B15}},
-{"e_beql", EBD15BI(30,8,BO32T,CBEQ,1), EBD15BI_MASK, PPCVLE, 0, {CRS,B15}},
-{"e_bso", EBD15BI(30,8,BO32T,CBSO,0), EBD15BI_MASK, PPCVLE, 0, {CRS,B15}},
-{"e_bsol", EBD15BI(30,8,BO32T,CBSO,1), EBD15BI_MASK, PPCVLE, 0, {CRS,B15}},
-{"e_bun", EBD15BI(30,8,BO32T,CBSO,0), EBD15BI_MASK, PPCVLE, 0, {CRS,B15}},
-{"e_bunl", EBD15BI(30,8,BO32T,CBSO,1), EBD15BI_MASK, PPCVLE, 0, {CRS,B15}},
-{"e_bns", EBD15BI(30,8,BO32F,CBSO,0), EBD15BI_MASK, PPCVLE, 0, {CRS,B15}},
-{"e_bnsl", EBD15BI(30,8,BO32F,CBSO,1), EBD15BI_MASK, PPCVLE, 0, {CRS,B15}},
-{"e_bnu", EBD15BI(30,8,BO32F,CBSO,0), EBD15BI_MASK, PPCVLE, 0, {CRS,B15}},
-{"e_bnul", EBD15BI(30,8,BO32F,CBSO,1), EBD15BI_MASK, PPCVLE, 0, {CRS,B15}},
+{"e_bdnz", EBD15(30,8,BO32DNZ,0), EBD15_MASK, PPCVLE, EXT, {B15}},
+{"e_bdnzl", EBD15(30,8,BO32DNZ,1), EBD15_MASK, PPCVLE, EXT, {B15}},
+{"e_bdz", EBD15(30,8,BO32DZ,0), EBD15_MASK, PPCVLE, EXT, {B15}},
+{"e_bdzl", EBD15(30,8,BO32DZ,1), EBD15_MASK, PPCVLE, EXT, {B15}},
+{"e_bge", EBD15BI(30,8,BO32F,CBLT,0), EBD15BI_MASK, PPCVLE, EXT, {CRS,B15}},
+{"e_bgel", EBD15BI(30,8,BO32F,CBLT,1), EBD15BI_MASK, PPCVLE, EXT, {CRS,B15}},
+{"e_bnl", EBD15BI(30,8,BO32F,CBLT,0), EBD15BI_MASK, PPCVLE, EXT, {CRS,B15}},
+{"e_bnll", EBD15BI(30,8,BO32F,CBLT,1), EBD15BI_MASK, PPCVLE, EXT, {CRS,B15}},
+{"e_blt", EBD15BI(30,8,BO32T,CBLT,0), EBD15BI_MASK, PPCVLE, EXT, {CRS,B15}},
+{"e_bltl", EBD15BI(30,8,BO32T,CBLT,1), EBD15BI_MASK, PPCVLE, EXT, {CRS,B15}},
+{"e_bgt", EBD15BI(30,8,BO32T,CBGT,0), EBD15BI_MASK, PPCVLE, EXT, {CRS,B15}},
+{"e_bgtl", EBD15BI(30,8,BO32T,CBGT,1), EBD15BI_MASK, PPCVLE, EXT, {CRS,B15}},
+{"e_ble", EBD15BI(30,8,BO32F,CBGT,0), EBD15BI_MASK, PPCVLE, EXT, {CRS,B15}},
+{"e_blel", EBD15BI(30,8,BO32F,CBGT,1), EBD15BI_MASK, PPCVLE, EXT, {CRS,B15}},
+{"e_bng", EBD15BI(30,8,BO32F,CBGT,0), EBD15BI_MASK, PPCVLE, EXT, {CRS,B15}},
+{"e_bngl", EBD15BI(30,8,BO32F,CBGT,1), EBD15BI_MASK, PPCVLE, EXT, {CRS,B15}},
+{"e_bne", EBD15BI(30,8,BO32F,CBEQ,0), EBD15BI_MASK, PPCVLE, EXT, {CRS,B15}},
+{"e_bnel", EBD15BI(30,8,BO32F,CBEQ,1), EBD15BI_MASK, PPCVLE, EXT, {CRS,B15}},
+{"e_beq", EBD15BI(30,8,BO32T,CBEQ,0), EBD15BI_MASK, PPCVLE, EXT, {CRS,B15}},
+{"e_beql", EBD15BI(30,8,BO32T,CBEQ,1), EBD15BI_MASK, PPCVLE, EXT, {CRS,B15}},
+{"e_bso", EBD15BI(30,8,BO32T,CBSO,0), EBD15BI_MASK, PPCVLE, EXT, {CRS,B15}},
+{"e_bsol", EBD15BI(30,8,BO32T,CBSO,1), EBD15BI_MASK, PPCVLE, EXT, {CRS,B15}},
+{"e_bun", EBD15BI(30,8,BO32T,CBSO,0), EBD15BI_MASK, PPCVLE, EXT, {CRS,B15}},
+{"e_bunl", EBD15BI(30,8,BO32T,CBSO,1), EBD15BI_MASK, PPCVLE, EXT, {CRS,B15}},
+{"e_bns", EBD15BI(30,8,BO32F,CBSO,0), EBD15BI_MASK, PPCVLE, EXT, {CRS,B15}},
+{"e_bnsl", EBD15BI(30,8,BO32F,CBSO,1), EBD15BI_MASK, PPCVLE, EXT, {CRS,B15}},
+{"e_bnu", EBD15BI(30,8,BO32F,CBSO,0), EBD15BI_MASK, PPCVLE, EXT, {CRS,B15}},
+{"e_bnul", EBD15BI(30,8,BO32F,CBSO,1), EBD15BI_MASK, PPCVLE, EXT, {CRS,B15}},
{"e_bc", BD15(30,8,0), BD15_MASK, PPCVLE, 0, {BO32, BI32, B15}},
{"e_bcl", BD15(30,8,1), BD15_MASK, PPCVLE, 0, {BO32, BI32, B15}},
-{"e_bf", EBD15(30,8,BO32F,0), EBD15_MASK, PPCVLE, 0, {BI32,B15}},
-{"e_bfl", EBD15(30,8,BO32F,1), EBD15_MASK, PPCVLE, 0, {BI32,B15}},
-{"e_bt", EBD15(30,8,BO32T,0), EBD15_MASK, PPCVLE, 0, {BI32,B15}},
-{"e_btl", EBD15(30,8,BO32T,1), EBD15_MASK, PPCVLE, 0, {BI32,B15}},
+{"e_bf", EBD15(30,8,BO32F,0), EBD15_MASK, PPCVLE, EXT, {BI32,B15}},
+{"e_bfl", EBD15(30,8,BO32F,1), EBD15_MASK, PPCVLE, EXT, {BI32,B15}},
+{"e_bt", EBD15(30,8,BO32T,0), EBD15_MASK, PPCVLE, EXT, {BI32,B15}},
+{"e_btl", EBD15(30,8,BO32T,1), EBD15_MASK, PPCVLE, EXT, {BI32,B15}},
{"e_cmph", X(31,14), X_MASK, PPCVLE, 0, {CRD, RA, RB}},
{"e_sc", X(31,36), XRTRA_MASK, PPCVLE, 0, {ELEV}},
{"e_cmphl", X(31,46), X_MASK, PPCVLE, 0, {CRD, RA, RB}},
{"e_crandc", XL(31,129), XL_MASK, PPCVLE, 0, {BT, BA, BB}},
{"e_crnand", XL(31,225), XL_MASK, PPCVLE, 0, {BT, BA, BB}},
-{"e_crnot", XL(31,33), XL_MASK, PPCVLE, 0, {BT, BAB}},
+{"e_crnot", XL(31,33), XL_MASK, PPCVLE, EXT, {BT, BAB}},
{"e_crnor", XL(31,33), XL_MASK, PPCVLE, 0, {BT, BA, BB}},
-{"e_crclr", XL(31,193), XL_MASK, PPCVLE, 0, {BTAB}},
+{"e_crclr", XL(31,193), XL_MASK, PPCVLE, EXT, {BTAB}},
{"e_crxor", XL(31,193), XL_MASK, PPCVLE, 0, {BT, BA, BB}},
{"e_mcrf", XL(31,16), XL_MASK, PPCVLE, 0, {CRD, CR}},
{"e_slwi", EX(31,112), EX_MASK, PPCVLE, 0, {RA, RS, SH}},
@@ -9890,7 +9886,7 @@ const struct powerpc_opcode vle_opcodes[] = {
{"e_rlw", EX(31,560), EX_MASK, PPCVLE, 0, {RA, RS, RB}},
{"e_rlw.", EX(31,561), EX_MASK, PPCVLE, 0, {RA, RS, RB}},
-{"e_crset", XL(31,289), XL_MASK, PPCVLE, 0, {BTAB}},
+{"e_crset", XL(31,289), XL_MASK, PPCVLE, EXT, {BTAB}},
{"e_creqv", XL(31,289), XL_MASK, PPCVLE, 0, {BT, BA, BB}},
{"e_rlwi", EX(31,624), EX_MASK, PPCVLE, 0, {RA, RS, SH}},
@@ -9898,10 +9894,10 @@ const struct powerpc_opcode vle_opcodes[] = {
{"e_crorc", XL(31,417), XL_MASK, PPCVLE, 0, {BT, BA, BB}},
-{"e_crmove", XL(31,449), XL_MASK, PPCVLE, 0, {BT, BAB}},
+{"e_crmove", XL(31,449), XL_MASK, PPCVLE, EXT, {BT, BAB}},
{"e_cror", XL(31,449), XL_MASK, PPCVLE, 0, {BT, BA, BB}},
-{"mtmas1", XSPR(31,467,625), XSPR_MASK, PPCVLE, 0, {RS}},
+{"mtmas1", XSPR(31,467,625), XSPR_MASK, PPCVLE, EXT, {RS}},
{"e_srwi", EX(31,1136), EX_MASK, PPCVLE, 0, {RA, RS, SH}},
{"e_srwi.", EX(31,1137), EX_MASK, PPCVLE, 0, {RA, RS, SH}},
@@ -9918,20 +9914,20 @@ const struct powerpc_opcode vle_opcodes[] = {
{"se_stw", SD4(13), SD4_MASK, PPCVLE, 0, {RZ, SE_SDW, RX}},
-{"se_bge", EBD8IO(28,0,0), EBD8IO3_MASK, PPCVLE, 0, {B8}},
-{"se_bnl", EBD8IO(28,0,0), EBD8IO3_MASK, PPCVLE, 0, {B8}},
-{"se_ble", EBD8IO(28,0,1), EBD8IO3_MASK, PPCVLE, 0, {B8}},
-{"se_bng", EBD8IO(28,0,1), EBD8IO3_MASK, PPCVLE, 0, {B8}},
-{"se_bne", EBD8IO(28,0,2), EBD8IO3_MASK, PPCVLE, 0, {B8}},
-{"se_bns", EBD8IO(28,0,3), EBD8IO3_MASK, PPCVLE, 0, {B8}},
-{"se_bnu", EBD8IO(28,0,3), EBD8IO3_MASK, PPCVLE, 0, {B8}},
-{"se_bf", EBD8IO(28,0,0), EBD8IO2_MASK, PPCVLE, 0, {BI16, B8}},
-{"se_blt", EBD8IO(28,1,0), EBD8IO3_MASK, PPCVLE, 0, {B8}},
-{"se_bgt", EBD8IO(28,1,1), EBD8IO3_MASK, PPCVLE, 0, {B8}},
-{"se_beq", EBD8IO(28,1,2), EBD8IO3_MASK, PPCVLE, 0, {B8}},
-{"se_bso", EBD8IO(28,1,3), EBD8IO3_MASK, PPCVLE, 0, {B8}},
-{"se_bun", EBD8IO(28,1,3), EBD8IO3_MASK, PPCVLE, 0, {B8}},
-{"se_bt", EBD8IO(28,1,0), EBD8IO2_MASK, PPCVLE, 0, {BI16, B8}},
+{"se_bge", EBD8IO(28,0,0), EBD8IO3_MASK, PPCVLE, EXT, {B8}},
+{"se_bnl", EBD8IO(28,0,0), EBD8IO3_MASK, PPCVLE, EXT, {B8}},
+{"se_ble", EBD8IO(28,0,1), EBD8IO3_MASK, PPCVLE, EXT, {B8}},
+{"se_bng", EBD8IO(28,0,1), EBD8IO3_MASK, PPCVLE, EXT, {B8}},
+{"se_bne", EBD8IO(28,0,2), EBD8IO3_MASK, PPCVLE, EXT, {B8}},
+{"se_bns", EBD8IO(28,0,3), EBD8IO3_MASK, PPCVLE, EXT, {B8}},
+{"se_bnu", EBD8IO(28,0,3), EBD8IO3_MASK, PPCVLE, EXT, {B8}},
+{"se_bf", EBD8IO(28,0,0), EBD8IO2_MASK, PPCVLE, EXT, {BI16, B8}},
+{"se_blt", EBD8IO(28,1,0), EBD8IO3_MASK, PPCVLE, EXT, {B8}},
+{"se_bgt", EBD8IO(28,1,1), EBD8IO3_MASK, PPCVLE, EXT, {B8}},
+{"se_beq", EBD8IO(28,1,2), EBD8IO3_MASK, PPCVLE, EXT, {B8}},
+{"se_bso", EBD8IO(28,1,3), EBD8IO3_MASK, PPCVLE, EXT, {B8}},
+{"se_bun", EBD8IO(28,1,3), EBD8IO3_MASK, PPCVLE, EXT, {B8}},
+{"se_bt", EBD8IO(28,1,0), EBD8IO2_MASK, PPCVLE, EXT, {BI16, B8}},
{"se_bc", BD8IO(28), BD8IO_MASK, PPCVLE, 0, {BO16, BI16, B8}},
{"se_b", BD8(58,0,0), BD8_MASK, PPCVLE, 0, {B8}},
{"se_bl", BD8(58,0,1), BD8_MASK, PPCVLE, 0, {B8}},
generated by cgit v1.1 at 2024-09-13 09:52:21 +0000