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| author | James Greenhalgh <james.greenhalgh@arm.com> | 2015-11-12 12:04:22 +0000 |
|---|---|---|
| committer | Marcus Shawcroft <marcus.shawcroft@arm.com> | 2015-11-12 12:04:22 +0000 |
| commit | 9c352f1c234efabd0e60a0927ae3f25009e4932b (patch) | |
| tree | 08fa9a1b0ea2cd8ac27f0a9f34a536437904dcfd | |
| parent | 8915a9b7e86881dd3f658e851983b532c64e3b5c (diff) | |
| download | fsf-binutils-gdb-9c352f1c234efabd0e60a0927ae3f25009e4932b.zip fsf-binutils-gdb-9c352f1c234efabd0e60a0927ae3f25009e4932b.tar.gz fsf-binutils-gdb-9c352f1c234efabd0e60a0927ae3f25009e4932b.tar.bz2 | |
[AArch64] Add support for Cortex-A35
This patch adds support to the AArch64 back-end for the Cortex-A35
processor, as recently announced by ARM. The ARM Cortex-A35 provides
full support for the ARMv8-A architecture, including the CRC extension,
with optional Advanced-SIMD and Floating-Point support. We therefore set
feature flags for this CPU to AARCH64_ARCH_V8 and AARCH64_FEATURE_CRC, in
the same fashion as Cortex-A53 and Cortex-A57.
Tested in a cross environment for AArch64 with no issues.
| -rw-r--r-- | gas/ChangeLog | 5 | ||||
| -rw-r--r-- | gas/config/tc-aarch64.c | 2 | ||||
| -rw-r--r-- | gas/doc/c-aarch64.texi | 1 |
3 files changed, 8 insertions, 0 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index 04f934c..5bbb713 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,5 +1,10 @@ 2015-11-12 James Greenhalgh <james.greenhalgh@arm.com> + * config/tc-aarch64.c (aarch64_cpus): Add cortex-a35. + * doc/c-aarch64.texi (-mcpu=): Likewise. + +2015-11-12 James Greenhalgh <james.greenhalgh@arm.com> + * config/tc-arm.c (arm_cpus): Likewise. * doc/c-arm.texi (-mcpu=): Likewise. diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c index b45aac8..e854b96 100644 --- a/gas/config/tc-aarch64.c +++ b/gas/config/tc-aarch64.c @@ -7676,6 +7676,8 @@ struct aarch64_cpu_option_table recognized by GCC. */ static const struct aarch64_cpu_option_table aarch64_cpus[] = { {"all", AARCH64_ANY, NULL}, + {"cortex-a35", AARCH64_FEATURE (AARCH64_ARCH_V8, + AARCH64_FEATURE_CRC), "Cortex-A35"}, {"cortex-a53", AARCH64_FEATURE (AARCH64_ARCH_V8, AARCH64_FEATURE_CRC), "Cortex-A53"}, {"cortex-a57", AARCH64_FEATURE (AARCH64_ARCH_V8, diff --git a/gas/doc/c-aarch64.texi b/gas/doc/c-aarch64.texi index e3ca09d..e7e6ba4 100644 --- a/gas/doc/c-aarch64.texi +++ b/gas/doc/c-aarch64.texi @@ -55,6 +55,7 @@ file in ELF32 and ELF64 format respectively. The default is @code{lp64}. This option specifies the target processor. The assembler will issue an error message if an attempt is made to assemble an instruction which will not execute on the target processor. The following processor names are recognized: +@code{cortex-a35}, @code{cortex-a53}, @code{cortex-a57}, @code{cortex-a72}, |