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author | Chris Demetriou <cgd@google.com> | 2002-03-01 23:51:18 +0000 |
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committer | Chris Demetriou <cgd@google.com> | 2002-03-01 23:51:18 +0000 |
commit | 3e1dca16f2ac7d966390f76faf4b5c4437cb9fe7 (patch) | |
tree | 607fcf7e21d45f6b5d9e3b3169be77ef0ef77b04 | |
parent | fff8d27d232f4c62612e83535334050e6972441c (diff) | |
download | fsf-binutils-gdb-3e1dca16f2ac7d966390f76faf4b5c4437cb9fe7.zip fsf-binutils-gdb-3e1dca16f2ac7d966390f76faf4b5c4437cb9fe7.tar.gz fsf-binutils-gdb-3e1dca16f2ac7d966390f76faf4b5c4437cb9fe7.tar.bz2 |
2002-03-01 Chris Demetriou <cgd@broadcom.com>
* mips.igen (do_divu): Fix spacing.
* mips.igen (do_dsllv): Move to be right before DSLLV,
to match the rest of the do_<shift> functions.
-rw-r--r-- | sim/mips/ChangeLog | 7 | ||||
-rw-r--r-- | sim/mips/mips.igen | 27 |
2 files changed, 20 insertions, 14 deletions
diff --git a/sim/mips/ChangeLog b/sim/mips/ChangeLog index 95f2f36..4ffef07 100644 --- a/sim/mips/ChangeLog +++ b/sim/mips/ChangeLog @@ -1,5 +1,12 @@ 2002-03-01 Chris Demetriou <cgd@broadcom.com> + * mips.igen (do_divu): Fix spacing. + + * mips.igen (do_dsllv): Move to be right before DSLLV, + to match the rest of the do_<shift> functions. + +2002-03-01 Chris Demetriou <cgd@broadcom.com> + * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl, DSRL32, do_dsrlv): Trace inputs and results. diff --git a/sim/mips/mips.igen b/sim/mips/mips.igen index b404311..b5930d5 100644 --- a/sim/mips/mips.igen +++ b/sim/mips/mips.igen @@ -1041,11 +1041,11 @@ LO = EXTEND32 (0x80000000); HI = EXTEND32 (0); } - else - { - LO = EXTEND32 (n / d); - HI = EXTEND32 (n % d); - } + else + { + LO = EXTEND32 (n / d); + HI = EXTEND32 (n % d); + } } TRACE_ALU_RESULT2 (HI, LO); } @@ -1185,15 +1185,6 @@ TRACE_ALU_RESULT (GPR[rd]); } -:function:::void:do_dsllv:int rs, int rt, int rd -{ - int s = MASKED64 (GPR[rs], 5, 0); - TRACE_ALU_INPUT2 (GPR[rt], s); - GPR[rd] = GPR[rt] << s; - TRACE_ALU_RESULT (GPR[rd]); -} - - 000000,00000,5.RT,5.RD,5.SHIFT,111000:SPECIAL:64::DSLL "dsll r<RD>, r<RT>, <SHIFT>" *mipsIII: @@ -1222,6 +1213,14 @@ TRACE_ALU_RESULT (GPR[RD]); } +:function:::void:do_dsllv:int rs, int rt, int rd +{ + int s = MASKED64 (GPR[rs], 5, 0); + TRACE_ALU_INPUT2 (GPR[rt], s); + GPR[rd] = GPR[rt] << s; + TRACE_ALU_RESULT (GPR[rd]); +} + 000000,5.RS,5.RT,5.RD,00000,010100:SPECIAL:64::DSLLV "dsllv r<RD>, r<RT>, r<RS>" *mipsIII: |