x86/Intel: don't swap operands of MONITOR{,X} and MWAIT{,X}

Generally, the documentation doesn't allow for any explicit operands
to be specified with MONITOR/MWAIT. To permit the more legible
overriding of the address size via specifying operands, the option is
being retained even in Intel mode, but operand swapping is being
suppressed by this patch. This is both because it makes no sense here
(all of the operands are inputs) and because, as a result, old gcc
(prior to 4.8) actually expects it this way with -mintel-syntax (and
hence gets fixed by this change rather than, as claimed by a reply in
the bug report, broken).

9 files changed, 124 insertions, 4 deletions

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 7f64228..112aedb 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,5 +1,18 @@
 2020-02-17  Jan Beulich  <jbeulich@suse.com>
 
+	PR gas/14439
+	* config/tc-i386.c (md_assemble): Also suppress operand
+	swapping for MONITOR{,X} and MWAIT{,X}.
+	* testsuite/gas/i386/sse3.s, testsuite/gas/i386/x86-64-sse3.s:
+	Add Intel syntax monitor/mwait tests.
+	* testsuite/gas/i386/sse3.d, testsuite/gas/i386/x86-64-sse3.d:
+	Adjust expectations.
+	*testsuite/gas/i386/sse3-intel.d,
+	testsuite/gas/i386/x86-64-sse3-intel.d: New.
+	* testsuite/gas/i386/i386.exp: Run new tests.
+
+2020-02-17  Jan Beulich  <jbeulich@suse.com>
+
 	PR gas/6518
 	* config/tc-i386.c (process_suffix): Re-work Intel-syntax
 	[XYZ]MMWord memory operand ambiguity recognition logic (largely
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index acade9d..4074a90 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -4324,14 +4324,16 @@ md_assemble (char *line)
   /* Now we've parsed the mnemonic into a set of templates, and have the
      operands at hand.  */
 
-  /* All intel opcodes have reversed operands except for "bound" and
-     "enter".  We also don't reverse intersegment "jmp" and "call"
-     instructions with 2 immediate operands so that the immediate segment
-     precedes the offset, as it does when in AT&T mode. */
+  /* All Intel opcodes have reversed operands except for "bound", "enter"
+     "monitor*", and "mwait*".  We also don't reverse intersegment "jmp"
+     and "call" instructions with 2 immediate operands so that the immediate
+     segment precedes the offset, as it does when in AT&T mode. */
   if (intel_syntax
       && i.operands > 1
       && (strcmp (mnemonic, "bound") != 0)
       && (strcmp (mnemonic, "invlpga") != 0)
+      && (strncmp (mnemonic, "monitor", 7) != 0)
+      && (strncmp (mnemonic, "mwait", 5) != 0)
       && !(operand_type_check (i.types[0], imm)
 	   && operand_type_check (i.types[1], imm)))
     swap_operands ();
diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp
index 8d22362..d884f89 100644
--- a/gas/testsuite/gas/i386/i386.exp
+++ b/gas/testsuite/gas/i386/i386.exp
@@ -77,6 +77,7 @@ if [expr ([istarget "i*86-*-*"] ||  [istarget "x86_64-*-*"]) && [gas_32_check]]
     run_dump_test "sse2-16bit"
     run_dump_test "sub"
     run_dump_test "sse3"
+    run_dump_test "sse3-intel"
     run_dump_test "sib"
     run_dump_test "sib-intel"
     run_dump_test "disp"
@@ -700,6 +701,7 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check]] t
     run_dump_test "x86-64-vmfunc"
     run_dump_test "immed64"
     run_dump_test "x86-64-sse3"
+    run_dump_test "x86-64-sse3-intel"
     run_dump_test "x86-64-crx"
     run_dump_test "x86-64-crx-suffix"
     run_dump_test "x86-64-drx"
diff --git a/gas/testsuite/gas/i386/sse3-intel.d b/gas/testsuite/gas/i386/sse3-intel.d
new file mode 100644
index 0000000..ec87eaa
--- /dev/null
+++ b/gas/testsuite/gas/i386/sse3-intel.d
@@ -0,0 +1,43 @@
+#objdump: -dwMintel
+#name: i386 SSE3 (Intel disassembly)
+#source: sse3.s
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+000 <foo>:
+[ 	]*[0-9a-f]+:	66 0f d0 01[ 	]+addsubpd xmm0,(XMMWORD PTR )?\[ecx\]
+[ 	]*[0-9a-f]+:	66 0f d0 ca[ 	]+addsubpd xmm1,xmm2
+[ 	]*[0-9a-f]+:	f2 0f d0 13[ 	]+addsubps xmm2,(XMMWORD PTR )?\[ebx\]
+[ 	]*[0-9a-f]+:	f2 0f d0 dc[ 	]+addsubps xmm3,xmm4
+[ 	]*[0-9a-f]+:	df 88 90 90 90 90[ 	]+fisttp WORD PTR \[eax-0x6f6f6f70\]
+[ 	]*[0-9a-f]+:	db 88 90 90 90 90[ 	]+fisttp DWORD PTR \[eax-0x6f6f6f70\]
+[ 	]*[0-9a-f]+:	dd 88 90 90 90 90[ 	]+fisttp QWORD PTR \[eax-0x6f6f6f70\]
+[ 	]*[0-9a-f]+:	66 0f 7c 65 00[ 	]+haddpd xmm4,(XMMWORD PTR )?\[ebp(\+0x0)\]
+[ 	]*[0-9a-f]+:	66 0f 7c ee[ 	]+haddpd xmm5,xmm6
+[ 	]*[0-9a-f]+:	f2 0f 7c 37[ 	]+haddps xmm6,(XMMWORD PTR )?\[edi\]
+[ 	]*[0-9a-f]+:	f2 0f 7c f8[ 	]+haddps xmm7,xmm0
+[ 	]*[0-9a-f]+:	66 0f 7d c1[ 	]+hsubpd xmm0,xmm1
+[ 	]*[0-9a-f]+:	66 0f 7d 0a[ 	]+hsubpd xmm1,(XMMWORD PTR )?\[edx\]
+[ 	]*[0-9a-f]+:	f2 0f 7d d2[ 	]+hsubps xmm2,xmm2
+[ 	]*[0-9a-f]+:	f2 0f 7d 1c 24[ 	]+hsubps xmm3,(XMMWORD PTR )?\[esp\]
+[ 	]*[0-9a-f]+:	f2 0f f0 2e[ 	]+lddqu  xmm5,(XMMWORD PTR )?\[esi\]
+[ 	]*[0-9a-f]+:	0f 01 c8[ 	]+monitor *
+[ 	]*[0-9a-f]+:	0f 01 c8[ 	]+monitor *
+[ 	]*[0-9a-f]+:	f2 0f 12 f7[ 	]+movddup xmm6,xmm7
+[ 	]*[0-9a-f]+:	f2 0f 12 38[ 	]+movddup xmm7,(QWORD PTR )?\[eax\]
+[ 	]*[0-9a-f]+:	f3 0f 16 01[ 	]+movshdup xmm0,(XMMWORD PTR )?\[ecx\]
+[ 	]*[0-9a-f]+:	f3 0f 16 ca[ 	]+movshdup xmm1,xmm2
+[ 	]*[0-9a-f]+:	f3 0f 12 13[ 	]+movsldup xmm2,(XMMWORD PTR )?\[ebx\]
+[ 	]*[0-9a-f]+:	f3 0f 12 dc[ 	]+movsldup xmm3,xmm4
+[ 	]*[0-9a-f]+:	0f 01 c9[ 	]+mwait *
+[ 	]*[0-9a-f]+:	0f 01 c9[ 	]+mwait *
+[ 	]*[0-9a-f]+:	67 0f 01 c8[ 	]+addr16 monitor *
+[ 	]*[0-9a-f]+:	67 0f 01 c8[ 	]+addr16 monitor *
+[ 	]*[0-9a-f]+:	f2 0f 12 38[ 	]+movddup xmm7,(QWORD PTR )?\[eax\]
+[ 	]*[0-9a-f]+:	f2 0f 12 38[ 	]+movddup xmm7,(QWORD PTR )?\[eax\]
+[ 	]*[0-9a-f]+:	0f 01 c8[ 	]+monitor *
+[ 	]*[0-9a-f]+:	67 0f 01 c8[ 	]+addr16 monitor *
+[ 	]*[0-9a-f]+:	0f 01 c9[ 	]+mwait *
+#pass
diff --git a/gas/testsuite/gas/i386/sse3.d b/gas/testsuite/gas/i386/sse3.d
index 3b12389..8035189 100644
--- a/gas/testsuite/gas/i386/sse3.d
+++ b/gas/testsuite/gas/i386/sse3.d
@@ -36,4 +36,7 @@ Disassembly of section .text:
   70:	67 0f 01 c8 [ 	]*monitor %ax,%ecx,%edx
   74:	f2 0f 12 38 [ 	]*movddup \(%eax\),%xmm7
   78:	f2 0f 12 38 [ 	]*movddup \(%eax\),%xmm7
+[ 	]*[0-9a-f]+:	0f 01 c8[ 	]+monitor %eax,%ecx,%edx
+[ 	]*[0-9a-f]+:	67 0f 01 c8[ 	]+monitor %ax,%ecx,%edx
+[ 	]*[0-9a-f]+:	0f 01 c9[ 	]+mwait  %eax,%ecx
 #pass
diff --git a/gas/testsuite/gas/i386/sse3.s b/gas/testsuite/gas/i386/sse3.s
index de0f316..186e4a5 100644
--- a/gas/testsuite/gas/i386/sse3.s
+++ b/gas/testsuite/gas/i386/sse3.s
@@ -35,3 +35,7 @@ foo:
 	.intel_syntax noprefix
 	movddup xmm7,[eax]
 	movddup xmm7,QWORD PTR [eax]
+
+	monitor		eax, ecx, edx
+	monitor		ax, ecx, edx
+	mwait		eax, ecx
diff --git a/gas/testsuite/gas/i386/x86-64-sse3-intel.d b/gas/testsuite/gas/i386/x86-64-sse3-intel.d
new file mode 100644
index 0000000..44f1503
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-sse3-intel.d
@@ -0,0 +1,46 @@
+#objdump: -dwMintel
+#name: x86-64 SSE3 (Intel disassembly)
+#source: x86-64-sse3.s
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+000 <foo>:
+[ 	]*[a-f0-9]+:	66 0f d0 01[ 	]+addsubpd xmm0,(XMMWORD PTR )?\[rcx\]
+[ 	]*[a-f0-9]+:	66 0f d0 ca[ 	]+addsubpd xmm1,xmm2
+[ 	]*[a-f0-9]+:	f2 0f d0 13[ 	]+addsubps xmm2,(XMMWORD PTR )?\[rbx\]
+[ 	]*[a-f0-9]+:	f2 0f d0 dc[ 	]+addsubps xmm3,xmm4
+[ 	]*[a-f0-9]+:	df 88 90 90 90 00[ 	]+fisttp WORD PTR \[rax\+0x909090\]
+[ 	]*[a-f0-9]+:	db 88 90 90 90 00[ 	]+fisttp DWORD PTR \[rax\+0x909090\]
+[ 	]*[a-f0-9]+:	dd 88 90 90 90 00[ 	]+fisttp QWORD PTR \[rax\+0x909090\]
+[ 	]*[a-f0-9]+:	66 0f 7c 65 00[ 	]+haddpd xmm4,(XMMWORD PTR )?\[rbp(\+0x0)\]
+[ 	]*[a-f0-9]+:	66 0f 7c ee[ 	]+haddpd xmm5,xmm6
+[ 	]*[a-f0-9]+:	f2 0f 7c 37[ 	]+haddps xmm6,(XMMWORD PTR )?\[rdi\]
+[ 	]*[a-f0-9]+:	f2 0f 7c f8[ 	]+haddps xmm7,xmm0
+[ 	]*[a-f0-9]+:	66 0f 7d c1[ 	]+hsubpd xmm0,xmm1
+[ 	]*[a-f0-9]+:	66 0f 7d 0a[ 	]+hsubpd xmm1,(XMMWORD PTR )?\[rdx\]
+[ 	]*[a-f0-9]+:	f2 0f 7d d2[ 	]+hsubps xmm2,xmm2
+[ 	]*[a-f0-9]+:	f2 0f 7d 1c 24[ 	]+hsubps xmm3,(XMMWORD PTR )?\[rsp\]
+[ 	]*[a-f0-9]+:	f2 0f f0 2e[ 	]+lddqu  xmm5,(XMMWORD PTR )?\[rsi\]
+[ 	]*[a-f0-9]+:	0f 01 c8[ 	]+monitor *
+[ 	]*[a-f0-9]+:	0f 01 c8[ 	]+monitor *
+[ 	]*[a-f0-9]+:	0f 01 c8[ 	]+monitor *
+[ 	]*[a-f0-9]+:	f2 0f 12 f7[ 	]+movddup xmm6,xmm7
+[ 	]*[a-f0-9]+:	f2 0f 12 38[ 	]+movddup xmm7,(QWORD PTR )?\[rax\]
+[ 	]*[a-f0-9]+:	f3 0f 16 01[ 	]+movshdup xmm0,(XMMWORD PTR )?\[rcx\]
+[ 	]*[a-f0-9]+:	f3 0f 16 ca[ 	]+movshdup xmm1,xmm2
+[ 	]*[a-f0-9]+:	f3 0f 12 13[ 	]+movsldup xmm2,(XMMWORD PTR )?\[rbx\]
+[ 	]*[a-f0-9]+:	f3 0f 12 dc[ 	]+movsldup xmm3,xmm4
+[ 	]*[a-f0-9]+:	0f 01 c9[ 	]+mwait *
+[ 	]*[a-f0-9]+:	0f 01 c9[ 	]+mwait *
+[ 	]*[a-f0-9]+:	0f 01 c9[ 	]+mwait *
+[ 	]*[a-f0-9]+:	67 0f 01 c8[ 	]+addr32 monitor *
+[ 	]*[a-f0-9]+:	67 0f 01 c8[ 	]+addr32 monitor *
+[ 	]*[a-f0-9]+:	67 0f 01 c8[ 	]+addr32 monitor *
+[ 	]*[a-f0-9]+:	f2 0f 12 38[ 	]+movddup xmm7,(QWORD PTR )?\[rax\]
+[ 	]*[a-f0-9]+:	f2 0f 12 38[ 	]+movddup xmm7,(QWORD PTR )?\[rax\]
+[ 	]*[a-f0-9]+:	0f 01 c8[ 	]+monitor *
+[ 	]*[a-f0-9]+:	67 0f 01 c8[ 	]+addr32 monitor *
+[ 	]*[a-f0-9]+:	0f 01 c9[ 	]+mwait *
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-sse3.d b/gas/testsuite/gas/i386/x86-64-sse3.d
index 5b8b37d..02b4fb6 100644
--- a/gas/testsuite/gas/i386/x86-64-sse3.d
+++ b/gas/testsuite/gas/i386/x86-64-sse3.d
@@ -39,4 +39,7 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	67 0f 01 c8 [ 	]*monitor %eax,%ecx,%edx
 [ 	]*[a-f0-9]+:	f2 0f 12 38 [ 	]*movddup \(%rax\),%xmm7
 [ 	]*[a-f0-9]+:	f2 0f 12 38 [ 	]*movddup \(%rax\),%xmm7
+[ 	]*[0-9a-f]+:	0f 01 c8[ 	]+monitor %rax,%ecx,%edx
+[ 	]*[0-9a-f]+:	67 0f 01 c8[ 	]+monitor %eax,%ecx,%edx
+[ 	]*[0-9a-f]+:	0f 01 c9[ 	]+mwait  %eax,%ecx
 #pass
diff --git a/gas/testsuite/gas/i386/x86-64-sse3.s b/gas/testsuite/gas/i386/x86-64-sse3.s
index 2b9ecf5..eb8cdbb 100644
--- a/gas/testsuite/gas/i386/x86-64-sse3.s
+++ b/gas/testsuite/gas/i386/x86-64-sse3.s
@@ -38,3 +38,7 @@ foo:
 	.intel_syntax noprefix
 	movddup xmm7,[rax]
 	movddup xmm7,QWORD PTR [rax]
+
+	monitor		rax, ecx, edx
+	monitor		eax, ecx, edx
+	mwait		eax, ecx