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| author | Mike Frysinger <vapier@gentoo.org> | 2015-11-15 00:17:02 -0800 |
|---|---|---|
| committer | Mike Frysinger <vapier@gentoo.org> | 2015-11-15 07:59:09 -0500 |
| commit | 9ef4651c4930423f9678832f793343059d4ef9ad (patch) | |
| tree | 0515551fe3f6f259dad83197be798445b8bbcbb1 | |
| parent | 5809534fe153fbbf925424716eb2e295f2217c65 (diff) | |
| download | fsf-binutils-gdb-9ef4651c4930423f9678832f793343059d4ef9ad.zip fsf-binutils-gdb-9ef4651c4930423f9678832f793343059d4ef9ad.tar.gz fsf-binutils-gdb-9ef4651c4930423f9678832f793343059d4ef9ad.tar.bz2 | |
sim: mcore: switch to common sim-reg
This is not entirely useful as mcore doesn't (yet) store its register
state in the cpu state, but it does allow for switching to the common
code for these functions.
| -rw-r--r-- | sim/mcore/ChangeLog | 9 | ||||
| -rw-r--r-- | sim/mcore/Makefile.in | 1 | ||||
| -rw-r--r-- | sim/mcore/interp.c | 10 |
3 files changed, 16 insertions, 4 deletions
diff --git a/sim/mcore/ChangeLog b/sim/mcore/ChangeLog index af698e0..d89050d 100644 --- a/sim/mcore/ChangeLog +++ b/sim/mcore/ChangeLog @@ -1,5 +1,14 @@ 2015-11-15 Mike Frysinger <vapier@gentoo.org> + * Makefile.in (SIM_OBJS): Add sim-reg.o. + * interp.c (sim_store_register): Rename to ... + (mcore_reg_store): ... this. Change SIM_DESC to SIM_CPU. + (sim_fetch_register): Rename to ... + (mcore_reg_fetch): ... this. Change SIM_DESC to SIM_CPU. + (sim_open): Call CPU_REG_FETCH and CPU_REG_STORE. + +2015-11-15 Mike Frysinger <vapier@gentoo.org> + * Makefile.in (SIM_OBJS): Add sim-reason.o and sim-resume.o. * interp.c (struct mcore_regset): Delete exception. (util): Add SIM_DESC and SIM_CPU args. Call sim_engine_halt instead diff --git a/sim/mcore/Makefile.in b/sim/mcore/Makefile.in index c66e568..8e84b0e 100644 --- a/sim/mcore/Makefile.in +++ b/sim/mcore/Makefile.in @@ -25,6 +25,7 @@ SIM_OBJS = \ $(SIM_NEW_COMMON_OBJS) \ sim-hload.o \ sim-reason.o \ + sim-reg.o \ sim-resume.o \ sim-stop.o diff --git a/sim/mcore/interp.c b/sim/mcore/interp.c index 7009f00..6972b7f 100644 --- a/sim/mcore/interp.c +++ b/sim/mcore/interp.c @@ -1285,8 +1285,8 @@ sim_engine_run (SIM_DESC sd, } } -int -sim_store_register (SIM_DESC sd, int rn, unsigned char *memory, int length) +static int +mcore_reg_store (SIM_CPU *scpu, int rn, unsigned char *memory, int length) { if (rn < NUM_MCORE_REGS && rn >= 0) { @@ -1305,8 +1305,8 @@ sim_store_register (SIM_DESC sd, int rn, unsigned char *memory, int length) return 0; } -int -sim_fetch_register (SIM_DESC sd, int rn, unsigned char *memory, int length) +static int +mcore_reg_fetch (SIM_CPU *scpu, int rn, unsigned char *memory, int length) { if (rn < NUM_MCORE_REGS && rn >= 0) { @@ -1447,6 +1447,8 @@ sim_open (SIM_OPEN_KIND kind, host_callback *cb, struct bfd *abfd, char **argv) { SIM_CPU *cpu = STATE_CPU (sd, i); + CPU_REG_FETCH (cpu) = mcore_reg_fetch; + CPU_REG_STORE (cpu) = mcore_reg_store; CPU_PC_FETCH (cpu) = mcore_pc_get; CPU_PC_STORE (cpu) = mcore_pc_set; |