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author | Nick Clifton <nickc@redhat.com> | 2018-01-02 12:13:17 +0000 |
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committer | Nick Clifton <nickc@redhat.com> | 2018-01-02 12:13:17 +0000 |
commit | 806ab1c045c4cbb5c906f79bcb2e0c3058f4c6fd (patch) | |
tree | 3bdca78d0395dec9358665d293d6d844c165de2d | |
parent | 1508bbf535b03e3b9105d01a9e19f29f131b3d1a (diff) | |
download | fsf-binutils-gdb-806ab1c045c4cbb5c906f79bcb2e0c3058f4c6fd.zip fsf-binutils-gdb-806ab1c045c4cbb5c906f79bcb2e0c3058f4c6fd.tar.gz fsf-binutils-gdb-806ab1c045c4cbb5c906f79bcb2e0c3058f4c6fd.tar.bz2 |
Fix typo in do_mrs function in ARM assembler.
PR 18119
* config/tc-arm.c (do_mrs): Fix test of bits 16-19 in non-banked
version of ARM MRS instruction.
-rw-r--r-- | gas/ChangeLog | 6 | ||||
-rw-r--r-- | gas/config/tc-arm.c | 2 |
2 files changed, 7 insertions, 1 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index eeeff51..2028383 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,9 @@ +2018-01-02 Nick Clifton <nickc@redhat.com> + + PR 18119 + * config/tc-arm.c (do_mrs): Fix test of bits 16-19 in non-banked + version of ARM MRS instruction. + 2017-12-28 Jim Wilson <jimw@sifive.com> * testsuite/gas/riscv/priv-reg.d, testsuite/gas/riscv/priv-reg.s: New. diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c index c12a453..c304793 100644 --- a/gas/config/tc-arm.c +++ b/gas/config/tc-arm.c @@ -9243,7 +9243,7 @@ do_mrs (void) if (inst.operands[1].isreg) { br = inst.operands[1].reg; - if (((br & 0x200) == 0) && ((br & 0xf0000) != 0xf000)) + if (((br & 0x200) == 0) && ((br & 0xf0000) != 0xf0000)) as_bad (_("bad register for mrs")); } else |