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author | Pedro Alves <palves@redhat.com> | 2014-02-12 12:27:50 +0000 |
---|---|---|
committer | Pedro Alves <palves@redhat.com> | 2014-02-12 12:28:25 +0000 |
commit | 5caa2f0b272d2a6edf56571fd0c59f922f26eb41 (patch) | |
tree | 95be79885d2d6c8ff33023d202e1a0aac1520e94 | |
parent | 76fd5f745a0ba0b163fada011bece5084b3079c7 (diff) | |
download | fsf-binutils-gdb-5caa2f0b272d2a6edf56571fd0c59f922f26eb41.zip fsf-binutils-gdb-5caa2f0b272d2a6edf56571fd0c59f922f26eb41.tar.gz fsf-binutils-gdb-5caa2f0b272d2a6edf56571fd0c59f922f26eb41.tar.bz2 |
H8/300: Fix pseudo registers reads/writes.
'info registers ccr' corrupts memory.
Debugging gdb under Valgrind, we see:
(gdb) info registers ccr
==23225== Invalid write of size 1
==23225== at 0x4A0A308: memcpy@@GLIBC_2.14 (mc_replace_strmem.c:881)
==23225== by 0x52D334: regcache_raw_read (regcache.c:625)
==23225== by 0x45E4D8: h8300_pseudo_register_read (h8300-tdep.c:1171)
==23225== by 0x5B694B: gdbarch_pseudo_register_read (gdbarch.c:1926)
==23225== by 0x52DADB: regcache_cooked_read (regcache.c:740)
==23225== by 0x52DC10: regcache_cooked_read_value (regcache.c:765)
==23225== by 0x68CA41: sentinel_frame_prev_register (sentinel-frame.c:52)
==23225== by 0x6B80CB: frame_unwind_register_value (frame.c:1105)
==23225== by 0x6B7C97: frame_register_unwind (frame.c:1010)
==23225== by 0x6B7F73: frame_unwind_register (frame.c:1064)
==23225== by 0x6B8359: frame_unwind_register_signed (frame.c:1162)
==23225== by 0x6B8396: get_frame_register_signed (frame.c:1169)
==23225== Address 0x4f7b031 is 0 bytes after a block of size 1 alloc'd
==23225== at 0x4A06B0F: calloc (vg_replace_malloc.c:593)
==23225== by 0x6EB754: xcalloc (common-utils.c:91)
==23225== by 0x6EB793: xzalloc (common-utils.c:101)
==23225== by 0x53A782: allocate_value_contents (value.c:854)
==23225== by 0x53A7B4: allocate_value (value.c:864)
==23225== by 0x52DBC8: regcache_cooked_read_value (regcache.c:757)
==23225== by 0x68CA41: sentinel_frame_prev_register (sentinel-frame.c:52)
==23225== by 0x6B80CB: frame_unwind_register_value (frame.c:1105)
==23225== by 0x6B7C97: frame_register_unwind (frame.c:1010)
==23225== by 0x6B7F73: frame_unwind_register (frame.c:1064)
==23225== by 0x6B8359: frame_unwind_register_signed (frame.c:1162)
==23225== by 0x6B8396: get_frame_register_signed (frame.c:1169)
==23225==
ccr 0x00 0 I-0 UI-0 H-0 U-0 N-0 Z-0 V-0 C-0 u> u>= != >= >
(gdb)
This bit:
==23225== Invalid write of size 1
==23225== at 0x4A0A308: memcpy@@GLIBC_2.14 (mc_replace_strmem.c:881)
==23225== by 0x52D334: regcache_raw_read (regcache.c:625)
==23225== by 0x45E4D8: h8300_pseudo_register_read (h8300-tdep.c:1171)
shows the problem. The CCR pseudo register has type length of 1,
while the corresponding CCR raw register has a length of 2 or 4
(depending on mode). In
sim/h8300/compile.c:sim_{fetch|store}_register we see that the sim
also treats those raw registers (CCR/EXR) as 2 or 4 bytes length.
gdb/
2014-02-12 Pedro Alves <palves@redhat.com>
* h8300-tdep.c (pseudo_from_raw_register)
(raw_from_pseudo_register): New functions.
(h8300_pseudo_register_read, h8300_pseudo_register_write): Use
them.
-rw-r--r-- | gdb/ChangeLog | 7 | ||||
-rw-r--r-- | gdb/h8300-tdep.c | 48 |
2 files changed, 51 insertions, 4 deletions
diff --git a/gdb/ChangeLog b/gdb/ChangeLog index 6f0f903..5e9e9b8 100644 --- a/gdb/ChangeLog +++ b/gdb/ChangeLog @@ -1,5 +1,12 @@ 2014-02-12 Pedro Alves <palves@redhat.com> + * h8300-tdep.c (pseudo_from_raw_register) + (raw_from_pseudo_register): New functions. + (h8300_pseudo_register_read, h8300_pseudo_register_write): Use + them. + +2014-02-12 Pedro Alves <palves@redhat.com> + * h8300-tdep.c (h8300_register_sim_regno): New function. (h8300_gdbarch_init): Install h8300_register_sim_regno as gdbarch_register_sim_regno hook. diff --git a/gdb/h8300-tdep.c b/gdb/h8300-tdep.c index 4193287..98343e0 100644 --- a/gdb/h8300-tdep.c +++ b/gdb/h8300-tdep.c @@ -1164,15 +1164,55 @@ h8300_register_type (struct gdbarch *gdbarch, int regno) } } +/* Helpers for h8300_pseudo_register_read. We expose ccr/exr as + pseudo-registers to users with smaller sizes than the corresponding + raw registers. These helpers extend/narrow the values. */ + +static enum register_status +pseudo_from_raw_register (struct gdbarch *gdbarch, struct regcache *regcache, + gdb_byte *buf, int pseudo_regno, int raw_regno) +{ + enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); + enum register_status status; + ULONGEST val; + + status = regcache_raw_read_unsigned (regcache, raw_regno, &val); + if (status == REG_VALID) + store_unsigned_integer (buf, + register_size (gdbarch, pseudo_regno), + byte_order, val); + return status; +} + +/* See pseudo_from_raw_register. */ + +static void +raw_from_pseudo_register (struct gdbarch *gdbarch, struct regcache *regcache, + const gdb_byte *buf, int raw_regno, int pseudo_regno) +{ + enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); + ULONGEST val; + + val = extract_unsigned_integer (buf, register_size (gdbarch, pseudo_regno), + byte_order); + regcache_raw_write_unsigned (regcache, raw_regno, val); +} + static enum register_status h8300_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache, int regno, gdb_byte *buf) { if (regno == E_PSEUDO_CCR_REGNUM (gdbarch)) - return regcache_raw_read (regcache, E_CCR_REGNUM, buf); + { + return pseudo_from_raw_register (gdbarch, regcache, buf, + regno, E_CCR_REGNUM); + } else if (regno == E_PSEUDO_EXR_REGNUM (gdbarch)) - return regcache_raw_read (regcache, E_EXR_REGNUM, buf); + { + return pseudo_from_raw_register (gdbarch, regcache, buf, + regno, E_EXR_REGNUM); + } else return regcache_raw_read (regcache, regno, buf); } @@ -1183,9 +1223,9 @@ h8300_pseudo_register_write (struct gdbarch *gdbarch, const gdb_byte *buf) { if (regno == E_PSEUDO_CCR_REGNUM (gdbarch)) - regcache_raw_write (regcache, E_CCR_REGNUM, buf); + raw_from_pseudo_register (gdbarch, regcache, buf, E_CCR_REGNUM, regno); else if (regno == E_PSEUDO_EXR_REGNUM (gdbarch)) - regcache_raw_write (regcache, E_EXR_REGNUM, buf); + raw_from_pseudo_register (gdbarch, regcache, buf, E_EXR_REGNUM, regno); else regcache_raw_write (regcache, regno, buf); } |