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| author | Richard Sandiford <rdsandiford@googlemail.com> | 2014-03-04 21:18:02 +0000 |
|---|---|---|
| committer | Richard Sandiford <rdsandiford@googlemail.com> | 2014-03-04 21:18:02 +0000 |
| commit | 4ba154f579d9ac01829343ed7538727c0b2e87d8 (patch) | |
| tree | c8520ecea57c2f5104fc99501b0ed183ca7617ab | |
| parent | 079b5aec63d98106d75981c48ec5191343853986 (diff) | |
| download | fsf-binutils-gdb-4ba154f579d9ac01829343ed7538727c0b2e87d8.zip fsf-binutils-gdb-4ba154f579d9ac01829343ed7538727c0b2e87d8.tar.gz fsf-binutils-gdb-4ba154f579d9ac01829343ed7538727c0b2e87d8.tar.bz2 | |
bfd/
2014-02-04 Heiher <r@hev.cc>
* elfxx-mips.c (mips_set_isa_flags): Use E_MIPS_ARCH_64R2 for
Loongson-3A.
(mips_mach_extensions): Make bfd_mach_mips_loongson_3a an
extension of bfd_mach_mipsisa64r2.
opcodes/
2014-02-04 Heiher <r@hev.cc>
* mips-dis.c (mips_arch_choices): Usee ISA_MIPS64R2 for Loongson-3A.
gas/
2014-02-04 Heiher <r@hev.cc>
* config/tc-mips.c (mips_cpu_info_table): Use ISA_MIPS64R2 for
Loongson-3A.
| -rw-r--r-- | bfd/ChangeLog | 7 | ||||
| -rw-r--r-- | bfd/elfxx-mips.c | 4 | ||||
| -rw-r--r-- | gas/ChangeLog | 5 | ||||
| -rw-r--r-- | gas/config/tc-mips.c | 2 | ||||
| -rw-r--r-- | opcodes/ChangeLog | 4 | ||||
| -rw-r--r-- | opcodes/mips-dis.c | 2 |
6 files changed, 20 insertions, 4 deletions
diff --git a/bfd/ChangeLog b/bfd/ChangeLog index a797742..e384e49 100644 --- a/bfd/ChangeLog +++ b/bfd/ChangeLog @@ -1,3 +1,10 @@ +2014-03-04 Heiher <r@hev.cc> + + * elfxx-mips.c (mips_set_isa_flags): Use E_MIPS_ARCH_64R2 for + Loongson-3A. + (mips_mach_extensions): Make bfd_mach_mips_loongson_3a an + extension of bfd_mach_mipsisa64r2. + 2014-03-04 Nick Clifton <nickc@redhat.com> PR ld/16017 diff --git a/bfd/elfxx-mips.c b/bfd/elfxx-mips.c index 9011b6d..a395eef 100644 --- a/bfd/elfxx-mips.c +++ b/bfd/elfxx-mips.c @@ -11624,7 +11624,7 @@ mips_set_isa_flags (bfd *abfd) break; case bfd_mach_mips_loongson_3a: - val = E_MIPS_ARCH_64 | E_MIPS_MACH_LS3A; + val = E_MIPS_ARCH_64R2 | E_MIPS_MACH_LS3A; break; case bfd_mach_mips_octeon: @@ -14208,12 +14208,12 @@ static const struct mips_mach_extension mips_mach_extensions[] = { bfd_mach_mips_octeon2, bfd_mach_mips_octeonp }, { bfd_mach_mips_octeonp, bfd_mach_mips_octeon }, { bfd_mach_mips_octeon, bfd_mach_mipsisa64r2 }, + { bfd_mach_mips_loongson_3a, bfd_mach_mipsisa64r2 }, /* MIPS64 extensions. */ { bfd_mach_mipsisa64r2, bfd_mach_mipsisa64 }, { bfd_mach_mips_sb1, bfd_mach_mipsisa64 }, { bfd_mach_mips_xlr, bfd_mach_mipsisa64 }, - { bfd_mach_mips_loongson_3a, bfd_mach_mipsisa64 }, /* MIPS V extensions. */ { bfd_mach_mipsisa64, bfd_mach_mips5 }, diff --git a/gas/ChangeLog b/gas/ChangeLog index 66d405f..96b590e 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,8 @@ +2014-03-04 Heiher <r@hev.cc> + + * config/tc-mips.c (mips_cpu_info_table): Use ISA_MIPS64R2 for + Loongson-3A. + 2014-03-03 Nick Clifton <nickc@redhat.com> * config/msp430/msp430.c: Replace known mcu array with known diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c index 34f1bf0..7f5b3c1 100644 --- a/gas/config/tc-mips.c +++ b/gas/config/tc-mips.c @@ -17904,7 +17904,7 @@ static const struct mips_cpu_info mips_cpu_info_table[] = /* Broadcom SB-1A CPU core */ { "sb1a", 0, ASE_MIPS3D | ASE_MDMX, ISA_MIPS64, CPU_SB1 }, - { "loongson3a", 0, 0, ISA_MIPS64, CPU_LOONGSON_3A }, + { "loongson3a", 0, 0, ISA_MIPS64R2, CPU_LOONGSON_3A }, /* MIPS 64 Release 2 */ diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index ea74ba6..7ac2154 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,7 @@ +2014-03-04 Heiher <r@hev.cc> + + * mips-dis.c (mips_arch_choices): Usee ISA_MIPS64R2 for Loongson-3A. + 2014-03-04 Richard Sandiford <rdsandiford@googlemail.com> * mips-opc.c (mips_builtin_opcodes): Move the udi* instructions diff --git a/opcodes/mips-dis.c b/opcodes/mips-dis.c index 09a2ed1..12bb7b9 100644 --- a/opcodes/mips-dis.c +++ b/opcodes/mips-dis.c @@ -588,7 +588,7 @@ const struct mips_arch_choice mips_arch_choices[] = NULL, 0, mips_cp1_names_numeric, mips_hwr_names_numeric }, { "loongson3a", 1, bfd_mach_mips_loongson_3a, CPU_LOONGSON_3A, - ISA_MIPS64 | INSN_LOONGSON_3A, 0, mips_cp0_names_numeric, + ISA_MIPS64R2 | INSN_LOONGSON_3A, 0, mips_cp0_names_numeric, NULL, 0, mips_cp1_names_mips3264, mips_hwr_names_numeric }, { "octeon", 1, bfd_mach_mips_octeon, CPU_OCTEON, |