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author | Mike Frysinger <vapier@gentoo.org> | 2011-03-15 20:10:40 +0000 |
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committer | Mike Frysinger <vapier@gentoo.org> | 2011-03-15 20:10:40 +0000 |
commit | 227d265839dcb5f90383a23e36dc7d0a5df62075 (patch) | |
tree | ef2fe00b0d103f3e4b3f0a63606d3b6aef43ffa9 | |
parent | e3809a37d45651f2a08be03dda0b48275a6e04d8 (diff) | |
download | fsf-binutils-gdb-227d265839dcb5f90383a23e36dc7d0a5df62075.zip fsf-binutils-gdb-227d265839dcb5f90383a23e36dc7d0a5df62075.tar.gz fsf-binutils-gdb-227d265839dcb5f90383a23e36dc7d0a5df62075.tar.bz2 |
sim: bfin: handle AZ updates with 16bit adds/subs
We weren't updating AZ when doing a 16bit add or sub insn. Implement it.
Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
-rw-r--r-- | sim/bfin/ChangeLog | 5 | ||||
-rw-r--r-- | sim/bfin/bfin-sim.c | 2 |
2 files changed, 6 insertions, 1 deletions
diff --git a/sim/bfin/ChangeLog b/sim/bfin/ChangeLog index deaf615..5973570 100644 --- a/sim/bfin/ChangeLog +++ b/sim/bfin/ChangeLog @@ -1,5 +1,10 @@ 2011-03-15 Robin Getz <robin.getz@analog.com> + * bfin-sim.c (decode_dsp32alu_0): Set AZ based on val for 16bit adds + and subs. + +2011-03-15 Robin Getz <robin.getz@analog.com> + * bfin-sim.c (decode_macfunc): Move acc STOREs behind op != 3 check. 2011-03-15 Robin Getz <robin.getz@analog.com> diff --git a/sim/bfin/bfin-sim.c b/sim/bfin/bfin-sim.c index 14cf41a..6415388 100644 --- a/sim/bfin/bfin-sim.c +++ b/sim/bfin/bfin-sim.c @@ -4128,7 +4128,7 @@ decode_dsp32alu_0 (SIM_CPU *cpu, bu16 iw0, bu16 iw1) SET_DREG_L (dst0, val); SET_ASTATREG (an, val & 0x8000); - + SET_ASTATREG (az, val == 0); } else if ((aop == 0 || aop == 2) && aopcde == 9 && s == 1) { |