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authorNathan Sidwell <nathan@codesourcery.com>2006-11-16 07:22:25 +0000
committerNathan Sidwell <nathan@codesourcery.com>2006-11-16 07:22:25 +0000
commit869ddf2a184e309b1deb9a8188dac514de6c4261 (patch)
tree127a13a32aa4ffdf0710d171c1460cfcece2895c
parent41c55c875aae843a3d8830cd23ff9265ba262ae8 (diff)
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gas/
* config/tc-m68k.c (m68k_ip): Correct output of cpu aliases. gas/testsuite/ * gas/m68k/all.exp: Add mcf-trap. * gas/m68k/mcf-trap.[sd]: New. opcodes/ * m68k-opc.c (m68k_opcodes): Place trap instructions before set conditionals. Add tpf coldfire instruction as alias for trapf.
-rw-r--r--gas/config/tc-m68k.c36
-rw-r--r--gas/testsuite/ChangeLog5
-rw-r--r--gas/testsuite/gas/m68k/all.exp1
-rw-r--r--gas/testsuite/gas/m68k/mcf-trap.d15
-rw-r--r--gas/testsuite/gas/m68k/mcf-trap.s9
-rw-r--r--opcodes/ChangeLog5
-rw-r--r--opcodes/m68k-opc.c121
7 files changed, 117 insertions, 75 deletions
diff --git a/gas/config/tc-m68k.c b/gas/config/tc-m68k.c
index 3f4382e..17b9f4f 100644
--- a/gas/config/tc-m68k.c
+++ b/gas/config/tc-m68k.c
@@ -2061,29 +2061,31 @@ m68k_ip (char *instring)
if (!cpu->alias && (cpu->arch & ok_arch))
{
const struct m68k_cpu *alias;
-
+ int seen_master = 0;
+
if (any)
APPEND (", ");
any = 0;
APPEND (cpu->name);
- APPEND (" [");
- if (cpu != m68k_cpus)
- for (alias = cpu - 1; alias->alias; alias--)
+ for (alias = cpu; alias != m68k_cpus; alias--)
+ if (alias[-1].alias >= 0)
+ break;
+ for (; !seen_master || alias->alias > 0; alias++)
{
- if (any)
- APPEND (", ");
- APPEND (alias->name);
- any = 1;
+ if (!alias->alias)
+ seen_master = 1;
+ else
+ {
+ if (any)
+ APPEND (", ");
+ else
+ APPEND (" [");
+ APPEND (alias->name);
+ any = 1;
+ }
}
- for (alias = cpu + 1; alias->alias; alias++)
- {
- if (any)
- APPEND (", ");
- APPEND (alias->name);
- any = 1;
- }
-
- APPEND ("]");
+ if (any)
+ APPEND ("]");
any = 1;
}
if (paren)
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index dce5cb4..95e184a 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2006-11-16 Nathan Sidwell <nathan@codesourcery.com>
+
+ * gas/m68k/all.exp: Add mcf-trap.
+ * gas/m68k/mcf-trap.[sd]: New.
+
2006-11-15 Jan Beulich <jbeulich@novell.com>
* gas/elf/equ-reloc.[sd]: New.
diff --git a/gas/testsuite/gas/m68k/all.exp b/gas/testsuite/gas/m68k/all.exp
index 9516b1a..7d54f93 100644
--- a/gas/testsuite/gas/m68k/all.exp
+++ b/gas/testsuite/gas/m68k/all.exp
@@ -39,6 +39,7 @@ if [istarget m68*-*-*] then {
run_dump_test mcf-mac
run_dump_test mcf-emac
run_dump_test mcf-fpu
+ run_dump_test mcf-trap
run_dump_test arch-cpu-1
set testname "68000 operands"
diff --git a/gas/testsuite/gas/m68k/mcf-trap.d b/gas/testsuite/gas/m68k/mcf-trap.d
new file mode 100644
index 0000000..f899b69
--- /dev/null
+++ b/gas/testsuite/gas/m68k/mcf-trap.d
@@ -0,0 +1,15 @@
+#name: mcf-trap
+#objdump: -d
+#as: -m5208
+
+.*: file format .*
+
+Disassembly of section .text:
+
+0+ <.text>:
+[ 0-9a-f]+: 51fc tpf
+[ 0-9a-f]+: 51fa 1234 tpfw #4660
+[ 0-9a-f]+: 51fb 1234 5678 tpfl #305419896
+[ 0-9a-f]+: 51fc tpf
+[ 0-9a-f]+: 51fa 1234 tpfw #4660
+[ 0-9a-f]+: 51fb 1234 5678 tpfl #305419896
diff --git a/gas/testsuite/gas/m68k/mcf-trap.s b/gas/testsuite/gas/m68k/mcf-trap.s
new file mode 100644
index 0000000..a5d6acc
--- /dev/null
+++ b/gas/testsuite/gas/m68k/mcf-trap.s
@@ -0,0 +1,9 @@
+ # the m68k compatible names
+ trapf
+ trapf.w #0x1234
+ trapf.l #0x12345678
+
+ # the coldfire specific names
+ tpf
+ tpf.w #0x1234
+ tpf.l #0x12345678
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 727170e..9397d42 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,8 @@
+2006-11-16 Nathan Sidwell <nathan@codesourcery.com>
+
+ * m68k-opc.c (m68k_opcodes): Place trap instructions before set
+ conditionals. Add tpf coldfire instruction as alias for trapf.
+
2006-11-09 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (print_insn): Check PREFIX_REPNZ before
diff --git a/opcodes/m68k-opc.c b/opcodes/m68k-opc.c
index 601c55a..87648aa 100644
--- a/opcodes/m68k-opc.c
+++ b/opcodes/m68k-opc.c
@@ -1998,6 +1998,64 @@ const struct m68k_opcode m68k_opcodes[] =
{"sbcd", 2, one(0100400), one(0170770), "DsDd", m68000up },
{"sbcd", 2, one(0100410), one(0170770), "-s-d", m68000up },
+ /* Traps have to come before conditional sets, as they have a more
+ specific opcode. */
+{"trapcc", 2, one(0052374), one(0177777), "", m68020up | cpu32 },
+{"trapcs", 2, one(0052774), one(0177777), "", m68020up | cpu32 },
+{"trapeq", 2, one(0053774), one(0177777), "", m68020up | cpu32 },
+{"tpf", 2, one(0050774), one(0177777), "", mcfisa_a },
+{"trapf", 2, one(0050774), one(0177777), "", m68020up | cpu32 | mcfisa_a },
+{"trapge", 2, one(0056374), one(0177777), "", m68020up | cpu32 },
+{"trapgt", 2, one(0057374), one(0177777), "", m68020up | cpu32 },
+{"traphi", 2, one(0051374), one(0177777), "", m68020up | cpu32 },
+{"traple", 2, one(0057774), one(0177777), "", m68020up | cpu32 },
+{"trapls", 2, one(0051774), one(0177777), "", m68020up | cpu32 },
+{"traplt", 2, one(0056774), one(0177777), "", m68020up | cpu32 },
+{"trapmi", 2, one(0055774), one(0177777), "", m68020up | cpu32 },
+{"trapne", 2, one(0053374), one(0177777), "", m68020up | cpu32 },
+{"trappl", 2, one(0055374), one(0177777), "", m68020up | cpu32 },
+{"trapt", 2, one(0050374), one(0177777), "", m68020up | cpu32 },
+{"trapvc", 2, one(0054374), one(0177777), "", m68020up | cpu32 },
+{"trapvs", 2, one(0054774), one(0177777), "", m68020up | cpu32 },
+
+{"trapccw", 4, one(0052372), one(0177777), "#w", m68020up|cpu32 },
+{"trapcsw", 4, one(0052772), one(0177777), "#w", m68020up|cpu32 },
+{"trapeqw", 4, one(0053772), one(0177777), "#w", m68020up|cpu32 },
+{"tpfw", 4, one(0050772), one(0177777), "#w", mcfisa_a},
+{"trapfw", 4, one(0050772), one(0177777), "#w", m68020up|cpu32|mcfisa_a},
+{"trapgew", 4, one(0056372), one(0177777), "#w", m68020up|cpu32 },
+{"trapgtw", 4, one(0057372), one(0177777), "#w", m68020up|cpu32 },
+{"traphiw", 4, one(0051372), one(0177777), "#w", m68020up|cpu32 },
+{"traplew", 4, one(0057772), one(0177777), "#w", m68020up|cpu32 },
+{"traplsw", 4, one(0051772), one(0177777), "#w", m68020up|cpu32 },
+{"trapltw", 4, one(0056772), one(0177777), "#w", m68020up|cpu32 },
+{"trapmiw", 4, one(0055772), one(0177777), "#w", m68020up|cpu32 },
+{"trapnew", 4, one(0053372), one(0177777), "#w", m68020up|cpu32 },
+{"trapplw", 4, one(0055372), one(0177777), "#w", m68020up|cpu32 },
+{"traptw", 4, one(0050372), one(0177777), "#w", m68020up|cpu32 },
+{"trapvcw", 4, one(0054372), one(0177777), "#w", m68020up|cpu32 },
+{"trapvsw", 4, one(0054772), one(0177777), "#w", m68020up|cpu32 },
+
+{"trapccl", 6, one(0052373), one(0177777), "#l", m68020up|cpu32 },
+{"trapcsl", 6, one(0052773), one(0177777), "#l", m68020up|cpu32 },
+{"trapeql", 6, one(0053773), one(0177777), "#l", m68020up|cpu32 },
+{"tpfl", 6, one(0050773), one(0177777), "#l", mcfisa_a},
+{"trapfl", 6, one(0050773), one(0177777), "#l", m68020up|cpu32|mcfisa_a},
+{"trapgel", 6, one(0056373), one(0177777), "#l", m68020up|cpu32 },
+{"trapgtl", 6, one(0057373), one(0177777), "#l", m68020up|cpu32 },
+{"traphil", 6, one(0051373), one(0177777), "#l", m68020up|cpu32 },
+{"traplel", 6, one(0057773), one(0177777), "#l", m68020up|cpu32 },
+{"traplsl", 6, one(0051773), one(0177777), "#l", m68020up|cpu32 },
+{"trapltl", 6, one(0056773), one(0177777), "#l", m68020up|cpu32 },
+{"trapmil", 6, one(0055773), one(0177777), "#l", m68020up|cpu32 },
+{"trapnel", 6, one(0053373), one(0177777), "#l", m68020up|cpu32 },
+{"trappll", 6, one(0055373), one(0177777), "#l", m68020up|cpu32 },
+{"traptl", 6, one(0050373), one(0177777), "#l", m68020up|cpu32 },
+{"trapvcl", 6, one(0054373), one(0177777), "#l", m68020up|cpu32 },
+{"trapvsl", 6, one(0054773), one(0177777), "#l", m68020up|cpu32 },
+
+{"trapv", 2, one(0047166), one(0177777), "", m68000up },
+
{"scc", 2, one(0052300), one(0177700), "$s", m68000up },
{"scc", 2, one(0052300), one(0177700), "Ds", mcfisa_a },
{"scs", 2, one(0052700), one(0177700), "$s", m68000up },
@@ -2021,15 +2079,15 @@ const struct m68k_opcode m68k_opcodes[] =
{"smi", 2, one(0055700), one(0177700), "$s", m68000up },
{"smi", 2, one(0055700), one(0177700), "Ds", mcfisa_a },
{"sne", 2, one(0053300), one(0177700), "$s", m68000up },
-{"sne", 2, one(0053300), one(0177700), "Ds", mcfisa_a },
+{"sne", 2, one(0053300), one(0177770), "Ds", mcfisa_a },
{"spl", 2, one(0055300), one(0177700), "$s", m68000up },
-{"spl", 2, one(0055300), one(0177700), "Ds", mcfisa_a },
+{"spl", 2, one(0055300), one(0177770), "Ds", mcfisa_a },
{"st", 2, one(0050300), one(0177700), "$s", m68000up },
-{"st", 2, one(0050300), one(0177700), "Ds", mcfisa_a },
+{"st", 2, one(0050300), one(0177770), "Ds", mcfisa_a },
{"svc", 2, one(0054300), one(0177700), "$s", m68000up },
-{"svc", 2, one(0054300), one(0177700), "Ds", mcfisa_a },
+{"svc", 2, one(0054300), one(0177770), "Ds", mcfisa_a },
{"svs", 2, one(0054700), one(0177700), "$s", m68000up },
-{"svs", 2, one(0054700), one(0177700), "Ds", mcfisa_a },
+{"svs", 2, one(0054700), one(0177770), "Ds", mcfisa_a },
{"stop", 4, one(0047162), one(0177777), "#w", m68000up | mcfisa_a },
@@ -2098,59 +2156,6 @@ TBL("tblunb", "tblunw", "tblunl", 0, 0),
{"trap", 2, one(0047100), one(0177760), "Ts", m68000up | mcfisa_a },
-{"trapcc", 2, one(0052374), one(0177777), "", m68020up | cpu32 },
-{"trapcs", 2, one(0052774), one(0177777), "", m68020up | cpu32 },
-{"trapeq", 2, one(0053774), one(0177777), "", m68020up | cpu32 },
-{"trapf", 2, one(0050774), one(0177777), "", m68020up | cpu32 | mcfisa_a },
-{"trapge", 2, one(0056374), one(0177777), "", m68020up | cpu32 },
-{"trapgt", 2, one(0057374), one(0177777), "", m68020up | cpu32 },
-{"traphi", 2, one(0051374), one(0177777), "", m68020up | cpu32 },
-{"traple", 2, one(0057774), one(0177777), "", m68020up | cpu32 },
-{"trapls", 2, one(0051774), one(0177777), "", m68020up | cpu32 },
-{"traplt", 2, one(0056774), one(0177777), "", m68020up | cpu32 },
-{"trapmi", 2, one(0055774), one(0177777), "", m68020up | cpu32 },
-{"trapne", 2, one(0053374), one(0177777), "", m68020up | cpu32 },
-{"trappl", 2, one(0055374), one(0177777), "", m68020up | cpu32 },
-{"trapt", 2, one(0050374), one(0177777), "", m68020up | cpu32 },
-{"trapvc", 2, one(0054374), one(0177777), "", m68020up | cpu32 },
-{"trapvs", 2, one(0054774), one(0177777), "", m68020up | cpu32 },
-
-{"trapccw", 4, one(0052372), one(0177777), "#w", m68020up|cpu32 },
-{"trapcsw", 4, one(0052772), one(0177777), "#w", m68020up|cpu32 },
-{"trapeqw", 4, one(0053772), one(0177777), "#w", m68020up|cpu32 },
-{"trapfw", 4, one(0050772), one(0177777), "#w", m68020up|cpu32|mcfisa_a},
-{"trapgew", 4, one(0056372), one(0177777), "#w", m68020up|cpu32 },
-{"trapgtw", 4, one(0057372), one(0177777), "#w", m68020up|cpu32 },
-{"traphiw", 4, one(0051372), one(0177777), "#w", m68020up|cpu32 },
-{"traplew", 4, one(0057772), one(0177777), "#w", m68020up|cpu32 },
-{"traplsw", 4, one(0051772), one(0177777), "#w", m68020up|cpu32 },
-{"trapltw", 4, one(0056772), one(0177777), "#w", m68020up|cpu32 },
-{"trapmiw", 4, one(0055772), one(0177777), "#w", m68020up|cpu32 },
-{"trapnew", 4, one(0053372), one(0177777), "#w", m68020up|cpu32 },
-{"trapplw", 4, one(0055372), one(0177777), "#w", m68020up|cpu32 },
-{"traptw", 4, one(0050372), one(0177777), "#w", m68020up|cpu32 },
-{"trapvcw", 4, one(0054372), one(0177777), "#w", m68020up|cpu32 },
-{"trapvsw", 4, one(0054772), one(0177777), "#w", m68020up|cpu32 },
-
-{"trapccl", 6, one(0052373), one(0177777), "#l", m68020up|cpu32 },
-{"trapcsl", 6, one(0052773), one(0177777), "#l", m68020up|cpu32 },
-{"trapeql", 6, one(0053773), one(0177777), "#l", m68020up|cpu32 },
-{"trapfl", 6, one(0050773), one(0177777), "#l", m68020up|cpu32|mcfisa_a},
-{"trapgel", 6, one(0056373), one(0177777), "#l", m68020up|cpu32 },
-{"trapgtl", 6, one(0057373), one(0177777), "#l", m68020up|cpu32 },
-{"traphil", 6, one(0051373), one(0177777), "#l", m68020up|cpu32 },
-{"traplel", 6, one(0057773), one(0177777), "#l", m68020up|cpu32 },
-{"traplsl", 6, one(0051773), one(0177777), "#l", m68020up|cpu32 },
-{"trapltl", 6, one(0056773), one(0177777), "#l", m68020up|cpu32 },
-{"trapmil", 6, one(0055773), one(0177777), "#l", m68020up|cpu32 },
-{"trapnel", 6, one(0053373), one(0177777), "#l", m68020up|cpu32 },
-{"trappll", 6, one(0055373), one(0177777), "#l", m68020up|cpu32 },
-{"traptl", 6, one(0050373), one(0177777), "#l", m68020up|cpu32 },
-{"trapvcl", 6, one(0054373), one(0177777), "#l", m68020up|cpu32 },
-{"trapvsl", 6, one(0054773), one(0177777), "#l", m68020up|cpu32 },
-
-{"trapv", 2, one(0047166), one(0177777), "", m68000up },
-
{"tstb", 2, one(0045000), one(0177700), ";b", m68020up|cpu32|mcfisa_a },
{"tstb", 2, one(0045000), one(0177700), "$b", m68000up },
{"tstw", 2, one(0045100), one(0177700), "*w", m68020up|cpu32|mcfisa_a },