diff options
author | Richard Sandiford <rdsandiford@googlemail.com> | 2013-08-03 10:41:13 +0000 |
---|---|---|
committer | Richard Sandiford <rdsandiford@googlemail.com> | 2013-08-03 10:41:13 +0000 |
commit | 0acfaea6cd192fce727369cdcede034410a5a1da (patch) | |
tree | bbf62ba2dea5f7cfd3e577c0fba24f0761d0a6ae | |
parent | 18342312e13a1a0b9fb54dc344abad6a4f08ef69 (diff) | |
download | fsf-binutils-gdb-0acfaea6cd192fce727369cdcede034410a5a1da.zip fsf-binutils-gdb-0acfaea6cd192fce727369cdcede034410a5a1da.tar.gz fsf-binutils-gdb-0acfaea6cd192fce727369cdcede034410a5a1da.tar.bz2 |
gas/
* config/tc-mips.c (mips16_macro): Don't use move_register.
(mips16_ip): Allow macros to use 'p'.
gas/testsuite/
* gas/mips/mips16-macro.s, gas/mips/mips16-macro.d: New test.
* gas/mips/mips.exp: Run it.
-rw-r--r-- | gas/ChangeLog | 5 | ||||
-rw-r--r-- | gas/config/tc-mips.c | 5 | ||||
-rw-r--r-- | gas/testsuite/ChangeLog | 5 | ||||
-rw-r--r-- | gas/testsuite/gas/mips/mips.exp | 1 | ||||
-rw-r--r-- | gas/testsuite/gas/mips/mips16-macro.d | 129 | ||||
-rw-r--r-- | gas/testsuite/gas/mips/mips16-macro.s | 59 |
6 files changed, 202 insertions, 2 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index d98d36c..868fb87 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,8 @@ +2013-08-03 Richard Sandiford <rdsandiford@googlemail.com> + + * config/tc-mips.c (mips16_macro): Don't use move_register. + (mips16_ip): Allow macros to use 'p'. + 2013-08-01 Richard Sandiford <rdsandiford@googlemail.com> * config/tc-mips.c (MAX_OPERANDS): New macro. diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c index 79c99ab..bdfcc3a 100644 --- a/gas/config/tc-mips.c +++ b/gas/config/tc-mips.c @@ -12060,10 +12060,11 @@ mips16_macro (struct mips_cl_insn *ip) expr1.X_add_number = 0; macro_build (&expr1, "slti", "x,8", yreg); if (xreg != yreg) - move_register (xreg, yreg); + macro_build (NULL, "move", "y,X", xreg, mips16_to_32_reg_map[yreg]); expr1.X_add_number = 2; macro_build (&expr1, "bteqz", "p"); macro_build (NULL, "neg", "x,w", xreg, xreg); + break; } } @@ -12680,7 +12681,7 @@ mips16_ip (char *str, struct mips_cl_insn *ip) we can. */ if (insn->pinfo == INSN_MACRO) { - gas_assert (relax_char == 0); + gas_assert (relax_char == 0 || relax_char == 'p'); gas_assert (*offset_reloc == BFD_RELOC_UNUSED); } else if (relax_char diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index c1ae5d4..deaba91 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2013-08-03 Richard Sandiford <rdsandiford@googlemail.com> + + * gas/mips/mips16-macro.s, gas/mips/mips16-macro.d: New test. + * gas/mips/mips.exp: Run it. + 2013-07-26 Sergey Guriev <sergey.s.guriev@intel.com> Alexander Ivchenko <alexander.ivchenko@intel.com> Maxim Kuznetsov <maxim.kuznetsov@intel.com> diff --git a/gas/testsuite/gas/mips/mips.exp b/gas/testsuite/gas/mips/mips.exp index cc69467..37e005b 100644 --- a/gas/testsuite/gas/mips/mips.exp +++ b/gas/testsuite/gas/mips/mips.exp @@ -685,6 +685,7 @@ if { [istarget mips*-*-vxworks*] } { run_dump_test "mips16" run_dump_test "mips16-64" + run_dump_test "mips16-macro" # Check MIPS16e extensions run_dump_test_arches "mips16e" [mips_arch_list_matching mips32 !micromips] # Check jalx handling diff --git a/gas/testsuite/gas/mips/mips16-macro.d b/gas/testsuite/gas/mips/mips16-macro.d new file mode 100644 index 0000000..34dfb8e --- /dev/null +++ b/gas/testsuite/gas/mips/mips16-macro.d @@ -0,0 +1,129 @@ +#objdump: -dr -Mgpr-names=numeric +#as: -mabi=o64 -mips64 +#name: MIPS16 macros + +.*: +file format .*mips.* + + +Disassembly of section \.text: + +[ 0-9a-f]+ <foo>: +[ 0-9a-f]+: eb9a div \$0,\$3,\$4 +[ 0-9a-f]+: 2c01 bnez \$4,[0-9a-f]+ <[^>]*> +[ 0-9a-f]+: e8e5 break 7 +[ 0-9a-f]+: ea12 mflo \$2 +[ 0-9a-f]+: ecbb divu \$0,\$4,\$5 +[ 0-9a-f]+: 2d01 bnez \$5,[0-9a-f]+ <[^>]*> +[ 0-9a-f]+: e8e5 break 7 +[ 0-9a-f]+: eb12 mflo \$3 +[ 0-9a-f]+: edde ddiv \$0,\$5,\$6 +[ 0-9a-f]+: 2e01 bnez \$6,[0-9a-f]+ <[^>]*> +[ 0-9a-f]+: e8e5 break 7 +[ 0-9a-f]+: ec12 mflo \$4 +[ 0-9a-f]+: eeff ddivu \$0,\$6,\$7 +[ 0-9a-f]+: 2f01 bnez \$7,[0-9a-f]+ <[^>]*> +[ 0-9a-f]+: e8e5 break 7 +[ 0-9a-f]+: ed12 mflo \$5 +[ 0-9a-f]+: ef1a div \$0,\$7,\$16 +[ 0-9a-f]+: 2801 bnez \$16,[0-9a-f]+ <[^>]*> +[ 0-9a-f]+: e8e5 break 7 +[ 0-9a-f]+: ee10 mfhi \$6 +[ 0-9a-f]+: ef3b divu \$0,\$7,\$17 +[ 0-9a-f]+: 2901 bnez \$17,[0-9a-f]+ <[^>]*> +[ 0-9a-f]+: e8e5 break 7 +[ 0-9a-f]+: ee10 mfhi \$6 +[ 0-9a-f]+: eb9e ddiv \$0,\$3,\$4 +[ 0-9a-f]+: 2c01 bnez \$4,[0-9a-f]+ <[^>]*> +[ 0-9a-f]+: e8e5 break 7 +[ 0-9a-f]+: ea10 mfhi \$2 +[ 0-9a-f]+: ecbf ddivu \$0,\$4,\$5 +[ 0-9a-f]+: 2d01 bnez \$5,[0-9a-f]+ <[^>]*> +[ 0-9a-f]+: e8e5 break 7 +[ 0-9a-f]+: eb10 mfhi \$3 +[ 0-9a-f]+: edd9 multu \$5,\$6 +[ 0-9a-f]+: ec12 mflo \$4 +[ 0-9a-f]+: eefd dmultu \$6,\$7 +[ 0-9a-f]+: ed12 mflo \$5 +[ 0-9a-f]+: f7ef 4a1f addiu \$2,32767 +[ 0-9a-f]+: 4bf0 addiu \$3,-16 +[ 0-9a-f]+: f010 4c00 addiu \$4,-32768 +[ 0-9a-f]+: f7f7 476f addiu \$3,\$7,16383 +[ 0-9a-f]+: 408c addiu \$4,\$16,-4 +[ 0-9a-f]+: f008 41a0 addiu \$5,\$17,-16384 +[ 0-9a-f]+: f7ef fd9f daddiu \$4,32767 +[ 0-9a-f]+: fdda daddiu \$6,-6 +[ 0-9a-f]+: f010 fde0 daddiu \$7,-32768 +[ 0-9a-f]+: f7f7 445f daddiu \$2,\$4,16383 +[ 0-9a-f]+: 4778 daddiu \$3,\$7,-8 +[ 0-9a-f]+: f008 4590 daddiu \$4,\$5,-16384 +[ 0-9a-f]+: ea6a cmp \$2,\$3 +[ 0-9a-f]+: 60fe bteqz [0-9a-f]+ <[^>]*> +[ 0-9a-f]+: ecaa cmp \$4,\$5 +[ 0-9a-f]+: 61fe btnez [0-9a-f]+ <[^>]*> +[ 0-9a-f]+: eee2 slt \$6,\$7 +[ 0-9a-f]+: 61fe btnez [0-9a-f]+ <[^>]*> +[ 0-9a-f]+: e823 sltu \$16,\$17 +[ 0-9a-f]+: 61fe btnez [0-9a-f]+ <[^>]*> +[ 0-9a-f]+: ef82 slt \$7,\$4 +[ 0-9a-f]+: 60fe bteqz [0-9a-f]+ <[^>]*> +[ 0-9a-f]+: eea3 sltu \$6,\$5 +[ 0-9a-f]+: 60fe bteqz [0-9a-f]+ <[^>]*> +[ 0-9a-f]+: ec02 slt \$4,\$16 +[ 0-9a-f]+: 60fe bteqz [0-9a-f]+ <[^>]*> +[ 0-9a-f]+: ed23 sltu \$5,\$17 +[ 0-9a-f]+: 60fe bteqz [0-9a-f]+ <[^>]*> +[ 0-9a-f]+: ee82 slt \$6,\$4 +[ 0-9a-f]+: 61fe btnez [0-9a-f]+ <[^>]*> +[ 0-9a-f]+: efa3 sltu \$7,\$5 +[ 0-9a-f]+: 61fe btnez [0-9a-f]+ <[^>]*> +[ 0-9a-f]+: 7201 cmpi \$2,1 +[ 0-9a-f]+: 60fe bteqz [0-9a-f]+ <[^>]*> +[ 0-9a-f]+: f7ff 731f cmpi \$3,65535 +[ 0-9a-f]+: 60fd bteqz [0-9a-f]+ <[^>]*> +[ 0-9a-f]+: 7401 cmpi \$4,1 +[ 0-9a-f]+: 61fe btnez [0-9a-f]+ <[^>]*> +[ 0-9a-f]+: f7ff 751f cmpi \$5,65535 +[ 0-9a-f]+: 61fd btnez [0-9a-f]+ <[^>]*> +[ 0-9a-f]+: f010 5600 slti \$6,-32768 +[ 0-9a-f]+: 61fd btnez [0-9a-f]+ <[^>]*> +[ 0-9a-f]+: f7ef 571f slti \$7,32767 +[ 0-9a-f]+: 61fd btnez [0-9a-f]+ <[^>]*> +[ 0-9a-f]+: f010 5800 sltiu \$16,-32768 +[ 0-9a-f]+: 61fd btnez [0-9a-f]+ <[^>]*> +[ 0-9a-f]+: f7ef 591f sltiu \$17,32767 +[ 0-9a-f]+: 61fd btnez [0-9a-f]+ <[^>]*> +[ 0-9a-f]+: f010 5200 slti \$2,-32768 +[ 0-9a-f]+: 61fd btnez [0-9a-f]+ <[^>]*> +[ 0-9a-f]+: f7ef 531f slti \$3,32767 +[ 0-9a-f]+: 61fd btnez [0-9a-f]+ <[^>]*> +[ 0-9a-f]+: f010 5c00 sltiu \$4,-32768 +[ 0-9a-f]+: 61fd btnez [0-9a-f]+ <[^>]*> +[ 0-9a-f]+: f7ef 5d1f sltiu \$5,32767 +[ 0-9a-f]+: 61fd btnez [0-9a-f]+ <[^>]*> +[ 0-9a-f]+: f010 5600 slti \$6,-32768 +[ 0-9a-f]+: 60fd bteqz [0-9a-f]+ <[^>]*> +[ 0-9a-f]+: f7ef 571e slti \$7,32766 +[ 0-9a-f]+: 60fd bteqz [0-9a-f]+ <[^>]*> +[ 0-9a-f]+: f010 5800 sltiu \$16,-32768 +[ 0-9a-f]+: 60fd bteqz [0-9a-f]+ <[^>]*> +[ 0-9a-f]+: f7ef 591f sltiu \$17,32767 +[ 0-9a-f]+: 60fd bteqz [0-9a-f]+ <[^>]*> +[ 0-9a-f]+: f010 5200 slti \$2,-32768 +[ 0-9a-f]+: 60fd bteqz [0-9a-f]+ <[^>]*> +[ 0-9a-f]+: f7ef 531f slti \$3,32767 +[ 0-9a-f]+: 60fd bteqz [0-9a-f]+ <[^>]*> +[ 0-9a-f]+: f010 5c00 sltiu \$4,-32768 +[ 0-9a-f]+: 60fd bteqz [0-9a-f]+ <[^>]*> +[ 0-9a-f]+: f7ef 5d1f sltiu \$5,32767 +[ 0-9a-f]+: 60fd bteqz [0-9a-f]+ <[^>]*> +[ 0-9a-f]+: 5200 slti \$2,0 +[ 0-9a-f]+: 6001 bteqz [0-9a-f]+ <[^>]*> +[ 0-9a-f]+: ea4b neg \$2 +[ 0-9a-f]+: 5300 slti \$3,0 +[ 0-9a-f]+: 6001 bteqz [0-9a-f]+ <[^>]*> +[ 0-9a-f]+: eb6b neg \$3 +[ 0-9a-f]+: 5500 slti \$5,0 +[ 0-9a-f]+: 6785 move \$4,\$5 +[ 0-9a-f]+: 6001 bteqz [0-9a-f]+ <[^>]*> +[ 0-9a-f]+: ec8b neg \$4 +#pass diff --git a/gas/testsuite/gas/mips/mips16-macro.s b/gas/testsuite/gas/mips/mips16-macro.s new file mode 100644 index 0000000..970b9a5 --- /dev/null +++ b/gas/testsuite/gas/mips/mips16-macro.s @@ -0,0 +1,59 @@ + .set mips16 + .ent foo +foo: + div $2,$3,$4 + divu $3,$4,$5 + ddiv $4,$5,$6 + ddivu $5,$6,$7 + rem $6,$7,$16 + remu $6,$7,$17 + drem $2,$3,$4 + dremu $3,$4,$5 + mul $4,$5,$6 + dmul $5,$6,$7 + subu $2,-32767 + subu $3,16 + subu $4,32768 + subu $3,$7,-16383 + subu $4,$16,4 + subu $5,$17,16384 + dsubu $4,-32767 + dsubu $6,6 + dsubu $7,32768 + dsubu $2,$4,-16383 + dsubu $3,$7,8 + dsubu $4,$5,16384 +1: beq $2,$3,1b +1: bne $4,$5,1b +1: blt $6,$7,1b +1: bltu $16,$17,1b +1: ble $4,$7,1b +1: bleu $5,$6,1b +1: bge $4,$16,1b +1: bgeu $5,$17,1b +1: bgt $4,$6,1b +1: bgtu $5,$7,1b +1: beq $2,1,1b +1: beq $3,65535,1b +1: bne $4,1,1b +1: bne $5,65535,1b +1: blt $6,-32768,1b +1: blt $7,32767,1b +1: bltu $16,-32768,1b +1: bltu $17,32767,1b +1: ble $2,-32769,1b +1: ble $3,32766,1b +1: bleu $4,-32769,1b +1: bleu $5,32766,1b +1: bge $6,-32768,1b +1: bge $7,32766,1b +1: bgeu $16,-32768,1b +1: bgeu $17,32767,1b +1: bgt $2,-32769,1b +1: bgt $3,32766,1b +1: bgtu $4,-32769,1b +1: bgtu $5,32766,1b + abs $2 + abs $3,$3 + abs $4,$5 + .end foo |