Update .MIPS.abiflags to support MIPS R6

bfd/

	* elfxx-mips.c (update_mips_abiflags_isa): Add E_MIPS_ARCH_32R6
	and E_MIPS_ARCH_64R6 support.

ld/testsuite/

	* ld-mips-elf/abiflags-strip10-ph.d: New file.
	* ld-mips-elf/mips-eld.exp: Run the new test.

gas/

	* config/tc-mips.c (mips_elf_final_processing): Add INSN_ISA32R6
	and INSN_ISA64R6 support.

gas/testsuite/

	* gas/mips/elf_arch_mips32r6.d: New file.
	* gas/mips/elf_arch_mips64r6.d: New file.
	* gas/mips/mips.exp: Run the new tests.

11 files changed, 109 insertions, 0 deletions

diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index 4b40860..8df2fd7 100644
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,3 +1,8 @@
+2014-11-05  Matthew Fortune  <matthew.fortune@imgtec.com>
+
+	* elfxx-mips.c (update_mips_abiflags_isa): Add E_MIPS_ARCH_32R6
+	and E_MIPS_ARCH_64R6 support.
+
 2014-11-05  Nick Clifton  <nickc@redhat.com>
 
 	PR binutils/17512
diff --git a/bfd/elfxx-mips.c b/bfd/elfxx-mips.c
index f82102a..c599366 100644
--- a/bfd/elfxx-mips.c
+++ b/bfd/elfxx-mips.c
@@ -13959,6 +13959,10 @@ update_mips_abiflags_isa (bfd *abfd, Elf_Internal_ABIFlags_v0 *abiflags)
       if (abiflags->isa_rev < 2)
 	abiflags->isa_rev = 2;
       break;
+    case E_MIPS_ARCH_32R6:
+      abiflags->isa_level = 32;
+      abiflags->isa_rev = 6;
+      break;
     case E_MIPS_ARCH_64:
       abiflags->isa_level = 64;
       abiflags->isa_rev = 1;
@@ -13969,6 +13973,10 @@ update_mips_abiflags_isa (bfd *abfd, Elf_Internal_ABIFlags_v0 *abiflags)
       if (abiflags->isa_rev < 2)
 	abiflags->isa_rev = 2;
       break;
+    case E_MIPS_ARCH_64R6:
+      abiflags->isa_level = 64;
+      abiflags->isa_rev = 6;
+      break;
     default:
       (*_bfd_error_handler)
 	(_("%B: Unknown architecture %s"),
diff --git a/gas/ChangeLog b/gas/ChangeLog
index 0bbdc63..0d6ef3b 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,8 @@
+2014-11-05  Matthew Fortune  <matthew.fortune@imgtec.com>
+
+	* config/tc-mips.c (mips_elf_final_processing): Add INSN_ISA32R6
+	and INSN_ISA64R6 support.
+
 2014-11-04  Alan Modra  <amodra@gmail.com>
 
 	* expr.c (expr_symbol_where): Don't use register keyword.
diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c
index 607689b..c9266db 100644
--- a/gas/config/tc-mips.c
+++ b/gas/config/tc-mips.c
@@ -17971,6 +17971,10 @@ mips_elf_final_processing (void)
       flags.isa_level = 32;
       flags.isa_rev = 5;
       break;
+    case INSN_ISA32R6:
+      flags.isa_level = 32;
+      flags.isa_rev = 6;
+      break;
     case INSN_ISA64:
       flags.isa_level = 64;
       flags.isa_rev = 1;
@@ -17987,6 +17991,10 @@ mips_elf_final_processing (void)
       flags.isa_level = 64;
       flags.isa_rev = 5;
       break;
+    case INSN_ISA64R6:
+      flags.isa_level = 64;
+      flags.isa_rev = 6;
+      break;
     }
 
   flags.gpr_size = file_mips_opts.gp == 32 ? AFL_REG_32 : AFL_REG_64;
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 1b41cc4..4c69862 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,9 @@
+2014-05-11  Matthew Fortune  <matthew.fortune@imgtec.com>
+
+	* gas/mips/elf_arch_mips32r6.d: New file.
+	* gas/mips/elf_arch_mips64r6.d: New file.
+	* gas/mips/mips.exp: Run the new tests.
+
 2014-10-31  Andrew Pinski  <apinski@cavium.com>
             Naveen H.S  <Naveen.Hurugalawadi@caviumnetworks.com>
 
diff --git a/gas/testsuite/gas/mips/elf_arch_mips32r6.d b/gas/testsuite/gas/mips/elf_arch_mips32r6.d
new file mode 100644
index 0000000..eefba45
--- /dev/null
+++ b/gas/testsuite/gas/mips/elf_arch_mips32r6.d
@@ -0,0 +1,21 @@
+# name: ELF MIPS32r5 markings
+# source: empty.s
+# objdump: -p
+# as: -32 -march=mips32r6
+
+.*:.*file format.*elf.*mips.*
+private flags = 9.......: .*\[mips32r6\].*
+
+MIPS ABI Flags Version: 0
+
+ISA: MIPS32r6
+GPR size: 32
+CPR1 size: 64
+CPR2 size: 0
+FP ABI: Hard float \(32-bit CPU, 64-bit FPU\)
+ISA Extension: None
+ASEs:
+	None
+FLAGS 1: 0000000.
+FLAGS 2: 00000000
+
diff --git a/gas/testsuite/gas/mips/elf_arch_mips64r6.d b/gas/testsuite/gas/mips/elf_arch_mips64r6.d
new file mode 100644
index 0000000..7cdea4d
--- /dev/null
+++ b/gas/testsuite/gas/mips/elf_arch_mips64r6.d
@@ -0,0 +1,21 @@
+# name: ELF MIPS64r6 markings
+# source: empty.s
+# objdump: -p
+# as: -32 -march=mips64r6
+
+.*:.*file format.*elf.*mips.*
+private flags = a.......: .*\[mips64r6\].*
+
+MIPS ABI Flags Version: 0
+
+ISA: MIPS64r6
+GPR size: 32
+CPR1 size: 64
+CPR2 size: 0
+FP ABI: Hard float \(32-bit CPU, 64-bit FPU\)
+ISA Extension: None
+ASEs:
+	None
+FLAGS 1: 0000000.
+FLAGS 2: 00000000
+
diff --git a/gas/testsuite/gas/mips/mips.exp b/gas/testsuite/gas/mips/mips.exp
index 855e2cd..b0de13a 100644
--- a/gas/testsuite/gas/mips/mips.exp
+++ b/gas/testsuite/gas/mips/mips.exp
@@ -870,10 +870,12 @@ if { [istarget mips*-*-vxworks*] } {
     run_dump_test "elf_arch_mips32r2"
     run_dump_test "elf_arch_mips32r3"
     run_dump_test "elf_arch_mips32r5"
+    run_dump_test "elf_arch_mips32r6"
     run_dump_test "elf_arch_mips64"
     run_dump_test "elf_arch_mips64r2"
     run_dump_test "elf_arch_mips64r3"
     run_dump_test "elf_arch_mips64r5"
+    run_dump_test "elf_arch_mips64r6"
 
     # Verify that ASE markings are handled properly.
     run_dump_test "elf_ase_mips16"
diff --git a/ld/testsuite/ChangeLog b/ld/testsuite/ChangeLog
index 54afd1c..ce0bc74 100644
--- a/ld/testsuite/ChangeLog
+++ b/ld/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2014-11-05  Matthew Fortune  <matthew.fortune@imgtec.com>
+
+	* ld-mips-elf/abiflags-strip10-ph.d: New file.
+	* ld-mips-elf/mips-eld.exp: Run the new test.
+
 2014-10-30  Will Newton  <will.newton@linaro.org>
 
 	* ld-unique/unique.exp: Use a wider glob for matching ARM
diff --git a/ld/testsuite/ld-mips-elf/abiflags-strip10-ph.d b/ld/testsuite/ld-mips-elf/abiflags-strip10-ph.d
new file mode 100644
index 0000000..ea403af
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/abiflags-strip10-ph.d
@@ -0,0 +1,27 @@
+#source: jr.s -mips32r6
+#source: jr.s -mips32r6 RUN_OBJCOPY
+#ld: -e 0
+#objcopy_objects: -R .MIPS.abiflags
+#objdump: -p
+
+[^:]*:     file format elf32-.*
+
+Program Header:
+0x70000003 off    0x0000.... vaddr 0x004000.. paddr 0x004000.. align 2\*\*3
+         filesz 0x00000018 memsz 0x00000018 flags r--
+#...
+private flags = 90001400: \[abi=O32\] \[mips32r6\] \[nan2008\] \[not 32bitmode\]
+
+MIPS ABI Flags Version: 0
+
+ISA: MIPS32r6
+GPR size: 32
+CPR1 size: 64
+CPR2 size: 0
+FP ABI: Hard float \(32-bit CPU, 64-bit FPU\)
+ISA Extension: None
+ASEs:
+	None
+FLAGS 1: 0000000.
+FLAGS 2: 00000000
+
diff --git a/ld/testsuite/ld-mips-elf/mips-elf.exp b/ld/testsuite/ld-mips-elf/mips-elf.exp
index 92ab4b3..91036de 100644
--- a/ld/testsuite/ld-mips-elf/mips-elf.exp
+++ b/ld/testsuite/ld-mips-elf/mips-elf.exp
@@ -694,6 +694,7 @@ run_dump_test "abiflags-strip6-ph" $o32flagslist
 run_dump_test "abiflags-strip7-ph" $o32flagslist
 run_dump_test "abiflags-strip8-ph" $o32flagslist
 run_dump_test "abiflags-strip9-ph" $o32flagslist
+run_dump_test "abiflags-strip10-ph" $o32flagslist
 
 run_dump_test "nan-legacy"
 run_dump_test "nan-2008"