<registers name="Abstract Commands" skip_index="1" skip_access="1"
        skip_reset="1" prefix="AC_" depth="2">
    <register name="Access Register">
        \begin{steps}{This command gives the debugger access to CPU registers and program buffer. 
        It performs the following sequence of operations:}
        \item Copy data from the register specified by \Fregno into the
            {\tt arg0} region of {\tt data}, if \Fwrite is clear and \Ftransfer is set.
        \item Copy data from the {\tt arg0} region of {\tt data} into the
            register specified by \Fregno, if \Fwrite is set and \Ftransfer is set.
        \item Execute the Program Buffer, if \Fpostexec is set.
        \end{steps}

        If any of these operations fail, \Fcmderr is set and none of the
        remaining steps are executed. An implementation may detect an upcoming
        failure early, and fail the overall command before it reaches the step
        that would cause failure.

        Debug Modules must implement this command
        and must support read and write access to all GPRs when the selected hart is halted.
        Debug Modules may optionally support accessing other registers,
        or accessing registers when the hart is running.
        If this command is 
        supported for a register while the hart is running, it must also
        be supported for a register while the hart is halted.
        Each individual register (aside from GPRs) may be supported differently
        across read, write, and halt status.

        \begin{commentary}
            The encoding of \Fsize was chosen to match \Fsbaccess in \Rsbcs.
        \end{commentary}

        <field name="cmdtype" bits="31:24">
            This is 0 to indicate Access Register Command.
        </field>
        <field name="0" bits="23" />
        <field name="size" bits="22:20">
            2: Access the lowest 32 bits of the register.

            3: Access the lowest 64 bits of the register.

            4: Access the lowest 128 bits of the register.

            If \Fsize specifies a size larger than the register's actual size,
            then the access must fail. If a register is accessible, then reads of \Fsize
            less than or equal to the register's actual size must be supported.

            This field controls the Argument Width as referenced in
            Table~\ref{tab:datareg}.
        </field>
        <field name="0" bits = "19" />
        <field name="postexec" bits="18">
            When 1, execute the program in the Program Buffer exactly once
            after performing the transfer, if any.
        </field>
        <field name="transfer" bits = "17">
            0: Don't do the operation specified by \Fwrite.

            1: Do the operation specified by \Fwrite.

            This bit can be used to just execute the Program Buffer without
            having to worry about placing valid values into \Fsize or \Fregno.
        </field>
        <field name="write" bits="16">
            When \Ftransfer is set:
            0: Copy data from the specified register into {\tt arg0} portion
               of {\tt data}.

            1: Copy data from {\tt arg0} portion of {\tt data} into the
               specified register.
        </field>
        <field name="regno" bits="15:0">
          Number of the register to access, as described in
          Table~\ref{tab:regno}.
          \Rdpc may be used as an alias for PC if this command is
          supported on a non-halted hart.
        </field>
    </register>

    <register name="Quick Access">
        \begin{steps}{Perform the following sequence of operations:}
        \item If the hart is halted, the command  sets \Fcmderr to \texttt{halt/resume} and does not continue.
        \item Halt the hart. If the hart halts for some other reason (e.g. breakpoint), the command
            sets \Fcmderr to \texttt{halt/resume} and does not continue.
        \item Execute the Program Buffer. If an exception occurs, \Fcmderr is set to \texttt{exception} 
            and the program buffer execution ends, but the quick access command continues.
        \item Resume the hart.
        \end{steps}

        Implementing this command is optional.

        <field name="cmdtype" bits="31:24">
            This is 1 to indicate Quick Access command.
        </field>
        <field name="0" bits="23:0" />
    </register>

</registers>
