\chapter{Trigger Module}
\label{sec:trigger}

Triggers can cause a breakpoint exception, entry into Debug Mode, or a trace action
without having to execute a special instruction. This makes them invaluable
when debugging code from ROM. They can trigger on execution of instructions at
a given memory address, or on the address/data in loads/stores.  These are all
features that can be useful without having the Debug Module present, so the
Trigger Module is broken out as a separate piece that can be implemented
separately.

\begin{steps}{Each trigger may support a variety of features. A debugger can
    build a list of all triggers and their features as follows:}
\item Write 0 to \Rtselect.
\item Read back \Rtselect and check that it contains the written value. If not,
    exit the loop.
\item Read \Rtinfo.
\item If that caused an exception, the debugger must read \Rtdataone to
    discover the type. (If \Ftype is 0, this trigger doesn't exist. Exit the
    loop.)
\item If \Finfo is 1, this trigger doesn't exist. Exit the loop.
\item Otherwise, the selected trigger supports the types discovered in \Finfo.
\item Repeat, incrementing the value in \Rtselect.
\end{steps}

\begin{commentary}
    There are two ways to check whether a given trigger is the last one to
    support these implementations:
    \begin{enumerate}
        \item When no hardware triggers are implemented at all, all related
            registers return 0. The algorithm above terminates when checking
            \Ftype.
        \item When 2 triggers are implemented, \Rtselect is just a single bit
            that selects one of the two. When the debugger writes 2, it reads
            back as 0 which terminates the enumeration.
    \end{enumerate}
\end{commentary}

\section{Trigger Registers}

These registers are CSRs, accessible using the RISC-V {\tt csr} opcodes and
optionally also using abstract debug commands.

Most trigger functionality is optional. All {\tt tdata} registers follow
write-any-read-legal semantics. If a debugger writes an unsupported
configuration, the register will read back a value that is supported (which may
simply be a disabled trigger).  This means that a debugger must always read
back values it writes to {\tt tdata} registers, unless it already knows already
what is
supported.  Writes to one {\tt tdata} register may not modify the contents of
other {\tt tdata} registers, nor the configuration of any trigger besides the
one that is currently selected.

\input{hwbp_registers.tex}
