[#insns-sha512sum0, reftext="SHA2-512 Sum0 instruction (RV64)"]
=== sha512sum0

Synopsis::
Implements the Sum0 transformation function as used in
the SHA2-512 hash function cite:[nist:fips:180:4] (Section 4.1.3).

Mnemonic::
sha512sum0 rd, rs1

Encoding::
[wavedrom, , svg]
....
{reg:[
{bits: 7, name: 0x13},
{bits: 5, name: 'rd'},
{bits: 3, name: 0x1},
{bits: 5, name: 'rs1'},
{bits: 5, name: 0x4},
{bits: 5, name: 0x8},
{bits: 2, name: 0x0},
]}
....

Description:: 
This instruction is supported for the RV64 base architecture.
It implements the Sum0 transform of the SHA2-512 hash function.
cite:[nist:fips:180:4].
This instruction must _always_ be implemented such that its execution
latency does not depend on the data being operated on.

Operation::
[source,sail]
--
function clause execute (SHA512SUM0(rs1, rd)) = {
  X(rd) = ror64(X(rs1), 28) ^ ror64(X(rs1), 34) ^ ror64(X(rs1) ,39);
  RETIRE_SUCCESS
}
--

Included in::
[%header,cols="4,2,2"]
|===
|Extension
|Minimum version
|Lifecycle state

| <<zknh>> (RV64)
| v1.0.0
| Frozen
| <<zkn>> (RV64)
| v1.0.0
| Frozen
| <<zk>> (RV64)
| v1.0.0
| Frozen
|===


