<<<
[#insns-cm_jalt,reftext="Jump and link via table"]
=== cm.jalt

Synopsis::
jump via table with optional link

Mnemonic::
cm.jalt _index_

Encoding (RV32, RV64)::
[wavedrom, , svg]
....
{reg:[
    { bits:  2, name: 0x2,      attr: ['C2'] },
    { bits:  8, name: 'index',  attr: [] },
    { bits:  3, name: 0x0,      attr: [] },
    { bits:  3, name: 0x5,      attr: ['FUNCT3'] },
],config:{bits:16}}
....

[NOTE]

  For this encoding to decode as _cm.jalt_, _index>=32_, otherwise it decodes as _cm.jt_, see <<insns-cm_jt>>.

[NOTE]

  If JVT.mode = 0 (Jump Table Mode) then _cm.jalt_ behaves as specified here. If JVT.mode is a reserved value, then _cm.jalt_ is also reserved. In the future other defined values of JVT.mode may change the behaviour of _cm.jalt_.

Assembly Syntax::

[source,sail]
--
cm.jalt index
--

Description::

_cm.jalt_ reads an entry from the jump vector table in memory and jumps to the address that was read, linking to _ra_.

For further information see <<insns-tablejump>>.

Prerequisites::
None

32-bit equivalent::
No direct equivalent encoding exists.

<<<

[#insns-cm_jalt-SAIL,reftext="cm.jalt SAIL code"]
Operation::

[source,sail]
--
//This is not SAIL, it's pseudo-code. The SAIL hasn't been written yet.

# target_address is temporary internal state, it doesn't represent a real register
# InstMemory is byte indexed

switch(XLEN) {
  32:  table_address[XLEN-1:0] = JVT.base + (index<<2);
  64:  table_address[XLEN-1:0] = JVT.base + (index<<3);
}

//fetch from the jump table
target_address[XLEN-1:0] = InstMemory[table_address][XLEN-1:0];

jal ra, target_address[XLEN-1:0]&~0x1;

--

include::Zcmt_footer.adoc[]

