@inproceedings{riscI-isca1981,
  title = {{RISC I}: {A} Reduced Instruction Set {VLSI} Computer},
  author = {David A. Patterson and Carlo H. S\'{e}quin},
  booktitle = {ISCA},
  location = {Minneapolis, Minnesota, USA},
  pages = {443-458},
  year = {1981}
}

@inproceedings{Katevenis:1983,
  author = {Manolis G.H. Katevenis and Robert W. Sherburne Jr. and David A. Patterson and Carlo H. S\'{e}quin},
  title = {The {RISC II} micro-architecture},
  booktitle = {Proceedings VLSI 83 Conference},
  year = {1983},
  month = {August}
}

@inproceedings{Ungar:1984,
  author = {David Ungar and Ricki Blau and Peter Foley and Dain Samples and David Patterson},
  title = {Architecture of {SOAR}: {Smalltalk} on a {RISC}},
  booktitle = {ISCA},
  address = {Ann Arbor, MI},
  year = {1984},
  pages = {188-197}
}

@article{spur-jsscc1989,
  author = {David D. Lee and Shing I. Kong and Mark D. Hill and George S. Taylor and David A. Hodges and Randy H. Katz and David A. Patterson},
  title = {A {VLSI} Chip Set for a Multiprocessor Workstation--{Part I}: An {RISC} Microprocessor with Coprocessor Interface and Support for Symbolic Processing},
  journal = {IEEE JSSC},
  year = {1989},
  volume = {24},
  number = {6},
  pages = {1688-1698},
  month = {December}
}
