
// -----------
// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg)
// version   : 0.11.0
// timestamp : Mon Feb  5 04:35:29 2024 GMT
// usage     : riscv_ctg \
//                  -- cgf //                  --cgf /home/riscv/riscv-ctg/sample_cgfs/dataset.cgf \
//                  --cgf /home/riscv/riscv-ctg/sample_cgfs/sample_cgfs_fext/RV64Zfinx/fmadd.s.cgf \
 \
//                  -- xlen 64  \
// -----------
//
// -----------
// Copyright (c) 2020. RISC-V International. All rights reserved.
// SPDX-License-Identifier: BSD-3-Clause
// -----------
//
// This assembly file tests the fmadd.s instruction of the RISC-V RV64_Zfinx,RV64_Zdinx extension for the fmadd_b5 covergroup.
// 
#include "model_test.h"
#include "arch_test.h"
RVTEST_ISA("RV64I_Zfinx,RV64I_Zdinx")

.section .text.init
.globl rvtest_entry_point
rvtest_entry_point:
RVMODEL_BOOT
RVTEST_CODE_BEGIN

#ifdef TEST_CASE_1

RVTEST_CASE(0,"//check ISA:=regex(.*I.*Zfinx.*);def TEST_CASE_1=True;",fmadd_b5)

RVTEST_FP_ENABLE()
RVTEST_VALBASEUPD(x3,test_dataset_0)
RVTEST_SIGBASE(x1,signature_x1_1)

inst_0:
// rs1 != rs2 and rs1 != rd and rs1 != rs3 and rs2 != rs3 and rs2 != rd and rs3 != rd, rs1==x30, rs2==x29, rs3==x28, rd==x31,fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f31b9 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x186e02 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0e6c50 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eef31b9; op2val:0xbf986e02;
op3val:0x7f0e6c50; valaddr_reg:x3; val_offset:0*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x3, 0*FLEN/8, x4, x1, x2)

inst_1:
// rs1 == rs2 == rs3 != rd, rs1==x31, rs2==x31, rs3==x31, rd==x30,fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f31b9 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x186e02 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0e6c50 and fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x31; op2:x31; op3:x31; dest:x30; op1val:0x7eef31b9; op2val:0x7eef31b9;
op3val:0x7eef31b9; valaddr_reg:x3; val_offset:3*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fmadd.s, x30, x31, x31, x31, dyn, 32, 0, x3, 3*FLEN/8, x4, x1, x2)

inst_2:
// rs3 == rd != rs1 and rs3 == rd != rs2 and rs2 != rs1, rs1==x28, rs2==x30, rs3==x29, rd==x29,fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f31b9 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x186e02 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0e6c50 and fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x28; op2:x30; op3:x29; dest:x29; op1val:0x7eef31b9; op2val:0xbf986e02;
op3val:0x7f0e6c50; valaddr_reg:x3; val_offset:6*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fmadd.s, x29, x28, x30, x29, dyn, 64, 0, x3, 6*FLEN/8, x4, x1, x2)

inst_3:
// rs1 == rd == rs3 != rs2, rs1==x27, rs2==x28, rs3==x27, rd==x27,fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f31b9 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x186e02 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0e6c50 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x27; op2:x28; op3:x27; dest:x27; op1val:0x7eef31b9; op2val:0xbf986e02;
op3val:0x7eef31b9; valaddr_reg:x3; val_offset:9*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x27, x27, x28, x27, dyn, 96, 0, x3, 9*FLEN/8, x4, x1, x2)

inst_4:
// rs1 == rd != rs2 and rs1 == rd != rs3 and rs3 != rs2, rs1==x26, rs2==x27, rs3==x30, rd==x26,fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f31b9 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x186e02 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0e6c50 and fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x26; op2:x27; op3:x30; dest:x26; op1val:0x7eef31b9; op2val:0xbf986e02;
op3val:0x7f0e6c50; valaddr_reg:x3; val_offset:12*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fmadd.s, x26, x26, x27, x30, dyn, 128, 0, x3, 12*FLEN/8, x4, x1, x2)

inst_5:
// rs2 == rs3 != rs1 and rs2 == rs3 != rd and rd != rs1, rs1==x29, rs2==x26, rs3==x26, rd==x28,fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ad5a and fs2 == 1 and fe2 == 0x7f and fm2 == 0x17b417 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x34f350 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x29; op2:x26; op3:x26; dest:x28; op1val:0x7f18ad5a; op2val:0xbf97b417;
op3val:0xbf97b417; valaddr_reg:x3; val_offset:15*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x28, x29, x26, x26, dyn, 0, 0, x3, 15*FLEN/8, x4, x1, x2)

inst_6:
// rd == rs2 == rs3 != rs1, rs1==x24, rs2==x25, rs3==x25, rd==x25,fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ad5a and fs2 == 1 and fe2 == 0x7f and fm2 == 0x17b417 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x34f350 and fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x24; op2:x25; op3:x25; dest:x25; op1val:0x7f18ad5a; op2val:0xbf97b417;
op3val:0xbf97b417; valaddr_reg:x3; val_offset:18*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fmadd.s, x25, x24, x25, x25, dyn, 32, 0, x3, 18*FLEN/8, x4, x1, x2)

inst_7:
// rs2 == rd != rs1 and rs2 == rd != rs3 and rs3 != rs1, rs1==x25, rs2==x24, rs3==x23, rd==x24,fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ad5a and fs2 == 1 and fe2 == 0x7f and fm2 == 0x17b417 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x34f350 and fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x25; op2:x24; op3:x23; dest:x24; op1val:0x7f18ad5a; op2val:0xbf97b417;
op3val:0x7f34f350; valaddr_reg:x3; val_offset:21*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fmadd.s, x24, x25, x24, x23, dyn, 64, 0, x3, 21*FLEN/8, x4, x1, x2)

inst_8:
// rs1 == rs2 == rd != rs3, rs1==x23, rs2==x23, rs3==x24, rd==x23,fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ad5a and fs2 == 1 and fe2 == 0x7f and fm2 == 0x17b417 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x34f350 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x23; op2:x23; op3:x24; dest:x23; op1val:0x7f18ad5a; op2val:0x7f18ad5a;
op3val:0x7f34f350; valaddr_reg:x3; val_offset:24*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x23, x23, x23, x24, dyn, 96, 0, x3, 24*FLEN/8, x4, x1, x2)

inst_9:
// rs1 == rs3 != rs2 and rs1 == rs3 != rd and rd != rs2, rs1==x21, rs2==x20, rs3==x21, rd==x22,fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ad5a and fs2 == 1 and fe2 == 0x7f and fm2 == 0x17b417 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x34f350 and fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x21; op2:x20; op3:x21; dest:x22; op1val:0x7f18ad5a; op2val:0xbf97b417;
op3val:0x7f18ad5a; valaddr_reg:x3; val_offset:27*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fmadd.s, x22, x21, x20, x21, dyn, 128, 0, x3, 27*FLEN/8, x4, x1, x2)

inst_10:
// rs1 == rs2 == rs3 == rd, rs1==x19, rs2==x19, rs3==x19, rd==x19,fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e0f7e and fs2 == 1 and fe2 == 0x7f and fm2 == 0x1f8f25 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x31161d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x19; op2:x19; op3:x19; dest:x19; op1val:0x7f0e0f7e; op2val:0x7f0e0f7e;
op3val:0x7f0e0f7e; valaddr_reg:x3; val_offset:30*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x19, x19, x19, x19, dyn, 0, 0, x3, 30*FLEN/8, x4, x1, x2)

inst_11:
// rs1 == rs2 != rs3 and rs1 == rs2 != rd and rd != rs3, rs1==x22, rs2==x22, rs3==x20, rd==x21,fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e0f7e and fs2 == 1 and fe2 == 0x7f and fm2 == 0x1f8f25 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x31161d and fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x22; op2:x22; op3:x20; dest:x21; op1val:0x7f0e0f7e; op2val:0x7f0e0f7e;
op3val:0x7f31161d; valaddr_reg:x3; val_offset:33*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fmadd.s, x21, x22, x22, x20, dyn, 32, 0, x3, 33*FLEN/8, x4, x1, x2)

inst_12:
// rs1==x18, rs2==x21, rs3==x22, rd==x20,fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e0f7e and fs2 == 1 and fe2 == 0x7f and fm2 == 0x1f8f25 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x31161d and fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x18; op2:x21; op3:x22; dest:x20; op1val:0x7f0e0f7e; op2val:0xbf9f8f25;
op3val:0x7f31161d; valaddr_reg:x3; val_offset:36*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fmadd.s, x20, x18, x21, x22, dyn, 64, 0, x3, 36*FLEN/8, x4, x1, x2)

inst_13:
// rs1==x20, rs2==x17, rs3==x16, rd==x18,fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e0f7e and fs2 == 1 and fe2 == 0x7f and fm2 == 0x1f8f25 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x31161d and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x20; op2:x17; op3:x16; dest:x18; op1val:0x7f0e0f7e; op2val:0xbf9f8f25;
op3val:0x7f31161d; valaddr_reg:x3; val_offset:39*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x18, x20, x17, x16, dyn, 96, 0, x3, 39*FLEN/8, x4, x1, x2)

inst_14:
// rs1==x16, rs2==x18, rs3==x15, rd==x17,fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e0f7e and fs2 == 1 and fe2 == 0x7f and fm2 == 0x1f8f25 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x31161d and fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x16; op2:x18; op3:x15; dest:x17; op1val:0x7f0e0f7e; op2val:0xbf9f8f25;
op3val:0x7f31161d; valaddr_reg:x3; val_offset:42*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fmadd.s, x17, x16, x18, x15, dyn, 128, 0, x3, 42*FLEN/8, x4, x1, x2)

inst_15:
// rs1==x17, rs2==x15, rs3==x18, rd==x16,fs1 == 0 and fe1 == 0xf9 and fm1 == 0x323547 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x006caa and fs3 == 0 and fe3 == 0xfd and fm3 == 0x32cc91 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x17; op2:x15; op3:x18; dest:x16; op1val:0x7cb23547; op2val:0xc1806caa;
op3val:0x7eb2cc91; valaddr_reg:x3; val_offset:45*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x16, x17, x15, x18, dyn, 0, 0, x3, 45*FLEN/8, x4, x1, x2)

inst_16:
// rs1==x14, rs2==x16, rs3==x17, rd==x15,fs1 == 0 and fe1 == 0xf9 and fm1 == 0x323547 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x006caa and fs3 == 0 and fe3 == 0xfd and fm3 == 0x32cc91 and fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x14; op2:x16; op3:x17; dest:x15; op1val:0x7cb23547; op2val:0xc1806caa;
op3val:0x7eb2cc91; valaddr_reg:x3; val_offset:48*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fmadd.s, x15, x14, x16, x17, dyn, 32, 0, x3, 48*FLEN/8, x4, x1, x2)

inst_17:
// rs1==x15, rs2==x13, rs3==x12, rd==x14,fs1 == 0 and fe1 == 0xf9 and fm1 == 0x323547 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x006caa and fs3 == 0 and fe3 == 0xfd and fm3 == 0x32cc91 and fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x15; op2:x13; op3:x12; dest:x14; op1val:0x7cb23547; op2val:0xc1806caa;
op3val:0x7eb2cc91; valaddr_reg:x3; val_offset:51*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fmadd.s, x14, x15, x13, x12, dyn, 64, 0, x3, 51*FLEN/8, x4, x1, x2)

inst_18:
// rs1==x12, rs2==x14, rs3==x11, rd==x13,fs1 == 0 and fe1 == 0xf9 and fm1 == 0x323547 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x006caa and fs3 == 0 and fe3 == 0xfd and fm3 == 0x32cc91 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x12; op2:x14; op3:x11; dest:x13; op1val:0x7cb23547; op2val:0xc1806caa;
op3val:0x7eb2cc91; valaddr_reg:x3; val_offset:54*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x13, x12, x14, x11, dyn, 96, 0, x3, 54*FLEN/8, x4, x1, x2)

inst_19:
// rs1==x13, rs2==x11, rs3==x14, rd==x12,fs1 == 0 and fe1 == 0xf9 and fm1 == 0x323547 and fs2 == 1 and fe2 == 0x83 and fm2 == 0x006caa and fs3 == 0 and fe3 == 0xfd and fm3 == 0x32cc91 and fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x13; op2:x11; op3:x14; dest:x12; op1val:0x7cb23547; op2val:0xc1806caa;
op3val:0x7eb2cc91; valaddr_reg:x3; val_offset:57*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:128 */
TEST_FPR4_OP(fmadd.s, x12, x13, x11, x14, dyn, 128, 0, x3, 57*FLEN/8, x4, x1, x2)

inst_20:
// rs1==x10, rs2==x12, rs3==x13, rd==x11,fs1 == 0 and fe1 == 0xfe and fm1 == 0x351fde and fs2 == 1 and fe2 == 0x7e and fm2 == 0x301cf4 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7934ca and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x10; op2:x12; op3:x13; dest:x11; op1val:0x7f351fde; op2val:0xbf301cf4;
op3val:0x7ef934ca; valaddr_reg:x3; val_offset:60*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x11, x10, x12, x13, dyn, 0, 0, x3, 60*FLEN/8, x4, x1, x2)
RVTEST_VALBASEUPD(x12,test_dataset_1)

inst_21:
// rs1==x11, rs2==x9, rs3==x8, rd==x10,fs1 == 0 and fe1 == 0xfe and fm1 == 0x351fde and fs2 == 1 and fe2 == 0x7e and fm2 == 0x301cf4 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7934ca and fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x11; op2:x9; op3:x8; dest:x10; op1val:0x7f351fde; op2val:0xbf301cf4;
op3val:0x7ef934ca; valaddr_reg:x12; val_offset:0*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:32 */
TEST_FPR4_OP(fmadd.s, x10, x11, x9, x8, dyn, 32, 0, x12, 0*FLEN/8, x13, x1, x2)

inst_22:
// rs1==x8, rs2==x10, rs3==x7, rd==x9,fs1 == 0 and fe1 == 0xfe and fm1 == 0x351fde and fs2 == 1 and fe2 == 0x7e and fm2 == 0x301cf4 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7934ca and fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x8; op2:x10; op3:x7; dest:x9; op1val:0x7f351fde; op2val:0xbf301cf4;
op3val:0x7ef934ca; valaddr_reg:x12; val_offset:3*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:64 */
TEST_FPR4_OP(fmadd.s, x9, x8, x10, x7, dyn, 64, 0, x12, 3*FLEN/8, x13, x1, x2)

inst_23:
// rs1==x9, rs2==x7, rs3==x10, rd==x8,fs1 == 0 and fe1 == 0xfe and fm1 == 0x351fde and fs2 == 1 and fe2 == 0x7e and fm2 == 0x301cf4 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7934ca and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x9; op2:x7; op3:x10; dest:x8; op1val:0x7f351fde; op2val:0xbf301cf4;
op3val:0x7ef934ca; valaddr_reg:x12; val_offset:6*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x8, x9, x7, x10, dyn, 96, 0, x12, 6*FLEN/8, x13, x1, x10)
RVTEST_SIGBASE(x9,signature_x9_0)

inst_24:
// rs1==x6, rs2==x8, rs3==x9, rd==x7,fs1 == 0 and fe1 == 0xfe and fm1 == 0x351fde and fs2 == 1 and fe2 == 0x7e and fm2 == 0x301cf4 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7934ca and fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x6; op2:x8; op3:x9; dest:x7; op1val:0x7f351fde; op2val:0xbf301cf4;
op3val:0x7ef934ca; valaddr_reg:x12; val_offset:9*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:128 */
TEST_FPR4_OP(fmadd.s, x7, x6, x8, x9, dyn, 128, 0, x12, 9*FLEN/8, x13, x9, x10)

inst_25:
// rs1==x7, rs2==x5, rs3==x4, rd==x6,fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf90f and fs2 == 1 and fe2 == 0x7c and fm2 == 0x00acab and fs3 == 0 and fe3 == 0xfb and fm3 == 0x2de265 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x7; op2:x5; op3:x4; dest:x6; op1val:0x7f2cf90f; op2val:0xbe00acab;
op3val:0x7dade265; valaddr_reg:x12; val_offset:12*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x6, x7, x5, x4, dyn, 0, 0, x12, 12*FLEN/8, x13, x9, x10)

inst_26:
// rs1==x4, rs2==x6, rs3==x3, rd==x5,fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf90f and fs2 == 1 and fe2 == 0x7c and fm2 == 0x00acab and fs3 == 0 and fe3 == 0xfb and fm3 == 0x2de265 and fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x4; op2:x6; op3:x3; dest:x5; op1val:0x7f2cf90f; op2val:0xbe00acab;
op3val:0x7dade265; valaddr_reg:x12; val_offset:15*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:32 */
TEST_FPR4_OP(fmadd.s, x5, x4, x6, x3, dyn, 32, 0, x12, 15*FLEN/8, x13, x9, x10)

inst_27:
// rs1==x5, rs2==x3, rs3==x6, rd==x4,fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf90f and fs2 == 1 and fe2 == 0x7c and fm2 == 0x00acab and fs3 == 0 and fe3 == 0xfb and fm3 == 0x2de265 and fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x5; op2:x3; op3:x6; dest:x4; op1val:0x7f2cf90f; op2val:0xbe00acab;
op3val:0x7dade265; valaddr_reg:x12; val_offset:18*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:64 */
TEST_FPR4_OP(fmadd.s, x4, x5, x3, x6, dyn, 64, 0, x12, 18*FLEN/8, x13, x9, x10)

inst_28:
// rs1==x2, rs2==x4, rs3==x5, rd==x3,fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf90f and fs2 == 1 and fe2 == 0x7c and fm2 == 0x00acab and fs3 == 0 and fe3 == 0xfb and fm3 == 0x2de265 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x2; op2:x4; op3:x5; dest:x3; op1val:0x7f2cf90f; op2val:0xbe00acab;
op3val:0x7dade265; valaddr_reg:x12; val_offset:21*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x3, x2, x4, x5, dyn, 96, 0, x12, 21*FLEN/8, x13, x9, x10)

inst_29:
// rs1==x3, rs2==x1, rs3==x0, rd==x2,fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf90f and fs2 == 1 and fe2 == 0x7c and fm2 == 0x00acab and fs3 == 0 and fe3 == 0xfb and fm3 == 0x2de265 and fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x3; op2:x1; op3:x0; dest:x2; op1val:0x7f2cf90f; op2val:0xbe00acab;
op3val:0x0; valaddr_reg:x12; val_offset:24*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:128 */
TEST_FPR4_OP(fmadd.s, x2, x3, x1, x0, dyn, 128, 0, x12, 24*FLEN/8, x13, x9, x10)

inst_30:
// rs1==x1,fs1 == 0 and fe1 == 0xfd and fm1 == 0x341f5c and fs2 == 1 and fe2 == 0x7e and fm2 == 0x0691ee and fs3 == 0 and fe3 == 0xfc and fm3 == 0x3d5e30 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x1; op2:x30; op3:x29; dest:x31; op1val:0x7eb41f5c; op2val:0xbf0691ee;
op3val:0x7e3d5e30; valaddr_reg:x12; val_offset:27*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x1, x30, x29, dyn, 0, 0, x12, 27*FLEN/8, x13, x9, x10)

inst_31:
// rs1==x0,fs1 == 0 and fe1 == 0xfd and fm1 == 0x341f5c and fs2 == 1 and fe2 == 0x7e and fm2 == 0x0691ee and fs3 == 0 and fe3 == 0xfc and fm3 == 0x3d5e30 and fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x0; op2:x30; op3:x29; dest:x31; op1val:0x0; op2val:0xbf0691ee;
op3val:0x7e3d5e30; valaddr_reg:x12; val_offset:30*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:32 */
TEST_FPR4_OP(fmadd.s, x31, x0, x30, x29, dyn, 32, 0, x12, 30*FLEN/8, x13, x9, x10)

inst_32:
// rs2==x2,fs1 == 0 and fe1 == 0xfd and fm1 == 0x341f5c and fs2 == 1 and fe2 == 0x7e and fm2 == 0x0691ee and fs3 == 0 and fe3 == 0xfc and fm3 == 0x3d5e30 and fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x2; op3:x29; dest:x31; op1val:0x7eb41f5c; op2val:0xbf0691ee;
op3val:0x7e3d5e30; valaddr_reg:x12; val_offset:33*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:64 */
TEST_FPR4_OP(fmadd.s, x31, x30, x2, x29, dyn, 64, 0, x12, 33*FLEN/8, x13, x9, x10)

inst_33:
// rs2==x0,fs1 == 0 and fe1 == 0xfd and fm1 == 0x341f5c and fs2 == 1 and fe2 == 0x7e and fm2 == 0x0691ee and fs3 == 0 and fe3 == 0xfc and fm3 == 0x3d5e30 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x0; op3:x29; dest:x31; op1val:0x7eb41f5c; op2val:0x0;
op3val:0x7e3d5e30; valaddr_reg:x12; val_offset:36*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x0, x29, dyn, 96, 0, x12, 36*FLEN/8, x13, x9, x10)

inst_34:
// rs3==x2,fs1 == 0 and fe1 == 0xfd and fm1 == 0x341f5c and fs2 == 1 and fe2 == 0x7e and fm2 == 0x0691ee and fs3 == 0 and fe3 == 0xfc and fm3 == 0x3d5e30 and fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x2; dest:x31; op1val:0x7eb41f5c; op2val:0xbf0691ee;
op3val:0x7e3d5e30; valaddr_reg:x12; val_offset:39*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:128 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x2, dyn, 128, 0, x12, 39*FLEN/8, x13, x9, x10)

inst_35:
// rs3==x1,fs1 == 0 and fe1 == 0xfd and fm1 == 0x50cddd and fs2 == 1 and fe2 == 0x7f and fm2 == 0x071ab8 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x5c64b6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x1; dest:x31; op1val:0x7ed0cddd; op2val:0xbf871ab8;
op3val:0x7edc64b6; valaddr_reg:x12; val_offset:42*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x1, dyn, 0, 0, x12, 42*FLEN/8, x13, x9, x10)

inst_36:
// rd==x1,fs1 == 0 and fe1 == 0xfd and fm1 == 0x50cddd and fs2 == 1 and fe2 == 0x7f and fm2 == 0x071ab8 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x5c64b6 and fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x31; op2:x30; op3:x29; dest:x1; op1val:0x7ed0cddd; op2val:0xbf871ab8;
op3val:0x7edc64b6; valaddr_reg:x12; val_offset:45*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:32 */
TEST_FPR4_OP(fmadd.s, x1, x31, x30, x29, dyn, 32, 0, x12, 45*FLEN/8, x13, x9, x10)

inst_37:
// rd==x0,fs1 == 0 and fe1 == 0xfd and fm1 == 0x50cddd and fs2 == 1 and fe2 == 0x7f and fm2 == 0x071ab8 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x5c64b6 and fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x31; op2:x30; op3:x29; dest:x0; op1val:0x7ed0cddd; op2val:0xbf871ab8;
op3val:0x7edc64b6; valaddr_reg:x12; val_offset:48*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:64 */
TEST_FPR4_OP(fmadd.s, x0, x31, x30, x29, dyn, 64, 0, x12, 48*FLEN/8, x13, x9, x10)

inst_38:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50cddd and fs2 == 1 and fe2 == 0x7f and fm2 == 0x071ab8 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x5c64b6 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed0cddd; op2val:0xbf871ab8;
op3val:0x7edc64b6; valaddr_reg:x12; val_offset:51*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 51*FLEN/8, x13, x9, x10)

inst_39:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50cddd and fs2 == 1 and fe2 == 0x7f and fm2 == 0x071ab8 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x5c64b6 and fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed0cddd; op2val:0xbf871ab8;
op3val:0x7edc64b6; valaddr_reg:x12; val_offset:54*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:128 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 128, 0, x12, 54*FLEN/8, x13, x9, x10)

inst_40:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2125ab and fs2 == 1 and fe2 == 0x83 and fm2 == 0x0435fb and fs3 == 0 and fe3 == 0xfc and fm3 == 0x2672cf and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c2125ab; op2val:0xc18435fb;
op3val:0x7e2672cf; valaddr_reg:x12; val_offset:57*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 57*FLEN/8, x13, x9, x10)

inst_41:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2125ab and fs2 == 1 and fe2 == 0x83 and fm2 == 0x0435fb and fs3 == 0 and fe3 == 0xfc and fm3 == 0x2672cf and fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c2125ab; op2val:0xc18435fb;
op3val:0x7e2672cf; valaddr_reg:x12; val_offset:60*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:32 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 32, 0, x12, 60*FLEN/8, x13, x9, x10)

inst_42:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2125ab and fs2 == 1 and fe2 == 0x83 and fm2 == 0x0435fb and fs3 == 0 and fe3 == 0xfc and fm3 == 0x2672cf and fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c2125ab; op2val:0xc18435fb;
op3val:0x7e2672cf; valaddr_reg:x12; val_offset:63*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:64 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 64, 0, x12, 63*FLEN/8, x13, x9, x10)

inst_43:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2125ab and fs2 == 1 and fe2 == 0x83 and fm2 == 0x0435fb and fs3 == 0 and fe3 == 0xfc and fm3 == 0x2672cf and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c2125ab; op2val:0xc18435fb;
op3val:0x7e2672cf; valaddr_reg:x12; val_offset:66*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 66*FLEN/8, x13, x9, x10)

inst_44:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2125ab and fs2 == 1 and fe2 == 0x83 and fm2 == 0x0435fb and fs3 == 0 and fe3 == 0xfc and fm3 == 0x2672cf and fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c2125ab; op2val:0xc18435fb;
op3val:0x7e2672cf; valaddr_reg:x12; val_offset:69*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:128 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 128, 0, x12, 69*FLEN/8, x13, x9, x10)

inst_45:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x56a477 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x51d69a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x2ff034 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e56a477; op2val:0xc051d69a;
op3val:0x7f2ff034; valaddr_reg:x12; val_offset:72*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 72*FLEN/8, x13, x9, x10)

inst_46:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x56a477 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x51d69a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x2ff034 and fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e56a477; op2val:0xc051d69a;
op3val:0x7f2ff034; valaddr_reg:x12; val_offset:75*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:32 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 32, 0, x12, 75*FLEN/8, x13, x9, x10)

inst_47:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x56a477 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x51d69a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x2ff034 and fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e56a477; op2val:0xc051d69a;
op3val:0x7f2ff034; valaddr_reg:x12; val_offset:78*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:64 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 64, 0, x12, 78*FLEN/8, x13, x9, x10)

inst_48:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x56a477 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x51d69a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x2ff034 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e56a477; op2val:0xc051d69a;
op3val:0x7f2ff034; valaddr_reg:x12; val_offset:81*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 81*FLEN/8, x13, x9, x10)

inst_49:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x56a477 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x51d69a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x2ff034 and fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e56a477; op2val:0xc051d69a;
op3val:0x7f2ff034; valaddr_reg:x12; val_offset:84*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:128 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 128, 0, x12, 84*FLEN/8, x13, x9, x10)

inst_50:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1304ef and fs2 == 1 and fe2 == 0x7c and fm2 == 0x557010 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x7526ed and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1304ef; op2val:0xbe557010;
op3val:0x7df526ed; valaddr_reg:x12; val_offset:87*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 87*FLEN/8, x13, x9, x10)

inst_51:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1304ef and fs2 == 1 and fe2 == 0x7c and fm2 == 0x557010 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x7526ed and fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1304ef; op2val:0xbe557010;
op3val:0x7df526ed; valaddr_reg:x12; val_offset:90*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:32 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 32, 0, x12, 90*FLEN/8, x13, x9, x10)

inst_52:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1304ef and fs2 == 1 and fe2 == 0x7c and fm2 == 0x557010 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x7526ed and fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1304ef; op2val:0xbe557010;
op3val:0x7df526ed; valaddr_reg:x12; val_offset:93*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:64 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 64, 0, x12, 93*FLEN/8, x13, x9, x10)

inst_53:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1304ef and fs2 == 1 and fe2 == 0x7c and fm2 == 0x557010 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x7526ed and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1304ef; op2val:0xbe557010;
op3val:0x7df526ed; valaddr_reg:x12; val_offset:96*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 96*FLEN/8, x13, x9, x10)

inst_54:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1304ef and fs2 == 1 and fe2 == 0x7c and fm2 == 0x557010 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x7526ed and fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1304ef; op2val:0xbe557010;
op3val:0x7df526ed; valaddr_reg:x12; val_offset:99*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:128 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 128, 0, x12, 99*FLEN/8, x13, x9, x10)

inst_55:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x190d5e and fs2 == 1 and fe2 == 0x7c and fm2 == 0x32420c and fs3 == 0 and fe3 == 0xfb and fm3 == 0x552591 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f190d5e; op2val:0xbe32420c;
op3val:0x7dd52591; valaddr_reg:x12; val_offset:102*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 102*FLEN/8, x13, x9, x10)

inst_56:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x190d5e and fs2 == 1 and fe2 == 0x7c and fm2 == 0x32420c and fs3 == 0 and fe3 == 0xfb and fm3 == 0x552591 and fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f190d5e; op2val:0xbe32420c;
op3val:0x7dd52591; valaddr_reg:x12; val_offset:105*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:32 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 32, 0, x12, 105*FLEN/8, x13, x9, x10)

inst_57:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x190d5e and fs2 == 1 and fe2 == 0x7c and fm2 == 0x32420c and fs3 == 0 and fe3 == 0xfb and fm3 == 0x552591 and fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f190d5e; op2val:0xbe32420c;
op3val:0x7dd52591; valaddr_reg:x12; val_offset:108*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:64 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 64, 0, x12, 108*FLEN/8, x13, x9, x10)

inst_58:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x190d5e and fs2 == 1 and fe2 == 0x7c and fm2 == 0x32420c and fs3 == 0 and fe3 == 0xfb and fm3 == 0x552591 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f190d5e; op2val:0xbe32420c;
op3val:0x7dd52591; valaddr_reg:x12; val_offset:111*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 111*FLEN/8, x13, x9, x10)

inst_59:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x190d5e and fs2 == 1 and fe2 == 0x7c and fm2 == 0x32420c and fs3 == 0 and fe3 == 0xfb and fm3 == 0x552591 and fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f190d5e; op2val:0xbe32420c;
op3val:0x7dd52591; valaddr_reg:x12; val_offset:114*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:128 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 128, 0, x12, 114*FLEN/8, x13, x9, x10)

inst_60:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d1a0c and fs2 == 1 and fe2 == 0x7c and fm2 == 0x521f16 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x429c29 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eed1a0c; op2val:0xbe521f16;
op3val:0x7dc29c29; valaddr_reg:x12; val_offset:117*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 117*FLEN/8, x13, x9, x10)

inst_61:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d1a0c and fs2 == 1 and fe2 == 0x7c and fm2 == 0x521f16 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x429c29 and fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eed1a0c; op2val:0xbe521f16;
op3val:0x7dc29c29; valaddr_reg:x12; val_offset:120*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:32 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 32, 0, x12, 120*FLEN/8, x13, x9, x10)

inst_62:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d1a0c and fs2 == 1 and fe2 == 0x7c and fm2 == 0x521f16 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x429c29 and fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eed1a0c; op2val:0xbe521f16;
op3val:0x7dc29c29; valaddr_reg:x12; val_offset:123*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:64 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 64, 0, x12, 123*FLEN/8, x13, x9, x10)

inst_63:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d1a0c and fs2 == 1 and fe2 == 0x7c and fm2 == 0x521f16 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x429c29 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eed1a0c; op2val:0xbe521f16;
op3val:0x7dc29c29; valaddr_reg:x12; val_offset:126*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 126*FLEN/8, x13, x9, x10)

inst_64:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d1a0c and fs2 == 1 and fe2 == 0x7c and fm2 == 0x521f16 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x429c29 and fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eed1a0c; op2val:0xbe521f16;
op3val:0x7dc29c29; valaddr_reg:x12; val_offset:129*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:128 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 128, 0, x12, 129*FLEN/8, x13, x9, x10)

inst_65:
// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x2e79de and fs2 == 1 and fe2 == 0x87 and fm2 == 0x757c34 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x274f48 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7aae79de; op2val:0xc3f57c34;
op3val:0x7f274f48; valaddr_reg:x12; val_offset:132*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 132*FLEN/8, x13, x9, x10)

inst_66:
// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x2e79de and fs2 == 1 and fe2 == 0x87 and fm2 == 0x757c34 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x274f48 and fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7aae79de; op2val:0xc3f57c34;
op3val:0x7f274f48; valaddr_reg:x12; val_offset:135*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:32 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 32, 0, x12, 135*FLEN/8, x13, x9, x10)

inst_67:
// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x2e79de and fs2 == 1 and fe2 == 0x87 and fm2 == 0x757c34 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x274f48 and fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7aae79de; op2val:0xc3f57c34;
op3val:0x7f274f48; valaddr_reg:x12; val_offset:138*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:64 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 64, 0, x12, 138*FLEN/8, x13, x9, x10)

inst_68:
// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x2e79de and fs2 == 1 and fe2 == 0x87 and fm2 == 0x757c34 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x274f48 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7aae79de; op2val:0xc3f57c34;
op3val:0x7f274f48; valaddr_reg:x12; val_offset:141*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 141*FLEN/8, x13, x9, x10)

inst_69:
// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x2e79de and fs2 == 1 and fe2 == 0x87 and fm2 == 0x757c34 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x274f48 and fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7aae79de; op2val:0xc3f57c34;
op3val:0x7f274f48; valaddr_reg:x12; val_offset:144*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:128 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 128, 0, x12, 144*FLEN/8, x13, x9, x10)

inst_70:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x20dccc and fs2 == 1 and fe2 == 0x7f and fm2 == 0x03ae89 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x257d51 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e20dccc; op2val:0xbf83ae89;
op3val:0x7e257d51; valaddr_reg:x12; val_offset:147*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 147*FLEN/8, x13, x9, x10)

inst_71:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x20dccc and fs2 == 1 and fe2 == 0x7f and fm2 == 0x03ae89 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x257d51 and fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e20dccc; op2val:0xbf83ae89;
op3val:0x7e257d51; valaddr_reg:x12; val_offset:150*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:32 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 32, 0, x12, 150*FLEN/8, x13, x9, x10)

inst_72:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x20dccc and fs2 == 1 and fe2 == 0x7f and fm2 == 0x03ae89 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x257d51 and fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e20dccc; op2val:0xbf83ae89;
op3val:0x7e257d51; valaddr_reg:x12; val_offset:153*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:64 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 64, 0, x12, 153*FLEN/8, x13, x9, x10)

inst_73:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x20dccc and fs2 == 1 and fe2 == 0x7f and fm2 == 0x03ae89 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x257d51 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e20dccc; op2val:0xbf83ae89;
op3val:0x7e257d51; valaddr_reg:x12; val_offset:156*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 156*FLEN/8, x13, x9, x10)

inst_74:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x20dccc and fs2 == 1 and fe2 == 0x7f and fm2 == 0x03ae89 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x257d51 and fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e20dccc; op2val:0xbf83ae89;
op3val:0x7e257d51; valaddr_reg:x12; val_offset:159*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:128 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 128, 0, x12, 159*FLEN/8, x13, x9, x10)

inst_75:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c9ff5 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x635528 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x278095 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3c9ff5; op2val:0xbf635528;
op3val:0x7f278095; valaddr_reg:x12; val_offset:162*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 162*FLEN/8, x13, x9, x10)

inst_76:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c9ff5 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x635528 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x278095 and fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3c9ff5; op2val:0xbf635528;
op3val:0x7f278095; valaddr_reg:x12; val_offset:165*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:32 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 32, 0, x12, 165*FLEN/8, x13, x9, x10)

inst_77:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c9ff5 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x635528 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x278095 and fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3c9ff5; op2val:0xbf635528;
op3val:0x7f278095; valaddr_reg:x12; val_offset:168*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:64 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 64, 0, x12, 168*FLEN/8, x13, x9, x10)

inst_78:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c9ff5 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x635528 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x278095 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3c9ff5; op2val:0xbf635528;
op3val:0x7f278095; valaddr_reg:x12; val_offset:171*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 171*FLEN/8, x13, x9, x10)

inst_79:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c9ff5 and fs2 == 1 and fe2 == 0x7e and fm2 == 0x635528 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x278095 and fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3c9ff5; op2val:0xbf635528;
op3val:0x7f278095; valaddr_reg:x12; val_offset:174*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:128 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 128, 0, x12, 174*FLEN/8, x13, x9, x10)

inst_80:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e2fb5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x54b2a7 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x389a90 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5e2fb5; op2val:0xc054b2a7;
op3val:0x7f389a90; valaddr_reg:x12; val_offset:177*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 177*FLEN/8, x13, x9, x10)

inst_81:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e2fb5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x54b2a7 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x389a90 and fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5e2fb5; op2val:0xc054b2a7;
op3val:0x7f389a90; valaddr_reg:x12; val_offset:180*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:32 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 32, 0, x12, 180*FLEN/8, x13, x9, x10)

inst_82:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e2fb5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x54b2a7 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x389a90 and fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5e2fb5; op2val:0xc054b2a7;
op3val:0x7f389a90; valaddr_reg:x12; val_offset:183*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:64 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 64, 0, x12, 183*FLEN/8, x13, x9, x10)

inst_83:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e2fb5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x54b2a7 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x389a90 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5e2fb5; op2val:0xc054b2a7;
op3val:0x7f389a90; valaddr_reg:x12; val_offset:186*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 186*FLEN/8, x13, x9, x10)

inst_84:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e2fb5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x54b2a7 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x389a90 and fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5e2fb5; op2val:0xc054b2a7;
op3val:0x7f389a90; valaddr_reg:x12; val_offset:189*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:128 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 128, 0, x12, 189*FLEN/8, x13, x9, x10)

inst_85:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f0fd2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x20e6fd and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0224b8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecf0fd2; op2val:0xbfa0e6fd;
op3val:0x7f0224b8; valaddr_reg:x12; val_offset:192*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 192*FLEN/8, x13, x9, x10)

inst_86:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f0fd2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x20e6fd and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0224b8 and fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecf0fd2; op2val:0xbfa0e6fd;
op3val:0x7f0224b8; valaddr_reg:x12; val_offset:195*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:32 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 32, 0, x12, 195*FLEN/8, x13, x9, x10)

inst_87:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f0fd2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x20e6fd and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0224b8 and fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecf0fd2; op2val:0xbfa0e6fd;
op3val:0x7f0224b8; valaddr_reg:x12; val_offset:198*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:64 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 64, 0, x12, 198*FLEN/8, x13, x9, x10)

inst_88:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f0fd2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x20e6fd and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0224b8 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecf0fd2; op2val:0xbfa0e6fd;
op3val:0x7f0224b8; valaddr_reg:x12; val_offset:201*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 201*FLEN/8, x13, x9, x10)

inst_89:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f0fd2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x20e6fd and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0224b8 and fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecf0fd2; op2val:0xbfa0e6fd;
op3val:0x7f0224b8; valaddr_reg:x12; val_offset:204*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:128 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 128, 0, x12, 204*FLEN/8, x13, x9, x10)

inst_90:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d454a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x130ace and fs3 == 0 and fe3 == 0xfe and fm3 == 0x34aad9 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1d454a; op2val:0xc0930ace;
op3val:0x7f34aad9; valaddr_reg:x12; val_offset:207*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 207*FLEN/8, x13, x9, x10)

inst_91:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d454a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x130ace and fs3 == 0 and fe3 == 0xfe and fm3 == 0x34aad9 and fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1d454a; op2val:0xc0930ace;
op3val:0x7f34aad9; valaddr_reg:x12; val_offset:210*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:32 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 32, 0, x12, 210*FLEN/8, x13, x9, x10)

inst_92:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d454a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x130ace and fs3 == 0 and fe3 == 0xfe and fm3 == 0x34aad9 and fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1d454a; op2val:0xc0930ace;
op3val:0x7f34aad9; valaddr_reg:x12; val_offset:213*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:64 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 64, 0, x12, 213*FLEN/8, x13, x9, x10)

inst_93:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d454a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x130ace and fs3 == 0 and fe3 == 0xfe and fm3 == 0x34aad9 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1d454a; op2val:0xc0930ace;
op3val:0x7f34aad9; valaddr_reg:x12; val_offset:216*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 216*FLEN/8, x13, x9, x10)

inst_94:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d454a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x130ace and fs3 == 0 and fe3 == 0xfe and fm3 == 0x34aad9 and fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e1d454a; op2val:0xc0930ace;
op3val:0x7f34aad9; valaddr_reg:x12; val_offset:219*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:128 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 128, 0, x12, 219*FLEN/8, x13, x9, x10)

inst_95:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x049a6e and fs2 == 1 and fe2 == 0x7f and fm2 == 0x332355 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x399491 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f049a6e; op2val:0xbfb32355;
op3val:0x7f399491; valaddr_reg:x12; val_offset:222*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 222*FLEN/8, x13, x9, x10)

inst_96:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x049a6e and fs2 == 1 and fe2 == 0x7f and fm2 == 0x332355 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x399491 and fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f049a6e; op2val:0xbfb32355;
op3val:0x7f399491; valaddr_reg:x12; val_offset:225*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:32 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 32, 0, x12, 225*FLEN/8, x13, x9, x10)

inst_97:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x049a6e and fs2 == 1 and fe2 == 0x7f and fm2 == 0x332355 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x399491 and fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f049a6e; op2val:0xbfb32355;
op3val:0x7f399491; valaddr_reg:x12; val_offset:228*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:64 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 64, 0, x12, 228*FLEN/8, x13, x9, x10)

inst_98:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x049a6e and fs2 == 1 and fe2 == 0x7f and fm2 == 0x332355 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x399491 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f049a6e; op2val:0xbfb32355;
op3val:0x7f399491; valaddr_reg:x12; val_offset:231*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 231*FLEN/8, x13, x9, x10)

inst_99:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x049a6e and fs2 == 1 and fe2 == 0x7f and fm2 == 0x332355 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x399491 and fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f049a6e; op2val:0xbfb32355;
op3val:0x7f399491; valaddr_reg:x12; val_offset:234*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:128 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 128, 0, x12, 234*FLEN/8, x13, x9, x10)

inst_100:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b9930 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x2b2afd and fs3 == 0 and fe3 == 0xfc and fm3 == 0x657849 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2b9930; op2val:0xbeab2afd;
op3val:0x7e657849; valaddr_reg:x12; val_offset:237*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 237*FLEN/8, x13, x9, x10)

inst_101:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b9930 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x2b2afd and fs3 == 0 and fe3 == 0xfc and fm3 == 0x657849 and fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2b9930; op2val:0xbeab2afd;
op3val:0x7e657849; valaddr_reg:x12; val_offset:240*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:32 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 32, 0, x12, 240*FLEN/8, x13, x9, x10)

inst_102:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b9930 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x2b2afd and fs3 == 0 and fe3 == 0xfc and fm3 == 0x657849 and fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2b9930; op2val:0xbeab2afd;
op3val:0x7e657849; valaddr_reg:x12; val_offset:243*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:64 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 64, 0, x12, 243*FLEN/8, x13, x9, x10)

inst_103:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b9930 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x2b2afd and fs3 == 0 and fe3 == 0xfc and fm3 == 0x657849 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2b9930; op2val:0xbeab2afd;
op3val:0x7e657849; valaddr_reg:x12; val_offset:246*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 246*FLEN/8, x13, x9, x10)

inst_104:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b9930 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x2b2afd and fs3 == 0 and fe3 == 0xfc and fm3 == 0x657849 and fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2b9930; op2val:0xbeab2afd;
op3val:0x7e657849; valaddr_reg:x12; val_offset:249*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:128 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 128, 0, x12, 249*FLEN/8, x13, x9, x10)

inst_105:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ab269 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x6b3fb1 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x7ee893 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e8ab269; op2val:0xbeeb3fb1;
op3val:0x7dfee893; valaddr_reg:x12; val_offset:252*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 252*FLEN/8, x13, x9, x10)

inst_106:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ab269 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x6b3fb1 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x7ee893 and fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e8ab269; op2val:0xbeeb3fb1;
op3val:0x7dfee893; valaddr_reg:x12; val_offset:255*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:32 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 32, 0, x12, 255*FLEN/8, x13, x9, x10)

inst_107:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ab269 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x6b3fb1 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x7ee893 and fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e8ab269; op2val:0xbeeb3fb1;
op3val:0x7dfee893; valaddr_reg:x12; val_offset:258*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:64 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 64, 0, x12, 258*FLEN/8, x13, x9, x10)

inst_108:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ab269 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x6b3fb1 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x7ee893 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e8ab269; op2val:0xbeeb3fb1;
op3val:0x7dfee893; valaddr_reg:x12; val_offset:261*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 261*FLEN/8, x13, x9, x10)

inst_109:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ab269 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x6b3fb1 and fs3 == 0 and fe3 == 0xfb and fm3 == 0x7ee893 and fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e8ab269; op2val:0xbeeb3fb1;
op3val:0x7dfee893; valaddr_reg:x12; val_offset:264*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:128 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 128, 0, x12, 264*FLEN/8, x13, x9, x10)

inst_110:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5fcc51 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x64e70b and fs3 == 0 and fe3 == 0xfa and fm3 == 0x481bf3 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ddfcc51; op2val:0xbee4e70b;
op3val:0x7d481bf3; valaddr_reg:x12; val_offset:267*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 267*FLEN/8, x13, x9, x10)

inst_111:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5fcc51 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x64e70b and fs3 == 0 and fe3 == 0xfa and fm3 == 0x481bf3 and fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ddfcc51; op2val:0xbee4e70b;
op3val:0x7d481bf3; valaddr_reg:x12; val_offset:270*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:32 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 32, 0, x12, 270*FLEN/8, x13, x9, x10)

inst_112:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5fcc51 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x64e70b and fs3 == 0 and fe3 == 0xfa and fm3 == 0x481bf3 and fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ddfcc51; op2val:0xbee4e70b;
op3val:0x7d481bf3; valaddr_reg:x12; val_offset:273*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:64 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 64, 0, x12, 273*FLEN/8, x13, x9, x10)

inst_113:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5fcc51 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x64e70b and fs3 == 0 and fe3 == 0xfa and fm3 == 0x481bf3 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ddfcc51; op2val:0xbee4e70b;
op3val:0x7d481bf3; valaddr_reg:x12; val_offset:276*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 276*FLEN/8, x13, x9, x10)

inst_114:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5fcc51 and fs2 == 1 and fe2 == 0x7d and fm2 == 0x64e70b and fs3 == 0 and fe3 == 0xfa and fm3 == 0x481bf3 and fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ddfcc51; op2val:0xbee4e70b;
op3val:0x7d481bf3; valaddr_reg:x12; val_offset:279*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:128 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 128, 0, x12, 279*FLEN/8, x13, x9, x10)

inst_115:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67719b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x00154c and fs3 == 0 and fe3 == 0xfd and fm3 == 0x67981f and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e67719b; op2val:0xc000154c;
op3val:0x7ee7981f; valaddr_reg:x12; val_offset:282*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 282*FLEN/8, x13, x9, x10)

inst_116:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67719b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x00154c and fs3 == 0 and fe3 == 0xfd and fm3 == 0x67981f and fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e67719b; op2val:0xc000154c;
op3val:0x7ee7981f; valaddr_reg:x12; val_offset:285*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:32 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 32, 0, x12, 285*FLEN/8, x13, x9, x10)

inst_117:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67719b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x00154c and fs3 == 0 and fe3 == 0xfd and fm3 == 0x67981f and fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e67719b; op2val:0xc000154c;
op3val:0x7ee7981f; valaddr_reg:x12; val_offset:288*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:64 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 64, 0, x12, 288*FLEN/8, x13, x9, x10)

inst_118:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67719b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x00154c and fs3 == 0 and fe3 == 0xfd and fm3 == 0x67981f and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e67719b; op2val:0xc000154c;
op3val:0x7ee7981f; valaddr_reg:x12; val_offset:291*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 291*FLEN/8, x13, x9, x10)

inst_119:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67719b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x00154c and fs3 == 0 and fe3 == 0xfd and fm3 == 0x67981f and fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e67719b; op2val:0xc000154c;
op3val:0x7ee7981f; valaddr_reg:x12; val_offset:294*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:128 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 128, 0, x12, 294*FLEN/8, x13, x9, x10)

inst_120:
// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26497d and fs2 == 1 and fe2 == 0x86 and fm2 == 0x486327 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0229d2 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7b26497d; op2val:0xc3486327;
op3val:0x7f0229d2; valaddr_reg:x12; val_offset:297*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 297*FLEN/8, x13, x9, x10)

inst_121:
// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26497d and fs2 == 1 and fe2 == 0x86 and fm2 == 0x486327 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0229d2 and fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7b26497d; op2val:0xc3486327;
op3val:0x7f0229d2; valaddr_reg:x12; val_offset:300*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:32 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 32, 0, x12, 300*FLEN/8, x13, x9, x10)

inst_122:
// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26497d and fs2 == 1 and fe2 == 0x86 and fm2 == 0x486327 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0229d2 and fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7b26497d; op2val:0xc3486327;
op3val:0x7f0229d2; valaddr_reg:x12; val_offset:303*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:64 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 64, 0, x12, 303*FLEN/8, x13, x9, x10)

inst_123:
// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26497d and fs2 == 1 and fe2 == 0x86 and fm2 == 0x486327 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0229d2 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7b26497d; op2val:0xc3486327;
op3val:0x7f0229d2; valaddr_reg:x12; val_offset:306*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 306*FLEN/8, x13, x9, x10)

inst_124:
// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26497d and fs2 == 1 and fe2 == 0x86 and fm2 == 0x486327 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0229d2 and fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7b26497d; op2val:0xc3486327;
op3val:0x7f0229d2; valaddr_reg:x12; val_offset:309*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:128 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 128, 0, x12, 309*FLEN/8, x13, x9, x10)

inst_125:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01c09c and fs2 == 1 and fe2 == 0x7e and fm2 == 0x6ad52b and fs3 == 0 and fe3 == 0xfc and fm3 == 0x6e0c34 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e81c09c; op2val:0xbf6ad52b;
op3val:0x7e6e0c34; valaddr_reg:x12; val_offset:312*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 312*FLEN/8, x13, x9, x10)

inst_126:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01c09c and fs2 == 1 and fe2 == 0x7e and fm2 == 0x6ad52b and fs3 == 0 and fe3 == 0xfc and fm3 == 0x6e0c34 and fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e81c09c; op2val:0xbf6ad52b;
op3val:0x7e6e0c34; valaddr_reg:x12; val_offset:315*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:32 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 32, 0, x12, 315*FLEN/8, x13, x9, x10)

inst_127:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01c09c and fs2 == 1 and fe2 == 0x7e and fm2 == 0x6ad52b and fs3 == 0 and fe3 == 0xfc and fm3 == 0x6e0c34 and fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e81c09c; op2val:0xbf6ad52b;
op3val:0x7e6e0c34; valaddr_reg:x12; val_offset:318*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:64 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 64, 0, x12, 318*FLEN/8, x13, x9, x10)

inst_128:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01c09c and fs2 == 1 and fe2 == 0x7e and fm2 == 0x6ad52b and fs3 == 0 and fe3 == 0xfc and fm3 == 0x6e0c34 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e81c09c; op2val:0xbf6ad52b;
op3val:0x7e6e0c34; valaddr_reg:x12; val_offset:321*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 321*FLEN/8, x13, x9, x10)

inst_129:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01c09c and fs2 == 1 and fe2 == 0x7e and fm2 == 0x6ad52b and fs3 == 0 and fe3 == 0xfc and fm3 == 0x6e0c34 and fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e81c09c; op2val:0xbf6ad52b;
op3val:0x7e6e0c34; valaddr_reg:x12; val_offset:324*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:128 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 128, 0, x12, 324*FLEN/8, x13, x9, x10)

inst_130:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d27cc and fs2 == 1 and fe2 == 0x7e and fm2 == 0x165ba8 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x389b2c and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1d27cc; op2val:0xbf165ba8;
op3val:0x7eb89b2c; valaddr_reg:x12; val_offset:327*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 327*FLEN/8, x13, x9, x10)

inst_131:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d27cc and fs2 == 1 and fe2 == 0x7e and fm2 == 0x165ba8 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x389b2c and fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1d27cc; op2val:0xbf165ba8;
op3val:0x7eb89b2c; valaddr_reg:x12; val_offset:330*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:32 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 32, 0, x12, 330*FLEN/8, x13, x9, x10)

inst_132:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d27cc and fs2 == 1 and fe2 == 0x7e and fm2 == 0x165ba8 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x389b2c and fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1d27cc; op2val:0xbf165ba8;
op3val:0x7eb89b2c; valaddr_reg:x12; val_offset:333*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:64 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 64, 0, x12, 333*FLEN/8, x13, x9, x10)

inst_133:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d27cc and fs2 == 1 and fe2 == 0x7e and fm2 == 0x165ba8 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x389b2c and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1d27cc; op2val:0xbf165ba8;
op3val:0x7eb89b2c; valaddr_reg:x12; val_offset:336*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 336*FLEN/8, x13, x9, x10)

inst_134:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d27cc and fs2 == 1 and fe2 == 0x7e and fm2 == 0x165ba8 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x389b2c and fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1d27cc; op2val:0xbf165ba8;
op3val:0x7eb89b2c; valaddr_reg:x12; val_offset:339*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:128 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 128, 0, x12, 339*FLEN/8, x13, x9, x10)

inst_135:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x728772 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x430d36 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x38c9b0 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e728772; op2val:0xbfc30d36;
op3val:0x7eb8c9b0; valaddr_reg:x12; val_offset:342*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 342*FLEN/8, x13, x9, x10)

inst_136:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x728772 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x430d36 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x38c9b0 and fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e728772; op2val:0xbfc30d36;
op3val:0x7eb8c9b0; valaddr_reg:x12; val_offset:345*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:32 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 32, 0, x12, 345*FLEN/8, x13, x9, x10)

inst_137:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x728772 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x430d36 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x38c9b0 and fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e728772; op2val:0xbfc30d36;
op3val:0x7eb8c9b0; valaddr_reg:x12; val_offset:348*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:64 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 64, 0, x12, 348*FLEN/8, x13, x9, x10)

inst_138:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x728772 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x430d36 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x38c9b0 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e728772; op2val:0xbfc30d36;
op3val:0x7eb8c9b0; valaddr_reg:x12; val_offset:351*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 351*FLEN/8, x13, x9, x10)

inst_139:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x728772 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x430d36 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x38c9b0 and fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e728772; op2val:0xbfc30d36;
op3val:0x7eb8c9b0; valaddr_reg:x12; val_offset:354*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:128 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 128, 0, x12, 354*FLEN/8, x13, x9, x10)

inst_140:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x074be5 and fs2 == 1 and fe2 == 0x7b and fm2 == 0x25a9d6 and fs3 == 0 and fe3 == 0xfa and fm3 == 0x2f1b5a and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f074be5; op2val:0xbda5a9d6;
op3val:0x7d2f1b5a; valaddr_reg:x12; val_offset:357*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 357*FLEN/8, x13, x9, x10)

inst_141:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x074be5 and fs2 == 1 and fe2 == 0x7b and fm2 == 0x25a9d6 and fs3 == 0 and fe3 == 0xfa and fm3 == 0x2f1b5a and fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f074be5; op2val:0xbda5a9d6;
op3val:0x7d2f1b5a; valaddr_reg:x12; val_offset:360*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:32 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 32, 0, x12, 360*FLEN/8, x13, x9, x10)

inst_142:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x074be5 and fs2 == 1 and fe2 == 0x7b and fm2 == 0x25a9d6 and fs3 == 0 and fe3 == 0xfa and fm3 == 0x2f1b5a and fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f074be5; op2val:0xbda5a9d6;
op3val:0x7d2f1b5a; valaddr_reg:x12; val_offset:363*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:64 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 64, 0, x12, 363*FLEN/8, x13, x9, x10)

inst_143:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x074be5 and fs2 == 1 and fe2 == 0x7b and fm2 == 0x25a9d6 and fs3 == 0 and fe3 == 0xfa and fm3 == 0x2f1b5a and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f074be5; op2val:0xbda5a9d6;
op3val:0x7d2f1b5a; valaddr_reg:x12; val_offset:366*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 366*FLEN/8, x13, x9, x10)

inst_144:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x074be5 and fs2 == 1 and fe2 == 0x7b and fm2 == 0x25a9d6 and fs3 == 0 and fe3 == 0xfa and fm3 == 0x2f1b5a and fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f074be5; op2val:0xbda5a9d6;
op3val:0x7d2f1b5a; valaddr_reg:x12; val_offset:369*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:128 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 128, 0, x12, 369*FLEN/8, x13, x9, x10)

inst_145:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b3817 and fs2 == 1 and fe2 == 0x79 and fm2 == 0x401917 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x0c7c6b and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3b3817; op2val:0xbcc01917;
op3val:0x7c8c7c6b; valaddr_reg:x12; val_offset:372*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 372*FLEN/8, x13, x9, x10)

inst_146:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b3817 and fs2 == 1 and fe2 == 0x79 and fm2 == 0x401917 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x0c7c6b and fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3b3817; op2val:0xbcc01917;
op3val:0x7c8c7c6b; valaddr_reg:x12; val_offset:375*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:32 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 32, 0, x12, 375*FLEN/8, x13, x9, x10)

inst_147:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b3817 and fs2 == 1 and fe2 == 0x79 and fm2 == 0x401917 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x0c7c6b and fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3b3817; op2val:0xbcc01917;
op3val:0x7c8c7c6b; valaddr_reg:x12; val_offset:378*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:64 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 64, 0, x12, 378*FLEN/8, x13, x9, x10)

inst_148:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b3817 and fs2 == 1 and fe2 == 0x79 and fm2 == 0x401917 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x0c7c6b and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3b3817; op2val:0xbcc01917;
op3val:0x7c8c7c6b; valaddr_reg:x12; val_offset:381*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 381*FLEN/8, x13, x9, x10)

inst_149:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b3817 and fs2 == 1 and fe2 == 0x79 and fm2 == 0x401917 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x0c7c6b and fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3b3817; op2val:0xbcc01917;
op3val:0x7c8c7c6b; valaddr_reg:x12; val_offset:384*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:128 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 128, 0, x12, 384*FLEN/8, x13, x9, x10)

inst_150:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff5ec and fs2 == 1 and fe2 == 0x7f and fm2 == 0x103b80 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x223795 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0ff5ec; op2val:0xbf903b80;
op3val:0x7f223795; valaddr_reg:x12; val_offset:387*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 387*FLEN/8, x13, x9, x10)

inst_151:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff5ec and fs2 == 1 and fe2 == 0x7f and fm2 == 0x103b80 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x223795 and fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0ff5ec; op2val:0xbf903b80;
op3val:0x7f223795; valaddr_reg:x12; val_offset:390*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:32 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 32, 0, x12, 390*FLEN/8, x13, x9, x10)
RVTEST_SIGBASE(x9,signature_x9_1)

inst_152:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff5ec and fs2 == 1 and fe2 == 0x7f and fm2 == 0x103b80 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x223795 and fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0ff5ec; op2val:0xbf903b80;
op3val:0x7f223795; valaddr_reg:x12; val_offset:393*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:64 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 64, 0, x12, 393*FLEN/8, x13, x9, x10)

inst_153:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff5ec and fs2 == 1 and fe2 == 0x7f and fm2 == 0x103b80 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x223795 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0ff5ec; op2val:0xbf903b80;
op3val:0x7f223795; valaddr_reg:x12; val_offset:396*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 396*FLEN/8, x13, x9, x10)

inst_154:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff5ec and fs2 == 1 and fe2 == 0x7f and fm2 == 0x103b80 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x223795 and fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0ff5ec; op2val:0xbf903b80;
op3val:0x7f223795; valaddr_reg:x12; val_offset:399*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:128 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 128, 0, x12, 399*FLEN/8, x13, x9, x10)

inst_155:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x5e038c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x2e660b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x173ee9 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c5e038c; op2val:0xc22e660b;
op3val:0x7f173ee9; valaddr_reg:x12; val_offset:402*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 402*FLEN/8, x13, x9, x10)

inst_156:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x5e038c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x2e660b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x173ee9 and fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c5e038c; op2val:0xc22e660b;
op3val:0x7f173ee9; valaddr_reg:x12; val_offset:405*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:32 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 32, 0, x12, 405*FLEN/8, x13, x9, x10)

inst_157:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x5e038c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x2e660b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x173ee9 and fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c5e038c; op2val:0xc22e660b;
op3val:0x7f173ee9; valaddr_reg:x12; val_offset:408*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:64 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 64, 0, x12, 408*FLEN/8, x13, x9, x10)

inst_158:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x5e038c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x2e660b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x173ee9 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c5e038c; op2val:0xc22e660b;
op3val:0x7f173ee9; valaddr_reg:x12; val_offset:411*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 411*FLEN/8, x13, x9, x10)

inst_159:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x5e038c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x2e660b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x173ee9 and fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c5e038c; op2val:0xc22e660b;
op3val:0x7f173ee9; valaddr_reg:x12; val_offset:414*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:128 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 128, 0, x12, 414*FLEN/8, x13, x9, x10)

inst_160:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c9d65 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x4a38ba and fs3 == 0 and fe3 == 0xfd and fm3 == 0x5e26b6 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e8c9d65; op2val:0xbfca38ba;
op3val:0x7ede26b6; valaddr_reg:x12; val_offset:417*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 417*FLEN/8, x13, x9, x10)

inst_161:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c9d65 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x4a38ba and fs3 == 0 and fe3 == 0xfd and fm3 == 0x5e26b6 and fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e8c9d65; op2val:0xbfca38ba;
op3val:0x7ede26b6; valaddr_reg:x12; val_offset:420*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:32 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 32, 0, x12, 420*FLEN/8, x13, x9, x10)

inst_162:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c9d65 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x4a38ba and fs3 == 0 and fe3 == 0xfd and fm3 == 0x5e26b6 and fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e8c9d65; op2val:0xbfca38ba;
op3val:0x7ede26b6; valaddr_reg:x12; val_offset:423*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:64 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 64, 0, x12, 423*FLEN/8, x13, x9, x10)

inst_163:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c9d65 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x4a38ba and fs3 == 0 and fe3 == 0xfd and fm3 == 0x5e26b6 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e8c9d65; op2val:0xbfca38ba;
op3val:0x7ede26b6; valaddr_reg:x12; val_offset:426*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 426*FLEN/8, x13, x9, x10)

inst_164:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c9d65 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x4a38ba and fs3 == 0 and fe3 == 0xfd and fm3 == 0x5e26b6 and fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e8c9d65; op2val:0xbfca38ba;
op3val:0x7ede26b6; valaddr_reg:x12; val_offset:429*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:128 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 128, 0, x12, 429*FLEN/8, x13, x9, x10)

inst_165:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x5f1c44 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x24b4d2 and fs3 == 0 and fe3 == 0xfa and fm3 == 0x0f8bb3 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bdf1c44; op2val:0xc0a4b4d2;
op3val:0x7d0f8bb3; valaddr_reg:x12; val_offset:432*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 432*FLEN/8, x13, x9, x10)

inst_166:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x5f1c44 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x24b4d2 and fs3 == 0 and fe3 == 0xfa and fm3 == 0x0f8bb3 and fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bdf1c44; op2val:0xc0a4b4d2;
op3val:0x7d0f8bb3; valaddr_reg:x12; val_offset:435*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:32 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 32, 0, x12, 435*FLEN/8, x13, x9, x10)

inst_167:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x5f1c44 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x24b4d2 and fs3 == 0 and fe3 == 0xfa and fm3 == 0x0f8bb3 and fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bdf1c44; op2val:0xc0a4b4d2;
op3val:0x7d0f8bb3; valaddr_reg:x12; val_offset:438*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:64 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 64, 0, x12, 438*FLEN/8, x13, x9, x10)

inst_168:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x5f1c44 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x24b4d2 and fs3 == 0 and fe3 == 0xfa and fm3 == 0x0f8bb3 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bdf1c44; op2val:0xc0a4b4d2;
op3val:0x7d0f8bb3; valaddr_reg:x12; val_offset:441*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 441*FLEN/8, x13, x9, x10)

inst_169:
// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x5f1c44 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x24b4d2 and fs3 == 0 and fe3 == 0xfa and fm3 == 0x0f8bb3 and fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7bdf1c44; op2val:0xc0a4b4d2;
op3val:0x7d0f8bb3; valaddr_reg:x12; val_offset:444*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:128 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 128, 0, x12, 444*FLEN/8, x13, x9, x10)

inst_170:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0af237 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28f25d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x376500 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e0af237; op2val:0xc0a8f25d;
op3val:0x7f376500; valaddr_reg:x12; val_offset:447*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 447*FLEN/8, x13, x9, x10)

inst_171:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0af237 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28f25d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x376500 and fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e0af237; op2val:0xc0a8f25d;
op3val:0x7f376500; valaddr_reg:x12; val_offset:450*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:32 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 32, 0, x12, 450*FLEN/8, x13, x9, x10)

inst_172:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0af237 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28f25d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x376500 and fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e0af237; op2val:0xc0a8f25d;
op3val:0x7f376500; valaddr_reg:x12; val_offset:453*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:64 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 64, 0, x12, 453*FLEN/8, x13, x9, x10)

inst_173:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0af237 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28f25d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x376500 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e0af237; op2val:0xc0a8f25d;
op3val:0x7f376500; valaddr_reg:x12; val_offset:456*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 456*FLEN/8, x13, x9, x10)

inst_174:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0af237 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28f25d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x376500 and fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e0af237; op2val:0xc0a8f25d;
op3val:0x7f376500; valaddr_reg:x12; val_offset:459*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:128 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 128, 0, x12, 459*FLEN/8, x13, x9, x10)

inst_175:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x16edbb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x761db3 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x1119f4 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e16edbb; op2val:0xc0761db3;
op3val:0x7f1119f4; valaddr_reg:x12; val_offset:462*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 462*FLEN/8, x13, x9, x10)

inst_176:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x16edbb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x761db3 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x1119f4 and fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e16edbb; op2val:0xc0761db3;
op3val:0x7f1119f4; valaddr_reg:x12; val_offset:465*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:32 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 32, 0, x12, 465*FLEN/8, x13, x9, x10)

inst_177:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x16edbb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x761db3 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x1119f4 and fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e16edbb; op2val:0xc0761db3;
op3val:0x7f1119f4; valaddr_reg:x12; val_offset:468*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:64 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 64, 0, x12, 468*FLEN/8, x13, x9, x10)

inst_178:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x16edbb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x761db3 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x1119f4 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e16edbb; op2val:0xc0761db3;
op3val:0x7f1119f4; valaddr_reg:x12; val_offset:471*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 471*FLEN/8, x13, x9, x10)

inst_179:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x16edbb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x761db3 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x1119f4 and fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e16edbb; op2val:0xc0761db3;
op3val:0x7f1119f4; valaddr_reg:x12; val_offset:474*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:128 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 128, 0, x12, 474*FLEN/8, x13, x9, x10)

inst_180:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x327e6a and fs2 == 1 and fe2 == 0x7f and fm2 == 0x01b4a9 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x34df56 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f327e6a; op2val:0xbf81b4a9;
op3val:0x7f34df56; valaddr_reg:x12; val_offset:477*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 477*FLEN/8, x13, x9, x10)

inst_181:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x327e6a and fs2 == 1 and fe2 == 0x7f and fm2 == 0x01b4a9 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x34df56 and fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f327e6a; op2val:0xbf81b4a9;
op3val:0x7f34df56; valaddr_reg:x12; val_offset:480*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:32 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 32, 0, x12, 480*FLEN/8, x13, x9, x10)

inst_182:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x327e6a and fs2 == 1 and fe2 == 0x7f and fm2 == 0x01b4a9 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x34df56 and fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f327e6a; op2val:0xbf81b4a9;
op3val:0x7f34df56; valaddr_reg:x12; val_offset:483*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:64 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 64, 0, x12, 483*FLEN/8, x13, x9, x10)

inst_183:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x327e6a and fs2 == 1 and fe2 == 0x7f and fm2 == 0x01b4a9 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x34df56 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f327e6a; op2val:0xbf81b4a9;
op3val:0x7f34df56; valaddr_reg:x12; val_offset:486*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 486*FLEN/8, x13, x9, x10)

inst_184:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x327e6a and fs2 == 1 and fe2 == 0x7f and fm2 == 0x01b4a9 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x34df56 and fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f327e6a; op2val:0xbf81b4a9;
op3val:0x7f34df56; valaddr_reg:x12; val_offset:489*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:128 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 128, 0, x12, 489*FLEN/8, x13, x9, x10)

inst_185:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x043e1b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x03dea5 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x083d97 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e843e1b; op2val:0xbf83dea5;
op3val:0x7e883d97; valaddr_reg:x12; val_offset:492*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 492*FLEN/8, x13, x9, x10)

inst_186:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x043e1b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x03dea5 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x083d97 and fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e843e1b; op2val:0xbf83dea5;
op3val:0x7e883d97; valaddr_reg:x12; val_offset:495*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:32 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 32, 0, x12, 495*FLEN/8, x13, x9, x10)

inst_187:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x043e1b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x03dea5 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x083d97 and fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e843e1b; op2val:0xbf83dea5;
op3val:0x7e883d97; valaddr_reg:x12; val_offset:498*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:64 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 64, 0, x12, 498*FLEN/8, x13, x9, x10)

inst_188:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x043e1b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x03dea5 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x083d97 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e843e1b; op2val:0xbf83dea5;
op3val:0x7e883d97; valaddr_reg:x12; val_offset:501*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 501*FLEN/8, x13, x9, x10)

inst_189:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x043e1b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x03dea5 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x083d97 and fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e843e1b; op2val:0xbf83dea5;
op3val:0x7e883d97; valaddr_reg:x12; val_offset:504*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:128 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 128, 0, x12, 504*FLEN/8, x13, x9, x10)

inst_190:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x497c49 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3d34f5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x14ea70 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec97c49; op2val:0xbfbd34f5;
op3val:0x7f14ea70; valaddr_reg:x12; val_offset:507*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 507*FLEN/8, x13, x9, x10)

inst_191:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x497c49 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3d34f5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x14ea70 and fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec97c49; op2val:0xbfbd34f5;
op3val:0x7f14ea70; valaddr_reg:x12; val_offset:510*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:32 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 32, 0, x12, 510*FLEN/8, x13, x9, x10)

inst_192:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x497c49 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3d34f5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x14ea70 and fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec97c49; op2val:0xbfbd34f5;
op3val:0x7f14ea70; valaddr_reg:x12; val_offset:513*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:64 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 64, 0, x12, 513*FLEN/8, x13, x9, x10)

inst_193:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x497c49 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3d34f5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x14ea70 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec97c49; op2val:0xbfbd34f5;
op3val:0x7f14ea70; valaddr_reg:x12; val_offset:516*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 516*FLEN/8, x13, x9, x10)

inst_194:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x497c49 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3d34f5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x14ea70 and fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec97c49; op2val:0xbfbd34f5;
op3val:0x7f14ea70; valaddr_reg:x12; val_offset:519*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:128 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 128, 0, x12, 519*FLEN/8, x13, x9, x10)

inst_195:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x25f81d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x5da39a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0fb142 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da5f81d; op2val:0xc0dda39a;
op3val:0x7f0fb142; valaddr_reg:x12; val_offset:522*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 522*FLEN/8, x13, x9, x10)

inst_196:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x25f81d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x5da39a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0fb142 and fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da5f81d; op2val:0xc0dda39a;
op3val:0x7f0fb142; valaddr_reg:x12; val_offset:525*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:32 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 32, 0, x12, 525*FLEN/8, x13, x9, x10)

inst_197:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x25f81d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x5da39a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0fb142 and fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da5f81d; op2val:0xc0dda39a;
op3val:0x7f0fb142; valaddr_reg:x12; val_offset:528*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:64 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 64, 0, x12, 528*FLEN/8, x13, x9, x10)

inst_198:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x25f81d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x5da39a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0fb142 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da5f81d; op2val:0xc0dda39a;
op3val:0x7f0fb142; valaddr_reg:x12; val_offset:531*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 531*FLEN/8, x13, x9, x10)

inst_199:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x25f81d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x5da39a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0fb142 and fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da5f81d; op2val:0xc0dda39a;
op3val:0x7f0fb142; valaddr_reg:x12; val_offset:534*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:128 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 128, 0, x12, 534*FLEN/8, x13, x9, x10)

inst_200:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191148 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x0a0793 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x250fb1 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f191148; op2val:0xbf8a0793;
op3val:0x7f250fb1; valaddr_reg:x12; val_offset:537*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 537*FLEN/8, x13, x9, x10)

inst_201:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191148 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x0a0793 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x250fb1 and fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f191148; op2val:0xbf8a0793;
op3val:0x7f250fb1; valaddr_reg:x12; val_offset:540*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:32 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 32, 0, x12, 540*FLEN/8, x13, x9, x10)

inst_202:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191148 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x0a0793 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x250fb1 and fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f191148; op2val:0xbf8a0793;
op3val:0x7f250fb1; valaddr_reg:x12; val_offset:543*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:64 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 64, 0, x12, 543*FLEN/8, x13, x9, x10)

inst_203:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191148 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x0a0793 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x250fb1 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f191148; op2val:0xbf8a0793;
op3val:0x7f250fb1; valaddr_reg:x12; val_offset:546*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 546*FLEN/8, x13, x9, x10)

inst_204:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191148 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x0a0793 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x250fb1 and fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f191148; op2val:0xbf8a0793;
op3val:0x7f250fb1; valaddr_reg:x12; val_offset:549*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:128 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 128, 0, x12, 549*FLEN/8, x13, x9, x10)

inst_205:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x61107d and fs2 == 1 and fe2 == 0x83 and fm2 == 0x4e8dd6 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3597f8 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ce1107d; op2val:0xc1ce8dd6;
op3val:0x7f3597f8; valaddr_reg:x12; val_offset:552*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 552*FLEN/8, x13, x9, x10)

inst_206:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x61107d and fs2 == 1 and fe2 == 0x83 and fm2 == 0x4e8dd6 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3597f8 and fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ce1107d; op2val:0xc1ce8dd6;
op3val:0x7f3597f8; valaddr_reg:x12; val_offset:555*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:32 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 32, 0, x12, 555*FLEN/8, x13, x9, x10)

inst_207:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x61107d and fs2 == 1 and fe2 == 0x83 and fm2 == 0x4e8dd6 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3597f8 and fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ce1107d; op2val:0xc1ce8dd6;
op3val:0x7f3597f8; valaddr_reg:x12; val_offset:558*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:64 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 64, 0, x12, 558*FLEN/8, x13, x9, x10)

inst_208:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x61107d and fs2 == 1 and fe2 == 0x83 and fm2 == 0x4e8dd6 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3597f8 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ce1107d; op2val:0xc1ce8dd6;
op3val:0x7f3597f8; valaddr_reg:x12; val_offset:561*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 561*FLEN/8, x13, x9, x10)

inst_209:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x61107d and fs2 == 1 and fe2 == 0x83 and fm2 == 0x4e8dd6 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3597f8 and fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ce1107d; op2val:0xc1ce8dd6;
op3val:0x7f3597f8; valaddr_reg:x12; val_offset:564*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:128 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 128, 0, x12, 564*FLEN/8, x13, x9, x10)

inst_210:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c0d61 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x6f2b41 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x02d828 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d8c0d61; op2val:0xc06f2b41;
op3val:0x7e82d828; valaddr_reg:x12; val_offset:567*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 567*FLEN/8, x13, x9, x10)

inst_211:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c0d61 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x6f2b41 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x02d828 and fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d8c0d61; op2val:0xc06f2b41;
op3val:0x7e82d828; valaddr_reg:x12; val_offset:570*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:32 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 32, 0, x12, 570*FLEN/8, x13, x9, x10)

inst_212:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c0d61 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x6f2b41 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x02d828 and fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d8c0d61; op2val:0xc06f2b41;
op3val:0x7e82d828; valaddr_reg:x12; val_offset:573*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:64 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 64, 0, x12, 573*FLEN/8, x13, x9, x10)

inst_213:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c0d61 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x6f2b41 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x02d828 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d8c0d61; op2val:0xc06f2b41;
op3val:0x7e82d828; valaddr_reg:x12; val_offset:576*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 576*FLEN/8, x13, x9, x10)

inst_214:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c0d61 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x6f2b41 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x02d828 and fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d8c0d61; op2val:0xc06f2b41;
op3val:0x7e82d828; valaddr_reg:x12; val_offset:579*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:128 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 128, 0, x12, 579*FLEN/8, x13, x9, x10)

inst_215:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a8ec9 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x406305 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3045d1 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eea8ec9; op2val:0xbfc06305;
op3val:0x7f3045d1; valaddr_reg:x12; val_offset:582*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 582*FLEN/8, x13, x9, x10)

inst_216:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a8ec9 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x406305 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3045d1 and fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eea8ec9; op2val:0xbfc06305;
op3val:0x7f3045d1; valaddr_reg:x12; val_offset:585*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:32 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 32, 0, x12, 585*FLEN/8, x13, x9, x10)

inst_217:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a8ec9 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x406305 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3045d1 and fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eea8ec9; op2val:0xbfc06305;
op3val:0x7f3045d1; valaddr_reg:x12; val_offset:588*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:64 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 64, 0, x12, 588*FLEN/8, x13, x9, x10)

inst_218:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a8ec9 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x406305 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3045d1 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eea8ec9; op2val:0xbfc06305;
op3val:0x7f3045d1; valaddr_reg:x12; val_offset:591*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 591*FLEN/8, x13, x9, x10)

inst_219:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a8ec9 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x406305 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3045d1 and fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eea8ec9; op2val:0xbfc06305;
op3val:0x7f3045d1; valaddr_reg:x12; val_offset:594*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:128 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 128, 0, x12, 594*FLEN/8, x13, x9, x10)

inst_220:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f31b9 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x186e02 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0e6c50 and fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eef31b9; op2val:0xbf986e02;
op3val:0x7f0e6c50; valaddr_reg:x12; val_offset:597*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:32 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 32, 0, x12, 597*FLEN/8, x13, x9, x10)

inst_221:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f31b9 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x186e02 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0e6c50 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eef31b9; op2val:0xbf986e02;
op3val:0x7f0e6c50; valaddr_reg:x12; val_offset:600*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 600*FLEN/8, x13, x9, x10)

inst_222:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ad5a and fs2 == 1 and fe2 == 0x7f and fm2 == 0x17b417 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x34f350 and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f18ad5a; op2val:0xbf97b417;
op3val:0x7f34f350; valaddr_reg:x12; val_offset:603*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 603*FLEN/8, x13, x9, x10)

inst_223:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ad5a and fs2 == 1 and fe2 == 0x7f and fm2 == 0x17b417 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x34f350 and fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f18ad5a; op2val:0xbf97b417;
op3val:0x7f34f350; valaddr_reg:x12; val_offset:606*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:32 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 32, 0, x12, 606*FLEN/8, x13, x9, x10)

inst_224:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ad5a and fs2 == 1 and fe2 == 0x7f and fm2 == 0x17b417 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x34f350 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f18ad5a; op2val:0xbf97b417;
op3val:0x7f34f350; valaddr_reg:x12; val_offset:609*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 609*FLEN/8, x13, x9, x10)

inst_225:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ad5a and fs2 == 1 and fe2 == 0x7f and fm2 == 0x17b417 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x34f350 and fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f18ad5a; op2val:0xbf97b417;
op3val:0x7f34f350; valaddr_reg:x12; val_offset:612*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:128 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 128, 0, x12, 612*FLEN/8, x13, x9, x10)

inst_226:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e0f7e and fs2 == 1 and fe2 == 0x7f and fm2 == 0x1f8f25 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x31161d and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0e0f7e; op2val:0xbf9f8f25;
op3val:0x7f31161d; valaddr_reg:x12; val_offset:615*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 0, 0, x12, 615*FLEN/8, x13, x9, x10)

inst_227:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e0f7e and fs2 == 1 and fe2 == 0x7f and fm2 == 0x1f8f25 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x31161d and fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0e0f7e; op2val:0xbf9f8f25;
op3val:0x7f31161d; valaddr_reg:x12; val_offset:618*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:32 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 32, 0, x12, 618*FLEN/8, x13, x9, x10)

inst_228:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf90f and fs2 == 1 and fe2 == 0x7c and fm2 == 0x00acab and fs3 == 0 and fe3 == 0xfb and fm3 == 0x2de265 and fcsr == 0x80 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2cf90f; op2val:0xbe00acab;
op3val:0x7dade265; valaddr_reg:x12; val_offset:621*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:128 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 128, 0, x12, 621*FLEN/8, x13, x9, x10)

inst_229:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x341f5c and fs2 == 1 and fe2 == 0x7e and fm2 == 0x0691ee and fs3 == 0 and fe3 == 0xfc and fm3 == 0x3d5e30 and fcsr == 0x20 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb41f5c; op2val:0xbf0691ee;
op3val:0x7e3d5e30; valaddr_reg:x12; val_offset:624*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:32 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 32, 0, x12, 624*FLEN/8, x13, x9, x10)

inst_230:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x341f5c and fs2 == 1 and fe2 == 0x7e and fm2 == 0x0691ee and fs3 == 0 and fe3 == 0xfc and fm3 == 0x3d5e30 and fcsr == 0x60 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb41f5c; op2val:0xbf0691ee;
op3val:0x7e3d5e30; valaddr_reg:x12; val_offset:627*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:96 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 96, 0, x12, 627*FLEN/8, x13, x9, x10)

inst_231:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50cddd and fs2 == 1 and fe2 == 0x7f and fm2 == 0x071ab8 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x5c64b6 and fcsr == 0x40 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0xffffffff and rs3_sgn_prefix == 0x00000000  
/* opcode: fmadd.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed0cddd; op2val:0xbf871ab8;
op3val:0x7edc64b6; valaddr_reg:x12; val_offset:630*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:64 */
TEST_FPR4_OP(fmadd.s, x31, x30, x29, x28, dyn, 64, 0, x12, 630*FLEN/8, x13, x9, x10)
#endif


RVTEST_CODE_END
RVMODEL_HALT

RVTEST_DATA_BEGIN
.align 4
rvtest_data:
.word 0xbabecafe
.word 0xabecafeb
.word 0xbecafeba
.word 0xecafebab
test_dataset_0:
NAN_BOXED(2129605049,64,FLEN)
NAN_BOXED(3214437890,32,FLEN)
NAN_BOXED(2131651664,64,FLEN)
NAN_BOXED(2129605049,64,FLEN)
NAN_BOXED(2129605049,32,FLEN)
NAN_BOXED(2129605049,64,FLEN)
NAN_BOXED(2129605049,64,FLEN)
NAN_BOXED(3214437890,32,FLEN)
NAN_BOXED(2131651664,64,FLEN)
NAN_BOXED(2129605049,64,FLEN)
NAN_BOXED(3214437890,32,FLEN)
NAN_BOXED(2129605049,64,FLEN)
NAN_BOXED(2129605049,64,FLEN)
NAN_BOXED(3214437890,32,FLEN)
NAN_BOXED(2131651664,64,FLEN)
NAN_BOXED(2132323674,64,FLEN)
NAN_BOXED(3214390295,32,FLEN)
NAN_BOXED(3214390295,64,FLEN)
NAN_BOXED(2132323674,64,FLEN)
NAN_BOXED(3214390295,32,FLEN)
NAN_BOXED(3214390295,64,FLEN)
NAN_BOXED(2132323674,64,FLEN)
NAN_BOXED(3214390295,32,FLEN)
NAN_BOXED(2134176592,64,FLEN)
NAN_BOXED(2132323674,64,FLEN)
NAN_BOXED(2132323674,32,FLEN)
NAN_BOXED(2134176592,64,FLEN)
NAN_BOXED(2132323674,64,FLEN)
NAN_BOXED(3214390295,32,FLEN)
NAN_BOXED(2132323674,64,FLEN)
NAN_BOXED(2131627902,64,FLEN)
NAN_BOXED(2131627902,32,FLEN)
NAN_BOXED(2131627902,64,FLEN)
NAN_BOXED(2131627902,64,FLEN)
NAN_BOXED(2131627902,32,FLEN)
NAN_BOXED(2133923357,64,FLEN)
NAN_BOXED(2131627902,64,FLEN)
NAN_BOXED(3214905125,32,FLEN)
NAN_BOXED(2133923357,64,FLEN)
NAN_BOXED(2131627902,64,FLEN)
NAN_BOXED(3214905125,32,FLEN)
NAN_BOXED(2133923357,64,FLEN)
NAN_BOXED(2131627902,64,FLEN)
NAN_BOXED(3214905125,32,FLEN)
NAN_BOXED(2133923357,64,FLEN)
NAN_BOXED(2092053831,64,FLEN)
NAN_BOXED(3246419114,32,FLEN)
NAN_BOXED(2125646993,64,FLEN)
NAN_BOXED(2092053831,64,FLEN)
NAN_BOXED(3246419114,32,FLEN)
NAN_BOXED(2125646993,64,FLEN)
NAN_BOXED(2092053831,64,FLEN)
NAN_BOXED(3246419114,32,FLEN)
NAN_BOXED(2125646993,64,FLEN)
NAN_BOXED(2092053831,64,FLEN)
NAN_BOXED(3246419114,32,FLEN)
NAN_BOXED(2125646993,64,FLEN)
NAN_BOXED(2092053831,64,FLEN)
NAN_BOXED(3246419114,32,FLEN)
NAN_BOXED(2125646993,64,FLEN)
NAN_BOXED(2134187998,64,FLEN)
NAN_BOXED(3207601396,32,FLEN)
NAN_BOXED(2130261194,64,FLEN)
test_dataset_1:
NAN_BOXED(2134187998,32,FLEN)
NAN_BOXED(3207601396,32,FLEN)
NAN_BOXED(2130261194,32,FLEN)
NAN_BOXED(2134187998,32,FLEN)
NAN_BOXED(3207601396,32,FLEN)
NAN_BOXED(2130261194,32,FLEN)
NAN_BOXED(2134187998,32,FLEN)
NAN_BOXED(3207601396,32,FLEN)
NAN_BOXED(2130261194,32,FLEN)
NAN_BOXED(2134187998,32,FLEN)
NAN_BOXED(3207601396,32,FLEN)
NAN_BOXED(2130261194,32,FLEN)
NAN_BOXED(2133653775,32,FLEN)
NAN_BOXED(3187715243,32,FLEN)
NAN_BOXED(2108547685,32,FLEN)
NAN_BOXED(2133653775,32,FLEN)
NAN_BOXED(3187715243,32,FLEN)
NAN_BOXED(2108547685,32,FLEN)
NAN_BOXED(2133653775,32,FLEN)
NAN_BOXED(3187715243,32,FLEN)
NAN_BOXED(2108547685,32,FLEN)
NAN_BOXED(2133653775,32,FLEN)
NAN_BOXED(3187715243,32,FLEN)
NAN_BOXED(2108547685,32,FLEN)
NAN_BOXED(2133653775,32,FLEN)
NAN_BOXED(3187715243,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(2125733724,32,FLEN)
NAN_BOXED(3204878830,32,FLEN)
NAN_BOXED(2117951024,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(3204878830,32,FLEN)
NAN_BOXED(2117951024,32,FLEN)
NAN_BOXED(2125733724,32,FLEN)
NAN_BOXED(3204878830,32,FLEN)
NAN_BOXED(2117951024,32,FLEN)
NAN_BOXED(2125733724,32,FLEN)
NAN_BOXED(0,32,FLEN)
NAN_BOXED(2117951024,32,FLEN)
NAN_BOXED(2125733724,32,FLEN)
NAN_BOXED(3204878830,32,FLEN)
NAN_BOXED(2117951024,32,FLEN)
NAN_BOXED(2127613405,32,FLEN)
NAN_BOXED(3213302456,32,FLEN)
NAN_BOXED(2128372918,32,FLEN)
NAN_BOXED(2127613405,32,FLEN)
NAN_BOXED(3213302456,32,FLEN)
NAN_BOXED(2128372918,32,FLEN)
NAN_BOXED(2127613405,32,FLEN)
NAN_BOXED(3213302456,32,FLEN)
NAN_BOXED(2128372918,32,FLEN)
NAN_BOXED(2127613405,32,FLEN)
NAN_BOXED(3213302456,32,FLEN)
NAN_BOXED(2128372918,32,FLEN)
NAN_BOXED(2127613405,32,FLEN)
NAN_BOXED(3213302456,32,FLEN)
NAN_BOXED(2128372918,32,FLEN)
NAN_BOXED(2082547115,32,FLEN)
NAN_BOXED(3246667259,32,FLEN)
NAN_BOXED(2116448975,32,FLEN)
NAN_BOXED(2082547115,32,FLEN)
NAN_BOXED(3246667259,32,FLEN)
NAN_BOXED(2116448975,32,FLEN)
NAN_BOXED(2082547115,32,FLEN)
NAN_BOXED(3246667259,32,FLEN)
NAN_BOXED(2116448975,32,FLEN)
NAN_BOXED(2082547115,32,FLEN)
NAN_BOXED(3246667259,32,FLEN)
NAN_BOXED(2116448975,32,FLEN)
NAN_BOXED(2082547115,32,FLEN)
NAN_BOXED(3246667259,32,FLEN)
NAN_BOXED(2116448975,32,FLEN)
NAN_BOXED(2119607415,32,FLEN)
NAN_BOXED(3226588826,32,FLEN)
NAN_BOXED(2133848116,32,FLEN)
NAN_BOXED(2119607415,32,FLEN)
NAN_BOXED(3226588826,32,FLEN)
NAN_BOXED(2133848116,32,FLEN)
NAN_BOXED(2119607415,32,FLEN)
NAN_BOXED(3226588826,32,FLEN)
NAN_BOXED(2133848116,32,FLEN)
NAN_BOXED(2119607415,32,FLEN)
NAN_BOXED(3226588826,32,FLEN)
NAN_BOXED(2133848116,32,FLEN)
NAN_BOXED(2119607415,32,FLEN)
NAN_BOXED(3226588826,32,FLEN)
NAN_BOXED(2133848116,32,FLEN)
NAN_BOXED(2131952879,32,FLEN)
NAN_BOXED(3193270288,32,FLEN)
NAN_BOXED(2113218285,32,FLEN)
NAN_BOXED(2131952879,32,FLEN)
NAN_BOXED(3193270288,32,FLEN)
NAN_BOXED(2113218285,32,FLEN)
NAN_BOXED(2131952879,32,FLEN)
NAN_BOXED(3193270288,32,FLEN)
NAN_BOXED(2113218285,32,FLEN)
NAN_BOXED(2131952879,32,FLEN)
NAN_BOXED(3193270288,32,FLEN)
NAN_BOXED(2113218285,32,FLEN)
NAN_BOXED(2131952879,32,FLEN)
NAN_BOXED(3193270288,32,FLEN)
NAN_BOXED(2113218285,32,FLEN)
NAN_BOXED(2132348254,32,FLEN)
NAN_BOXED(3190964748,32,FLEN)
NAN_BOXED(2111120785,32,FLEN)
NAN_BOXED(2132348254,32,FLEN)
NAN_BOXED(3190964748,32,FLEN)
NAN_BOXED(2111120785,32,FLEN)
NAN_BOXED(2132348254,32,FLEN)
NAN_BOXED(3190964748,32,FLEN)
NAN_BOXED(2111120785,32,FLEN)
NAN_BOXED(2132348254,32,FLEN)
NAN_BOXED(3190964748,32,FLEN)
NAN_BOXED(2111120785,32,FLEN)
NAN_BOXED(2132348254,32,FLEN)
NAN_BOXED(3190964748,32,FLEN)
NAN_BOXED(2111120785,32,FLEN)
NAN_BOXED(2129467916,32,FLEN)
NAN_BOXED(3193052950,32,FLEN)
NAN_BOXED(2109905961,32,FLEN)
NAN_BOXED(2129467916,32,FLEN)
NAN_BOXED(3193052950,32,FLEN)
NAN_BOXED(2109905961,32,FLEN)
NAN_BOXED(2129467916,32,FLEN)
NAN_BOXED(3193052950,32,FLEN)
NAN_BOXED(2109905961,32,FLEN)
NAN_BOXED(2129467916,32,FLEN)
NAN_BOXED(3193052950,32,FLEN)
NAN_BOXED(2109905961,32,FLEN)
NAN_BOXED(2129467916,32,FLEN)
NAN_BOXED(3193052950,32,FLEN)
NAN_BOXED(2109905961,32,FLEN)
NAN_BOXED(2058254814,32,FLEN)
NAN_BOXED(3287645236,32,FLEN)
NAN_BOXED(2133282632,32,FLEN)
NAN_BOXED(2058254814,32,FLEN)
NAN_BOXED(3287645236,32,FLEN)
NAN_BOXED(2133282632,32,FLEN)
NAN_BOXED(2058254814,32,FLEN)
NAN_BOXED(3287645236,32,FLEN)
NAN_BOXED(2133282632,32,FLEN)
NAN_BOXED(2058254814,32,FLEN)
NAN_BOXED(3287645236,32,FLEN)
NAN_BOXED(2133282632,32,FLEN)
NAN_BOXED(2058254814,32,FLEN)
NAN_BOXED(3287645236,32,FLEN)
NAN_BOXED(2133282632,32,FLEN)
NAN_BOXED(2116082892,32,FLEN)
NAN_BOXED(3213078153,32,FLEN)
NAN_BOXED(2116386129,32,FLEN)
NAN_BOXED(2116082892,32,FLEN)
NAN_BOXED(3213078153,32,FLEN)
NAN_BOXED(2116386129,32,FLEN)
NAN_BOXED(2116082892,32,FLEN)
NAN_BOXED(3213078153,32,FLEN)
NAN_BOXED(2116386129,32,FLEN)
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NAN_BOXED(2132323674,32,FLEN)
NAN_BOXED(3214390295,32,FLEN)
NAN_BOXED(2134176592,32,FLEN)
NAN_BOXED(2132323674,32,FLEN)
NAN_BOXED(3214390295,32,FLEN)
NAN_BOXED(2134176592,32,FLEN)
NAN_BOXED(2132323674,32,FLEN)
NAN_BOXED(3214390295,32,FLEN)
NAN_BOXED(2134176592,32,FLEN)
NAN_BOXED(2132323674,32,FLEN)
NAN_BOXED(3214390295,32,FLEN)
NAN_BOXED(2134176592,32,FLEN)
NAN_BOXED(2131627902,32,FLEN)
NAN_BOXED(3214905125,32,FLEN)
NAN_BOXED(2133923357,32,FLEN)
NAN_BOXED(2131627902,32,FLEN)
NAN_BOXED(3214905125,32,FLEN)
NAN_BOXED(2133923357,32,FLEN)
NAN_BOXED(2133653775,32,FLEN)
NAN_BOXED(3187715243,32,FLEN)
NAN_BOXED(2108547685,32,FLEN)
NAN_BOXED(2125733724,32,FLEN)
NAN_BOXED(3204878830,32,FLEN)
NAN_BOXED(2117951024,32,FLEN)
NAN_BOXED(2125733724,32,FLEN)
NAN_BOXED(3204878830,32,FLEN)
NAN_BOXED(2117951024,32,FLEN)
NAN_BOXED(2127613405,32,FLEN)
NAN_BOXED(3213302456,32,FLEN)
NAN_BOXED(2128372918,32,FLEN)
RVTEST_DATA_END

RVMODEL_DATA_BEGIN
rvtest_sig_begin:
sig_begin_canary:
CANARY;



signature_x1_0:
    .fill 0*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_1:
    .fill 48*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_0:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_1:
    .fill 160*((SIGALIGN)/4),4,0xdeadbeef

#ifdef rvtest_mtrap_routine
tsig_begin_canary:
CANARY;

mtrap_sigptr:
    .fill 64*XLEN/32,4,0xdeadbeef

tsig_end_canary:
CANARY;
#endif

#ifdef rvtest_gpr_save

gpr_save:
    .fill 32*XLEN/32,4,0xdeadbeef

#endif


sig_end_canary:
CANARY;
rvtest_sig_end:
RVMODEL_DATA_END
