
// -----------
// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg)
// version   : 0.11.0
// timestamp : Mon Feb  5 07:40:16 2024 GMT
// usage     : riscv_ctg \
//                  -- cgf //                  --cgf /home/riscv/riscv-ctg/sample_cgfs/dataset.cgf \
//                  --cgf /home/riscv/riscv-ctg/sample_cgfs/sample_cgfs_fext/RV64Zfinx/fnmsub.s.cgf \
 \
//                  -- xlen 64  \
// -----------
//
// -----------
// Copyright (c) 2020. RISC-V International. All rights reserved.
// SPDX-License-Identifier: BSD-3-Clause
// -----------
//
// This assembly file tests the fnmsub.s instruction of the RISC-V RV64_Zfinx,RV64_Zdinx extension for the fnmsub_b17 covergroup.
// 
#include "model_test.h"
#include "arch_test.h"
RVTEST_ISA("RV64I_Zfinx,RV64I_Zdinx")

.section .text.init
.globl rvtest_entry_point
rvtest_entry_point:
RVMODEL_BOOT
RVTEST_CODE_BEGIN

#ifdef TEST_CASE_1

RVTEST_CASE(0,"//check ISA:=regex(.*I.*Zfinx.*);def TEST_CASE_1=True;",fnmsub_b17)

RVTEST_FP_ENABLE()
RVTEST_VALBASEUPD(x3,test_dataset_0)
RVTEST_SIGBASE(x1,signature_x1_1)

inst_0:
// rs2 == rd != rs1 and rs2 == rd != rs3 and rs3 != rs1, rs1==x30, rs2==x31, rs3==x29, rd==x31,fs1 == 0 and fe1 == 0xfc and fm1 == 0x36c1bf and fs2 == 0 and fe2 == 0xfd and fm2 == 0x50fbe8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x31; op3:x29; dest:x31; op1val:0x7e36c1bf; op2val:0x7ed0fbe8;
op3val:0x7f7fffff; valaddr_reg:x3; val_offset:0*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x31, x29, dyn, 0, 0, x3, 0*FLEN/8, x4, x1, x2)

inst_1:
// rs1 == rd != rs2 and rs1 == rd != rs3 and rs3 != rs2, rs1==x29, rs2==x30, rs3==x31, rd==x29,fs1 == 0 and fe1 == 0xfd and fm1 == 0x67e7c0 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x7046ce and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x29; op2:x30; op3:x31; dest:x29; op1val:0x7ee7e7c0; op2val:0x7ef046ce;
op3val:0x7f7fffff; valaddr_reg:x3; val_offset:3*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x29, x29, x30, x31, dyn, 0, 0, x3, 3*FLEN/8, x4, x1, x2)

inst_2:
// rs1 == rs2 == rd != rs3, rs1==x28, rs2==x28, rs3==x30, rd==x28,fs1 == 0 and fe1 == 0xf8 and fm1 == 0x21ceeb and fs2 == 0 and fe2 == 0xfe and fm2 == 0x20cb47 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x28; op2:x28; op3:x30; dest:x28; op1val:0x7c21ceeb; op2val:0x7c21ceeb;
op3val:0x7f7fffff; valaddr_reg:x3; val_offset:6*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x28, x28, x28, x30, dyn, 0, 0, x3, 6*FLEN/8, x4, x1, x2)

inst_3:
// rd == rs2 == rs3 != rs1, rs1==x31, rs2==x27, rs3==x27, rd==x27,fs1 == 0 and fe1 == 0xfc and fm1 == 0x33f756 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x3f29ee and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x31; op2:x27; op3:x27; dest:x27; op1val:0x7e33f756; op2val:0x7f3f29ee;
op3val:0x7f3f29ee; valaddr_reg:x3; val_offset:9*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x27, x31, x27, x27, dyn, 0, 0, x3, 9*FLEN/8, x4, x1, x2)

inst_4:
// rs1 == rs2 == rs3 != rd, rs1==x26, rs2==x26, rs3==x26, rd==x30,fs1 == 0 and fe1 == 0xfe and fm1 == 0x2099c0 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x36eb6c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x26; op2:x26; op3:x26; dest:x30; op1val:0x7f2099c0; op2val:0x7f2099c0;
op3val:0x7f2099c0; valaddr_reg:x3; val_offset:12*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x30, x26, x26, x26, dyn, 0, 0, x3, 12*FLEN/8, x4, x1, x2)

inst_5:
// rs1 == rs3 != rs2 and rs1 == rs3 != rd and rd != rs2, rs1==x25, rs2==x29, rs3==x25, rd==x26,fs1 == 0 and fe1 == 0xfb and fm1 == 0x6758c9 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x73c956 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x25; op2:x29; op3:x25; dest:x26; op1val:0x7de758c9; op2val:0x7ef3c956;
op3val:0x7de758c9; valaddr_reg:x3; val_offset:15*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x26, x25, x29, x25, dyn, 0, 0, x3, 15*FLEN/8, x4, x1, x2)

inst_6:
// rs2 == rs3 != rs1 and rs2 == rs3 != rd and rd != rs1, rs1==x27, rs2==x24, rs3==x24, rd==x25,fs1 == 0 and fe1 == 0xfd and fm1 == 0x48e6cd and fs2 == 0 and fe2 == 0xfe and fm2 == 0x0e5202 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x27; op2:x24; op3:x24; dest:x25; op1val:0x7ec8e6cd; op2val:0x7f0e5202;
op3val:0x7f0e5202; valaddr_reg:x3; val_offset:18*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x25, x27, x24, x24, dyn, 0, 0, x3, 18*FLEN/8, x4, x1, x2)

inst_7:
// rs1 == rd == rs3 != rs2, rs1==x23, rs2==x25, rs3==x23, rd==x23,fs1 == 0 and fe1 == 0xfa and fm1 == 0x44b45e and fs2 == 0 and fe2 == 0xfe and fm2 == 0x119488 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x23; op2:x25; op3:x23; dest:x23; op1val:0x7d44b45e; op2val:0x7f119488;
op3val:0x7d44b45e; valaddr_reg:x3; val_offset:21*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x23, x23, x25, x23, dyn, 0, 0, x3, 21*FLEN/8, x4, x1, x2)

inst_8:
// rs1 == rs2 == rs3 == rd, rs1==x22, rs2==x22, rs3==x22, rd==x22,fs1 == 0 and fe1 == 0xfc and fm1 == 0x675fa1 and fs2 == 0 and fe2 == 0xf9 and fm2 == 0x3e8943 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x22; op2:x22; op3:x22; dest:x22; op1val:0x7e675fa1; op2val:0x7e675fa1;
op3val:0x7e675fa1; valaddr_reg:x3; val_offset:24*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x22, x22, x22, x22, dyn, 0, 0, x3, 24*FLEN/8, x4, x1, x2)

inst_9:
// rs3 == rd != rs1 and rs3 == rd != rs2 and rs2 != rs1, rs1==x24, rs2==x23, rs3==x21, rd==x21,fs1 == 0 and fe1 == 0xfd and fm1 == 0x35891f and fs2 == 0 and fe2 == 0xfe and fm2 == 0x0a03a1 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x24; op2:x23; op3:x21; dest:x21; op1val:0x7eb5891f; op2val:0x7f0a03a1;
op3val:0x7f7fffff; valaddr_reg:x3; val_offset:27*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x21, x24, x23, x21, dyn, 0, 0, x3, 27*FLEN/8, x4, x1, x2)

inst_10:
// rs1 != rs2 and rs1 != rd and rs1 != rs3 and rs2 != rs3 and rs2 != rd and rs3 != rd, rs1==x21, rs2==x20, rs3==x28, rd==x24,fs1 == 0 and fe1 == 0xfe and fm1 == 0x091ce4 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x30d9d7 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x21; op2:x20; op3:x28; dest:x24; op1val:0x7f091ce4; op2val:0x7f30d9d7;
op3val:0x7f7fffff; valaddr_reg:x3; val_offset:30*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x24, x21, x20, x28, dyn, 0, 0, x3, 30*FLEN/8, x4, x1, x2)

inst_11:
// rs1 == rs2 != rs3 and rs1 == rs2 != rd and rd != rs3, rs1==x19, rs2==x19, rs3==x18, rd==x20,fs1 == 0 and fe1 == 0xfe and fm1 == 0x19c644 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x2abc06 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x19; op2:x19; op3:x18; dest:x20; op1val:0x7f19c644; op2val:0x7f19c644;
op3val:0x7f7fffff; valaddr_reg:x3; val_offset:33*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x20, x19, x19, x18, dyn, 0, 0, x3, 33*FLEN/8, x4, x1, x2)

inst_12:
// rs1==x18, rs2==x21, rs3==x20, rd==x19,fs1 == 0 and fe1 == 0xfe and fm1 == 0x28be0d and fs2 == 0 and fe2 == 0xfb and fm2 == 0x15b097 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x18; op2:x21; op3:x20; dest:x19; op1val:0x7f28be0d; op2val:0x7d95b097;
op3val:0x7f7fffff; valaddr_reg:x3; val_offset:36*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x19, x18, x21, x20, dyn, 0, 0, x3, 36*FLEN/8, x4, x1, x2)

inst_13:
// rs1==x20, rs2==x17, rs3==x19, rd==x18,fs1 == 0 and fe1 == 0xfc and fm1 == 0x26a55d and fs2 == 0 and fe2 == 0xfe and fm2 == 0x395f47 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x20; op2:x17; op3:x19; dest:x18; op1val:0x7e26a55d; op2val:0x7f395f47;
op3val:0x7f7fffff; valaddr_reg:x3; val_offset:39*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x18, x20, x17, x19, dyn, 0, 0, x3, 39*FLEN/8, x4, x1, x2)

inst_14:
// rs1==x16, rs2==x18, rs3==x15, rd==x17,fs1 == 0 and fe1 == 0xfd and fm1 == 0x70a207 and fs2 == 0 and fe2 == 0xfc and fm2 == 0x673028 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x16; op2:x18; op3:x15; dest:x17; op1val:0x7ef0a207; op2val:0x7e673028;
op3val:0x7f7fffff; valaddr_reg:x3; val_offset:42*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x17, x16, x18, x15, dyn, 0, 0, x3, 42*FLEN/8, x4, x1, x2)

inst_15:
// rs1==x17, rs2==x15, rs3==x14, rd==x16,fs1 == 0 and fe1 == 0xfd and fm1 == 0x142c31 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x06bfe7 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x17; op2:x15; op3:x14; dest:x16; op1val:0x7e942c31; op2val:0x7e86bfe7;
op3val:0x7f7fffff; valaddr_reg:x3; val_offset:45*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x16, x17, x15, x14, dyn, 0, 0, x3, 45*FLEN/8, x4, x1, x2)

inst_16:
// rs1==x14, rs2==x16, rs3==x17, rd==x15,fs1 == 0 and fe1 == 0xfd and fm1 == 0x605a49 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x2d9b52 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x14; op2:x16; op3:x17; dest:x15; op1val:0x7ee05a49; op2val:0x7f2d9b52;
op3val:0x7f7fffff; valaddr_reg:x3; val_offset:48*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x15, x14, x16, x17, dyn, 0, 0, x3, 48*FLEN/8, x4, x1, x2)

inst_17:
// rs1==x15, rs2==x13, rs3==x16, rd==x14,fs1 == 0 and fe1 == 0xfe and fm1 == 0x325b88 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x246dcc and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x15; op2:x13; op3:x16; dest:x14; op1val:0x7f325b88; op2val:0x7f246dcc;
op3val:0x7f7fffff; valaddr_reg:x3; val_offset:51*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x14, x15, x13, x16, dyn, 0, 0, x3, 51*FLEN/8, x4, x1, x2)

inst_18:
// rs1==x12, rs2==x14, rs3==x11, rd==x13,fs1 == 0 and fe1 == 0xfe and fm1 == 0x00e26f and fs2 == 0 and fe2 == 0xfb and fm2 == 0x7a8560 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x12; op2:x14; op3:x11; dest:x13; op1val:0x7f00e26f; op2val:0x7dfa8560;
op3val:0x7f7fffff; valaddr_reg:x3; val_offset:54*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x13, x12, x14, x11, dyn, 0, 0, x3, 54*FLEN/8, x4, x1, x2)

inst_19:
// rs1==x13, rs2==x11, rs3==x10, rd==x12,fs1 == 0 and fe1 == 0xfe and fm1 == 0x3935a3 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x2db39d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x13; op2:x11; op3:x10; dest:x12; op1val:0x7f3935a3; op2val:0x7f2db39d;
op3val:0x7f7fffff; valaddr_reg:x3; val_offset:57*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x12, x13, x11, x10, dyn, 0, 0, x3, 57*FLEN/8, x4, x1, x2)

inst_20:
// rs1==x10, rs2==x12, rs3==x13, rd==x11,fs1 == 0 and fe1 == 0xfe and fm1 == 0x090d88 and fs2 == 0 and fe2 == 0xfc and fm2 == 0x2224db and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x10; op2:x12; op3:x13; dest:x11; op1val:0x7f090d88; op2val:0x7e2224db;
op3val:0x7f7fffff; valaddr_reg:x3; val_offset:60*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x11, x10, x12, x13, dyn, 0, 0, x3, 60*FLEN/8, x4, x1, x2)
RVTEST_VALBASEUPD(x12,test_dataset_1)

inst_21:
// rs1==x11, rs2==x9, rs3==x12, rd==x10,fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c3c85 and fs2 == 0 and fe2 == 0xfc and fm2 == 0x5ad8ea and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x11; op2:x9; op3:x12; dest:x10; op1val:0x7edc3c85; op2val:0x7e5ad8ea;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:0*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x10, x11, x9, x12, dyn, 0, 0, x12, 0*FLEN/8, x13, x1, x2)

inst_22:
// rs1==x8, rs2==x10, rs3==x7, rd==x9,fs1 == 0 and fe1 == 0xfe and fm1 == 0x23f4fa and fs2 == 0 and fe2 == 0xfe and fm2 == 0x3e0af1 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x8; op2:x10; op3:x7; dest:x9; op1val:0x7f23f4fa; op2val:0x7f3e0af1;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:3*FLEN/8; rmval:dyn;
testreg:x2; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x9, x8, x10, x7, dyn, 0, 0, x12, 3*FLEN/8, x13, x1, x2)

inst_23:
// rs1==x9, rs2==x7, rs3==x6, rd==x8,fs1 == 0 and fe1 == 0xfe and fm1 == 0x19b6dc and fs2 == 0 and fe2 == 0xfd and fm2 == 0x1d9e09 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x9; op2:x7; op3:x6; dest:x8; op1val:0x7f19b6dc; op2val:0x7e9d9e09;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:6*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x8, x9, x7, x6, dyn, 0, 0, x12, 6*FLEN/8, x13, x1, x10)
RVTEST_SIGBASE(x9,signature_x9_0)

inst_24:
// rs1==x6, rs2==x8, rs3==x9, rd==x7,fs1 == 0 and fe1 == 0xfc and fm1 == 0x61b55e and fs2 == 0 and fe2 == 0xfe and fm2 == 0x139ba8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x6; op2:x8; op3:x9; dest:x7; op1val:0x7e61b55e; op2val:0x7f139ba8;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:9*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x7, x6, x8, x9, dyn, 0, 0, x12, 9*FLEN/8, x13, x9, x10)

inst_25:
// rs1==x7, rs2==x5, rs3==x8, rd==x6,fs1 == 0 and fe1 == 0xfa and fm1 == 0x07c07a and fs2 == 0 and fe2 == 0xfd and fm2 == 0x6bfb00 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x7; op2:x5; op3:x8; dest:x6; op1val:0x7d07c07a; op2val:0x7eebfb00;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:12*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x6, x7, x5, x8, dyn, 0, 0, x12, 12*FLEN/8, x13, x9, x10)

inst_26:
// rs1==x4, rs2==x6, rs3==x3, rd==x5,fs1 == 0 and fe1 == 0xfe and fm1 == 0x09f0c8 and fs2 == 0 and fe2 == 0xfc and fm2 == 0x7e2c3a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x4; op2:x6; op3:x3; dest:x5; op1val:0x7f09f0c8; op2val:0x7e7e2c3a;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:15*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x5, x4, x6, x3, dyn, 0, 0, x12, 15*FLEN/8, x13, x9, x10)

inst_27:
// rs1==x5, rs2==x3, rs3==x2, rd==x4,fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c4834 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x4214d7 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x5; op2:x3; op3:x2; dest:x4; op1val:0x7f3c4834; op2val:0x7ec214d7;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:18*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x4, x5, x3, x2, dyn, 0, 0, x12, 18*FLEN/8, x13, x9, x10)

inst_28:
// rs1==x2, rs2==x4, rs3==x5, rd==x3,fs1 == 0 and fe1 == 0xfc and fm1 == 0x6dd39b and fs2 == 0 and fe2 == 0xfa and fm2 == 0x6c7439 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x2; op2:x4; op3:x5; dest:x3; op1val:0x7e6dd39b; op2val:0x7d6c7439;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:21*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x3, x2, x4, x5, dyn, 0, 0, x12, 21*FLEN/8, x13, x9, x10)

inst_29:
// rs1==x3, rs2==x1, rs3==x4, rd==x2,fs1 == 0 and fe1 == 0xf9 and fm1 == 0x40c8f3 and fs2 == 0 and fe2 == 0xfc and fm2 == 0x179770 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x3; op2:x1; op3:x4; dest:x2; op1val:0x7cc0c8f3; op2val:0x7e179770;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:24*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x2, x3, x1, x4, dyn, 0, 0, x12, 24*FLEN/8, x13, x9, x10)

inst_30:
// rs1==x1,fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a6b5b and fs2 == 0 and fe2 == 0xfb and fm2 == 0x6febf0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x1; op2:x30; op3:x29; dest:x31; op1val:0x7eea6b5b; op2val:0x7defebf0;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:27*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x1, x30, x29, dyn, 0, 0, x12, 27*FLEN/8, x13, x9, x10)

inst_31:
// rs1==x0,fs1 == 0 and fe1 == 0xfe and fm1 == 0x269d12 and fs2 == 0 and fe2 == 0xfc and fm2 == 0x710596 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x0; op2:x30; op3:x29; dest:x31; op1val:0x0; op2val:0x7e710596;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:30*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x0, x30, x29, dyn, 0, 0, x12, 30*FLEN/8, x13, x9, x10)

inst_32:
// rs2==x2,fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c289c and fs2 == 0 and fe2 == 0xfd and fm2 == 0x111231 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x2; op3:x29; dest:x31; op1val:0x7f2c289c; op2val:0x7e911231;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:33*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x2, x29, dyn, 0, 0, x12, 33*FLEN/8, x13, x9, x10)

inst_33:
// rs2==x0,fs1 == 0 and fe1 == 0xfd and fm1 == 0x47b540 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x7740d5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x0; op3:x29; dest:x31; op1val:0x7ec7b540; op2val:0x0;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:36*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x0, x29, dyn, 0, 0, x12, 36*FLEN/8, x13, x9, x10)

inst_34:
// rs3==x1,fs1 == 0 and fe1 == 0xfd and fm1 == 0x56c198 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x6e20e0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x1; dest:x31; op1val:0x7ed6c198; op2val:0x7eee20e0;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:39*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x1, dyn, 0, 0, x12, 39*FLEN/8, x13, x9, x10)

inst_35:
// rs3==x0,fs1 == 0 and fe1 == 0xfd and fm1 == 0x42b2c3 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x2593da and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x0; dest:x31; op1val:0x7ec2b2c3; op2val:0x7ea593da;
op3val:0x0; valaddr_reg:x12; val_offset:42*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x0, dyn, 0, 0, x12, 42*FLEN/8, x13, x9, x10)

inst_36:
// rd==x1,fs1 == 0 and fe1 == 0xfc and fm1 == 0x36810f and fs2 == 0 and fe2 == 0xfc and fm2 == 0x673c15 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x31; op2:x30; op3:x29; dest:x1; op1val:0x7e36810f; op2val:0x7e673c15;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:45*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x1, x31, x30, x29, dyn, 0, 0, x12, 45*FLEN/8, x13, x9, x10)

inst_37:
// rd==x0,fs1 == 0 and fe1 == 0xfd and fm1 == 0x481ce5 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x5298e8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x31; op2:x30; op3:x29; dest:x0; op1val:0x7ec81ce5; op2val:0x7ed298e8;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:48*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x0, x31, x30, x29, dyn, 0, 0, x12, 48*FLEN/8, x13, x9, x10)

inst_38:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f70d6 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x5eb4e5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9f70d6; op2val:0x7edeb4e5;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:51*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 51*FLEN/8, x13, x9, x10)

inst_39:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6c7765 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x72c1df and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eec7765; op2val:0x7ef2c1df;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:54*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 54*FLEN/8, x13, x9, x10)

inst_40:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70e623 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x330a47 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef0e623; op2val:0x7eb30a47;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:57*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 57*FLEN/8, x13, x9, x10)

inst_41:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0763b9 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x07bc04 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e8763b9; op2val:0x7f07bc04;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:60*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 60*FLEN/8, x13, x9, x10)

inst_42:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x084a01 and fs2 == 0 and fe2 == 0xfa and fm2 == 0x3a1788 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c884a01; op2val:0x7d3a1788;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:63*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 63*FLEN/8, x13, x9, x10)

inst_43:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38f464 and fs2 == 0 and fe2 == 0xfc and fm2 == 0x40dca5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f38f464; op2val:0x7e40dca5;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:66*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 66*FLEN/8, x13, x9, x10)

inst_44:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x639603 and fs2 == 0 and fe2 == 0xfc and fm2 == 0x75c78c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ee39603; op2val:0x7e75c78c;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:69*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 69*FLEN/8, x13, x9, x10)

inst_45:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x70218d and fs2 == 0 and fe2 == 0xfd and fm2 == 0x0dc14f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e70218d; op2val:0x7e8dc14f;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:72*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 72*FLEN/8, x13, x9, x10)

inst_46:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x66b5d2 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x10d45e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e66b5d2; op2val:0x7e90d45e;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:75*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 75*FLEN/8, x13, x9, x10)

inst_47:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x256764 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x5a9856 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ca56764; op2val:0x7eda9856;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:78*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 78*FLEN/8, x13, x9, x10)

inst_48:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e17c2 and fs2 == 0 and fe2 == 0xfc and fm2 == 0x2ae8b7 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e6e17c2; op2val:0x7e2ae8b7;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:81*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 81*FLEN/8, x13, x9, x10)

inst_49:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x375161 and fs2 == 0 and fe2 == 0xfc and fm2 == 0x0feb39 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e375161; op2val:0x7e0feb39;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:84*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 84*FLEN/8, x13, x9, x10)

inst_50:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06075b and fs2 == 0 and fe2 == 0xfb and fm2 == 0x1c6dc8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f06075b; op2val:0x7d9c6dc8;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:87*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 87*FLEN/8, x13, x9, x10)

inst_51:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x002951 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x200a1a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e802951; op2val:0x7f200a1a;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:90*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 90*FLEN/8, x13, x9, x10)

inst_52:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x244343 and fs2 == 0 and fe2 == 0xfc and fm2 == 0x0202a2 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f244343; op2val:0x7e0202a2;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:93*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 93*FLEN/8, x13, x9, x10)

inst_53:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x79b070 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x29e684 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef9b070; op2val:0x7f29e684;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:96*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 96*FLEN/8, x13, x9, x10)

inst_54:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cd245 and fs2 == 0 and fe2 == 0xfb and fm2 == 0x39bb69 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e2cd245; op2val:0x7db9bb69;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:99*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 99*FLEN/8, x13, x9, x10)

inst_55:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12898d and fs2 == 0 and fe2 == 0xfe and fm2 == 0x1ae6b6 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e12898d; op2val:0x7f1ae6b6;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:102*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 102*FLEN/8, x13, x9, x10)

inst_56:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0cfe89 and fs2 == 0 and fe2 == 0xfc and fm2 == 0x55f571 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e0cfe89; op2val:0x7e55f571;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:105*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 105*FLEN/8, x13, x9, x10)

inst_57:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7680ff and fs2 == 0 and fe2 == 0xfe and fm2 == 0x1acd2f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef680ff; op2val:0x7f1acd2f;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:108*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 108*FLEN/8, x13, x9, x10)

inst_58:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4733d7 and fs2 == 0 and fe2 == 0xfc and fm2 == 0x60364e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dc733d7; op2val:0x7e60364e;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:111*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 111*FLEN/8, x13, x9, x10)

inst_59:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x504312 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x050002 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e504312; op2val:0x7e850002;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:114*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 114*FLEN/8, x13, x9, x10)

inst_60:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x21312f and fs2 == 0 and fe2 == 0xfd and fm2 == 0x1d41a9 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea1312f; op2val:0x7e9d41a9;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:117*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 117*FLEN/8, x13, x9, x10)

inst_61:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6f9cda and fs2 == 0 and fe2 == 0xf6 and fm2 == 0x6522f2 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7def9cda; op2val:0x7b6522f2;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:120*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 120*FLEN/8, x13, x9, x10)

inst_62:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28f4b0 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x3d7cc7 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f28f4b0; op2val:0x7f3d7cc7;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:123*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 123*FLEN/8, x13, x9, x10)

inst_63:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x366e51 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x320e71 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f366e51; op2val:0x7f320e71;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:126*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 126*FLEN/8, x13, x9, x10)

inst_64:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f23f2 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x20a569 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0f23f2; op2val:0x7f20a569;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:129*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 129*FLEN/8, x13, x9, x10)

inst_65:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474d3f and fs2 == 0 and fe2 == 0xfc and fm2 == 0x5dfbef and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec74d3f; op2val:0x7e5dfbef;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:132*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 132*FLEN/8, x13, x9, x10)

inst_66:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2eb1b3 and fs2 == 0 and fe2 == 0xfa and fm2 == 0x511a8e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e2eb1b3; op2val:0x7d511a8e;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:135*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 135*FLEN/8, x13, x9, x10)

inst_67:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5c6cb0 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x1b8e8c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e5c6cb0; op2val:0x7f1b8e8c;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:138*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 138*FLEN/8, x13, x9, x10)

inst_68:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d7e33 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x053104 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2d7e33; op2val:0x7f053104;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:141*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 141*FLEN/8, x13, x9, x10)

inst_69:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c2411 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x2cbcd0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c2411; op2val:0x7f2cbcd0;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:144*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 144*FLEN/8, x13, x9, x10)

inst_70:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x218502 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x0f18e6 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c218502; op2val:0x7f0f18e6;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:147*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 147*FLEN/8, x13, x9, x10)

inst_71:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x665064 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x7e8d56 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e665064; op2val:0x7efe8d56;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:150*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 150*FLEN/8, x13, x9, x10)

inst_72:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ee152 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x344bd0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9ee152; op2val:0x7f344bd0;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:153*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 153*FLEN/8, x13, x9, x10)

inst_73:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x031454 and fs2 == 0 and fe2 == 0xfc and fm2 == 0x41e692 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e831454; op2val:0x7e41e692;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:156*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 156*FLEN/8, x13, x9, x10)

inst_74:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x373e6b and fs2 == 0 and fe2 == 0xfe and fm2 == 0x1634d7 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb73e6b; op2val:0x7f1634d7;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:159*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 159*FLEN/8, x13, x9, x10)

inst_75:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x178d60 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x4d4cf5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e178d60; op2val:0x7ecd4cf5;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:162*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 162*FLEN/8, x13, x9, x10)

inst_76:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x038f64 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x180041 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e038f64; op2val:0x7f180041;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:165*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 165*FLEN/8, x13, x9, x10)

inst_77:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ac304 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x1e1c9c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1ac304; op2val:0x7f1e1c9c;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:168*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 168*FLEN/8, x13, x9, x10)

inst_78:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x716299 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x259c47 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef16299; op2val:0x7f259c47;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:171*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 171*FLEN/8, x13, x9, x10)

inst_79:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506ed3 and fs2 == 0 and fe2 == 0xfc and fm2 == 0x4e462d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e506ed3; op2val:0x7e4e462d;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:174*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 174*FLEN/8, x13, x9, x10)

inst_80:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x226d04 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x3597f6 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea26d04; op2val:0x7eb597f6;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:177*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 177*FLEN/8, x13, x9, x10)

inst_81:
// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x31cc28 and fs2 == 0 and fe2 == 0xfa and fm2 == 0x2872e3 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ab1cc28; op2val:0x7d2872e3;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:180*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 180*FLEN/8, x13, x9, x10)

inst_82:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f6d07 and fs2 == 0 and fe2 == 0xfa and fm2 == 0x522d12 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dbf6d07; op2val:0x7d522d12;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:183*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 183*FLEN/8, x13, x9, x10)

inst_83:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x240ddf and fs2 == 0 and fe2 == 0xfb and fm2 == 0x044ae8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f240ddf; op2val:0x7d844ae8;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:186*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 186*FLEN/8, x13, x9, x10)

inst_84:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x729bb9 and fs2 == 0 and fe2 == 0xfc and fm2 == 0x7198e7 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e729bb9; op2val:0x7e7198e7;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:189*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 189*FLEN/8, x13, x9, x10)

inst_85:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x786a31 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x614269 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef86a31; op2val:0x7ee14269;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:192*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 192*FLEN/8, x13, x9, x10)

inst_86:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12c03f and fs2 == 0 and fe2 == 0xfc and fm2 == 0x7c800c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e12c03f; op2val:0x7e7c800c;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:195*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 195*FLEN/8, x13, x9, x10)

inst_87:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55526b and fs2 == 0 and fe2 == 0xfe and fm2 == 0x097aef and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed5526b; op2val:0x7f097aef;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:198*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 198*FLEN/8, x13, x9, x10)

inst_88:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7574e1 and fs2 == 0 and fe2 == 0xfc and fm2 == 0x092190 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d7574e1; op2val:0x7e092190;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:201*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 201*FLEN/8, x13, x9, x10)

inst_89:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x681a5c and fs2 == 0 and fe2 == 0xfe and fm2 == 0x16436d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ee81a5c; op2val:0x7f16436d;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:204*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 204*FLEN/8, x13, x9, x10)

inst_90:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x19d2a8 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x6f342a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f19d2a8; op2val:0x7eef342a;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:207*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 207*FLEN/8, x13, x9, x10)

inst_91:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f0263 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x3e85af and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e8f0263; op2val:0x7ebe85af;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:210*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 210*FLEN/8, x13, x9, x10)

inst_92:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x217a32 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x05458a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea17a32; op2val:0x7f05458a;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:213*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 213*FLEN/8, x13, x9, x10)

inst_93:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3c3955 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x4dc2f4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e3c3955; op2val:0x7ecdc2f4;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:216*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 216*FLEN/8, x13, x9, x10)

inst_94:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5be595 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x23283d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d5be595; op2val:0x7ea3283d;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:219*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 219*FLEN/8, x13, x9, x10)

inst_95:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28e580 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x33ce10 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f28e580; op2val:0x7f33ce10;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:222*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 222*FLEN/8, x13, x9, x10)

inst_96:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c6353 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x17db25 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2c6353; op2val:0x7f17db25;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:225*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 225*FLEN/8, x13, x9, x10)

inst_97:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x323b21 and fs2 == 0 and fe2 == 0xfb and fm2 == 0x3d26fe and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb23b21; op2val:0x7dbd26fe;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:228*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 228*FLEN/8, x13, x9, x10)

inst_98:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7e51b6 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x2a5eb4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7efe51b6; op2val:0x7f2a5eb4;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:231*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 231*FLEN/8, x13, x9, x10)

inst_99:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x002bfc and fs2 == 0 and fe2 == 0xfe and fm2 == 0x0ce08c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f002bfc; op2val:0x7f0ce08c;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:234*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 234*FLEN/8, x13, x9, x10)

inst_100:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1e69a3 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x61b309 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d9e69a3; op2val:0x7ee1b309;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:237*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 237*FLEN/8, x13, x9, x10)

inst_101:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c71b6 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x14aa96 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ddc71b6; op2val:0x7f14aa96;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:240*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 240*FLEN/8, x13, x9, x10)

inst_102:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0d00c9 and fs2 == 0 and fe2 == 0xfb and fm2 == 0x18862f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d8d00c9; op2val:0x7d98862f;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:243*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 243*FLEN/8, x13, x9, x10)

inst_103:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x099707 and fs2 == 0 and fe2 == 0xf9 and fm2 == 0x104e6f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e099707; op2val:0x7c904e6f;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:246*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 246*FLEN/8, x13, x9, x10)

inst_104:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a4a99 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x22097f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dba4a99; op2val:0x7f22097f;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:249*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 249*FLEN/8, x13, x9, x10)

inst_105:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x208c03 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x36dceb and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f208c03; op2val:0x7f36dceb;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:252*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 252*FLEN/8, x13, x9, x10)

inst_106:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x195c05 and fs2 == 0 and fe2 == 0xf9 and fm2 == 0x5ed6a0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f195c05; op2val:0x7cded6a0;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:255*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 255*FLEN/8, x13, x9, x10)

inst_107:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x44595d and fs2 == 0 and fe2 == 0xfe and fm2 == 0x094f70 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec4595d; op2val:0x7f094f70;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:258*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 258*FLEN/8, x13, x9, x10)

inst_108:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fcd1f and fs2 == 0 and fe2 == 0xfe and fm2 == 0x336f9b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0fcd1f; op2val:0x7f336f9b;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:261*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 261*FLEN/8, x13, x9, x10)

inst_109:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x790586 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x58913a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e790586; op2val:0x7ed8913a;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:264*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 264*FLEN/8, x13, x9, x10)

inst_110:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x39f3eb and fs2 == 0 and fe2 == 0xfc and fm2 == 0x0a10b2 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e39f3eb; op2val:0x7e0a10b2;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:267*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 267*FLEN/8, x13, x9, x10)

inst_111:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6c8964 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x10ae28 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eec8964; op2val:0x7f10ae28;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:270*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 270*FLEN/8, x13, x9, x10)

inst_112:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d1be6 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x184f43 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e8d1be6; op2val:0x7e984f43;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:273*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 273*FLEN/8, x13, x9, x10)

inst_113:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x209877 and fs2 == 0 and fe2 == 0xfa and fm2 == 0x7fc6b5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea09877; op2val:0x7d7fc6b5;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:276*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 276*FLEN/8, x13, x9, x10)

inst_114:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ad3ab and fs2 == 0 and fe2 == 0xfd and fm2 == 0x1e86f9 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3ad3ab; op2val:0x7e9e86f9;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:279*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 279*FLEN/8, x13, x9, x10)

inst_115:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76b68b and fs2 == 0 and fe2 == 0xfe and fm2 == 0x04a412 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7df6b68b; op2val:0x7f04a412;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:282*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 282*FLEN/8, x13, x9, x10)

inst_116:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01615c and fs2 == 0 and fe2 == 0xfd and fm2 == 0x469037 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f01615c; op2val:0x7ec69037;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:285*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 285*FLEN/8, x13, x9, x10)

inst_117:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x76e4d9 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x2c4d11 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef6e4d9; op2val:0x7f2c4d11;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:288*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 288*FLEN/8, x13, x9, x10)

inst_118:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x133df8 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x0fa54d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d933df8; op2val:0x7f0fa54d;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:291*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 291*FLEN/8, x13, x9, x10)

inst_119:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46a01f and fs2 == 0 and fe2 == 0xfd and fm2 == 0x2a21ee and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec6a01f; op2val:0x7eaa21ee;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:294*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 294*FLEN/8, x13, x9, x10)

inst_120:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0eeeea and fs2 == 0 and fe2 == 0xfc and fm2 == 0x4d5498 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e0eeeea; op2val:0x7e4d5498;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:297*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 297*FLEN/8, x13, x9, x10)

inst_121:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60e085 and fs2 == 0 and fe2 == 0xfc and fm2 == 0x71cd8a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ee0e085; op2val:0x7e71cd8a;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:300*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 300*FLEN/8, x13, x9, x10)

inst_122:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04b289 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x370ec5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f04b289; op2val:0x7f370ec5;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:303*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 303*FLEN/8, x13, x9, x10)

inst_123:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c8a and fs2 == 0 and fe2 == 0xfd and fm2 == 0x1eab47 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f076c8a; op2val:0x7e9eab47;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:306*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 306*FLEN/8, x13, x9, x10)

inst_124:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x608143 and fs2 == 0 and fe2 == 0xfc and fm2 == 0x4d3073 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ee08143; op2val:0x7e4d3073;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:309*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 309*FLEN/8, x13, x9, x10)

inst_125:
// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0e1418 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x381fbe and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c8e1418; op2val:0x7eb81fbe;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:312*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 312*FLEN/8, x13, x9, x10)

inst_126:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x044948 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x0a6bad and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e044948; op2val:0x7e8a6bad;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:315*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 315*FLEN/8, x13, x9, x10)

inst_127:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x14a5b3 and fs2 == 0 and fe2 == 0xfb and fm2 == 0x5c95cc and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f14a5b3; op2val:0x7ddc95cc;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:318*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 318*FLEN/8, x13, x9, x10)

inst_128:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x382999 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x660428 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb82999; op2val:0x7ee60428;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:321*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 321*FLEN/8, x13, x9, x10)

inst_129:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x203ed5 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x1dc006 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f203ed5; op2val:0x7f1dc006;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:324*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 324*FLEN/8, x13, x9, x10)

inst_130:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x38d1a5 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x0a6049 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb8d1a5; op2val:0x7f0a6049;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:327*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 327*FLEN/8, x13, x9, x10)

inst_131:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19b362 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x0cd956 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e99b362; op2val:0x7f0cd956;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:330*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 330*FLEN/8, x13, x9, x10)

inst_132:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x337ad1 and fs2 == 0 and fe2 == 0xfc and fm2 == 0x30557d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eb37ad1; op2val:0x7e30557d;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:333*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 333*FLEN/8, x13, x9, x10)

inst_133:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09cbd1 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x01aad7 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f09cbd1; op2val:0x7f01aad7;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:336*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 336*FLEN/8, x13, x9, x10)

inst_134:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23f1fb and fs2 == 0 and fe2 == 0xfc and fm2 == 0x39ed2e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f23f1fb; op2val:0x7e39ed2e;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:339*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 339*FLEN/8, x13, x9, x10)

inst_135:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x469f5a and fs2 == 0 and fe2 == 0xfc and fm2 == 0x0fc236 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e469f5a; op2val:0x7e0fc236;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:342*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 342*FLEN/8, x13, x9, x10)

inst_136:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x24d9b0 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x2cc100 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f24d9b0; op2val:0x7f2cc100;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:345*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 345*FLEN/8, x13, x9, x10)

inst_137:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x261957 and fs2 == 0 and fe2 == 0xfc and fm2 == 0x70b43d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f261957; op2val:0x7e70b43d;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:348*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 348*FLEN/8, x13, x9, x10)

inst_138:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bf641 and fs2 == 0 and fe2 == 0xfb and fm2 == 0x03fb3f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0bf641; op2val:0x7d83fb3f;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:351*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 351*FLEN/8, x13, x9, x10)

inst_139:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x201d48 and fs2 == 0 and fe2 == 0xfc and fm2 == 0x601303 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f201d48; op2val:0x7e601303;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:354*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 354*FLEN/8, x13, x9, x10)

inst_140:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5ed5d0 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x01b289 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eded5d0; op2val:0x7f01b289;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:357*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 357*FLEN/8, x13, x9, x10)

inst_141:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00905e and fs2 == 0 and fe2 == 0xfd and fm2 == 0x27824d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e80905e; op2val:0x7ea7824d;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:360*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 360*FLEN/8, x13, x9, x10)

inst_142:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x215a9a and fs2 == 0 and fe2 == 0xfd and fm2 == 0x60ae32 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e215a9a; op2val:0x7ee0ae32;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:363*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 363*FLEN/8, x13, x9, x10)

inst_143:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x161cff and fs2 == 0 and fe2 == 0xfd and fm2 == 0x51086c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e961cff; op2val:0x7ed1086c;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:366*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 366*FLEN/8, x13, x9, x10)

inst_144:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x530441 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x7f86ba and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e530441; op2val:0x7eff86ba;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:369*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 369*FLEN/8, x13, x9, x10)

inst_145:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2a571c and fs2 == 0 and fe2 == 0xfe and fm2 == 0x2e7b77 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2a571c; op2val:0x7f2e7b77;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:372*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 372*FLEN/8, x13, x9, x10)

inst_146:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x34ba29 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x0fb3a8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f34ba29; op2val:0x7e8fb3a8;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:375*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 375*FLEN/8, x13, x9, x10)

inst_147:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1167f4 and fs2 == 0 and fe2 == 0xfc and fm2 == 0x62f85a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1167f4; op2val:0x7e62f85a;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:378*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 378*FLEN/8, x13, x9, x10)

inst_148:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7b2a84 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x1ac336 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7efb2a84; op2val:0x7f1ac336;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:381*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 381*FLEN/8, x13, x9, x10)

inst_149:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10cdee and fs2 == 0 and fe2 == 0xfe and fm2 == 0x38931c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f10cdee; op2val:0x7f38931c;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:384*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 384*FLEN/8, x13, x9, x10)

inst_150:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4de363 and fs2 == 0 and fe2 == 0xfb and fm2 == 0x2e05d1 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecde363; op2val:0x7dae05d1;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:387*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 387*FLEN/8, x13, x9, x10)

inst_151:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x073a84 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x09dfb8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e873a84; op2val:0x7f09dfb8;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:390*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 390*FLEN/8, x13, x9, x10)
RVTEST_SIGBASE(x9,signature_x9_1)

inst_152:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x597e8a and fs2 == 0 and fe2 == 0xfc and fm2 == 0x0bc2ae and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed97e8a; op2val:0x7e0bc2ae;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:393*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 393*FLEN/8, x13, x9, x10)

inst_153:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x724276 and fs2 == 0 and fe2 == 0xfc and fm2 == 0x098d5c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef24276; op2val:0x7e098d5c;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:396*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 396*FLEN/8, x13, x9, x10)

inst_154:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ba99e and fs2 == 0 and fe2 == 0xfb and fm2 == 0x3d2101 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7efba99e; op2val:0x7dbd2101;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:399*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 399*FLEN/8, x13, x9, x10)

inst_155:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x592a8c and fs2 == 0 and fe2 == 0xfc and fm2 == 0x7e9d6e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7dd92a8c; op2val:0x7e7e9d6e;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:402*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 402*FLEN/8, x13, x9, x10)

inst_156:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x656a07 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x55173a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ee56a07; op2val:0x7ed5173a;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:405*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 405*FLEN/8, x13, x9, x10)

inst_157:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fc21e and fs2 == 0 and fe2 == 0xfc and fm2 == 0x6ff4bc and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eafc21e; op2val:0x7e6ff4bc;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:408*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 408*FLEN/8, x13, x9, x10)

inst_158:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x52ba4d and fs2 == 0 and fe2 == 0xfe and fm2 == 0x0970bd and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d52ba4d; op2val:0x7f0970bd;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:411*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 411*FLEN/8, x13, x9, x10)

inst_159:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50905a and fs2 == 0 and fe2 == 0xfe and fm2 == 0x0e02b8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ed0905a; op2val:0x7f0e02b8;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:414*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 414*FLEN/8, x13, x9, x10)

inst_160:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4c2b76 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x1337c1 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e4c2b76; op2val:0x7e9337c1;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:417*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 417*FLEN/8, x13, x9, x10)

inst_161:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x015d4c and fs2 == 0 and fe2 == 0xfd and fm2 == 0x41cf2f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d015d4c; op2val:0x7ec1cf2f;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:420*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 420*FLEN/8, x13, x9, x10)

inst_162:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x13a10a and fs2 == 0 and fe2 == 0xfd and fm2 == 0x07fa5d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f13a10a; op2val:0x7e87fa5d;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:423*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 423*FLEN/8, x13, x9, x10)

inst_163:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ae1d2 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x4fef6d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9ae1d2; op2val:0x7ecfef6d;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:426*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 426*FLEN/8, x13, x9, x10)

inst_164:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0781f6 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x229a06 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e8781f6; op2val:0x7f229a06;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:429*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 429*FLEN/8, x13, x9, x10)

inst_165:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4fbc01 and fs2 == 0 and fe2 == 0xfb and fm2 == 0x190f76 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e4fbc01; op2val:0x7d990f76;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:432*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 432*FLEN/8, x13, x9, x10)

inst_166:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x159092 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x0ba3b9 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f159092; op2val:0x7f0ba3b9;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:435*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 435*FLEN/8, x13, x9, x10)

inst_167:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x11483d and fs2 == 0 and fe2 == 0xfd and fm2 == 0x1ffee2 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e11483d; op2val:0x7e9ffee2;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:438*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 438*FLEN/8, x13, x9, x10)

inst_168:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c9fa7 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x0fc01f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1c9fa7; op2val:0x7f0fc01f;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:441*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 441*FLEN/8, x13, x9, x10)

inst_169:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x60facc and fs2 == 0 and fe2 == 0xfd and fm2 == 0x18fe38 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7de0facc; op2val:0x7e98fe38;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:444*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 444*FLEN/8, x13, x9, x10)

inst_170:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a994e and fs2 == 0 and fe2 == 0xfd and fm2 == 0x5a40dd and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eca994e; op2val:0x7eda40dd;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:447*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 447*FLEN/8, x13, x9, x10)

inst_171:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x401d9b and fs2 == 0 and fe2 == 0xfe and fm2 == 0x16144b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e401d9b; op2val:0x7f16144b;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:450*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 450*FLEN/8, x13, x9, x10)

inst_172:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a34be and fs2 == 0 and fe2 == 0xfe and fm2 == 0x2b1c44 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1a34be; op2val:0x7f2b1c44;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:453*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 453*FLEN/8, x13, x9, x10)

inst_173:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1320d0 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x54336a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e9320d0; op2val:0x7ed4336a;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:456*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 456*FLEN/8, x13, x9, x10)

inst_174:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x735187 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x3b945b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef35187; op2val:0x7f3b945b;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:459*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 459*FLEN/8, x13, x9, x10)

inst_175:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65f120 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x251f3f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e65f120; op2val:0x7f251f3f;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:462*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 462*FLEN/8, x13, x9, x10)

inst_176:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66ec7b and fs2 == 0 and fe2 == 0xfe and fm2 == 0x0b8d5c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ee6ec7b; op2val:0x7f0b8d5c;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:465*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 465*FLEN/8, x13, x9, x10)

inst_177:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x13ed79 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x7e2f1b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f13ed79; op2val:0x7efe2f1b;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:468*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 468*FLEN/8, x13, x9, x10)

inst_178:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4913df and fs2 == 0 and fe2 == 0xfd and fm2 == 0x30d847 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec913df; op2val:0x7eb0d847;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:471*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 471*FLEN/8, x13, x9, x10)

inst_179:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b58ad and fs2 == 0 and fe2 == 0xf9 and fm2 == 0x63b5e5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ecb58ad; op2val:0x7ce3b5e5;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:474*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 474*FLEN/8, x13, x9, x10)

inst_180:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x780c49 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x2a94d2 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef80c49; op2val:0x7eaa94d2;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:477*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 477*FLEN/8, x13, x9, x10)

inst_181:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3821d7 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x2b460e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f3821d7; op2val:0x7f2b460e;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:480*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 480*FLEN/8, x13, x9, x10)

inst_182:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1822d8 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x6f56b5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1822d8; op2val:0x7eef56b5;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:483*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 483*FLEN/8, x13, x9, x10)

inst_183:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0a33b5 and fs2 == 0 and fe2 == 0xfc and fm2 == 0x334304 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e8a33b5; op2val:0x7e334304;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:486*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 486*FLEN/8, x13, x9, x10)

inst_184:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4eee0f and fs2 == 0 and fe2 == 0xfe and fm2 == 0x3286a3 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7eceee0f; op2val:0x7f3286a3;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:489*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 489*FLEN/8, x13, x9, x10)

inst_185:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272357 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x055fe9 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f272357; op2val:0x7f055fe9;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:492*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 492*FLEN/8, x13, x9, x10)

inst_186:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x24caba and fs2 == 0 and fe2 == 0xfd and fm2 == 0x66d514 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f24caba; op2val:0x7ee6d514;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:495*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 495*FLEN/8, x13, x9, x10)

inst_187:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09767a and fs2 == 0 and fe2 == 0xfe and fm2 == 0x0e06b2 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f09767a; op2val:0x7f0e06b2;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:498*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 498*FLEN/8, x13, x9, x10)

inst_188:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ae1f2 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x32e4e1 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f1ae1f2; op2val:0x7f32e4e1;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:501*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 501*FLEN/8, x13, x9, x10)

inst_189:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27d146 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x1150a9 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ea7d146; op2val:0x7f1150a9;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:504*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 504*FLEN/8, x13, x9, x10)

inst_190:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x279c91 and fs2 == 0 and fe2 == 0xfa and fm2 == 0x032ddf and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7da79c91; op2val:0x7d032ddf;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:507*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 507*FLEN/8, x13, x9, x10)

inst_191:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x19d51f and fs2 == 0 and fe2 == 0xfb and fm2 == 0x7705e2 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e19d51f; op2val:0x7df705e2;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:510*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 510*FLEN/8, x13, x9, x10)

inst_192:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0642e8 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x4e6013 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f0642e8; op2val:0x7ece6013;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:513*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 513*FLEN/8, x13, x9, x10)

inst_193:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x794f1c and fs2 == 0 and fe2 == 0xfc and fm2 == 0x69f89b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ef94f1c; op2val:0x7e69f89b;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:516*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 516*FLEN/8, x13, x9, x10)

inst_194:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x115cea and fs2 == 0 and fe2 == 0xfd and fm2 == 0x1a28e8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f115cea; op2val:0x7e9a28e8;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:519*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 519*FLEN/8, x13, x9, x10)

inst_195:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cafdc and fs2 == 0 and fe2 == 0xfe and fm2 == 0x0a2e4c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2cafdc; op2val:0x7f0a2e4c;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:522*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 522*FLEN/8, x13, x9, x10)

inst_196:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0e7425 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x4b435e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e8e7425; op2val:0x7ecb435e;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:525*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 525*FLEN/8, x13, x9, x10)

inst_197:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2bea1b and fs2 == 0 and fe2 == 0xf6 and fm2 == 0x04bcca and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e2bea1b; op2val:0x7b04bcca;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:528*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 528*FLEN/8, x13, x9, x10)

inst_198:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165edf and fs2 == 0 and fe2 == 0xfb and fm2 == 0x5c6184 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f165edf; op2val:0x7ddc6184;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:531*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 531*FLEN/8, x13, x9, x10)

inst_199:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x15fd73 and fs2 == 0 and fe2 == 0xfc and fm2 == 0x20bb94 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e15fd73; op2val:0x7e20bb94;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:534*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 534*FLEN/8, x13, x9, x10)

inst_200:
// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x21ceeb and fs2 == 0 and fe2 == 0xfe and fm2 == 0x20cb47 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7c21ceeb; op2val:0x7f20cb47;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:537*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 537*FLEN/8, x13, x9, x10)

inst_201:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x33f756 and fs2 == 0 and fe2 == 0xfe and fm2 == 0x3f29ee and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e33f756; op2val:0x7f3f29ee;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:540*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 540*FLEN/8, x13, x9, x10)

inst_202:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2099c0 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x36eb6c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f2099c0; op2val:0x7eb6eb6c;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:543*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 543*FLEN/8, x13, x9, x10)

inst_203:
// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6758c9 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x73c956 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7de758c9; op2val:0x7ef3c956;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:546*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 546*FLEN/8, x13, x9, x10)

inst_204:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48e6cd and fs2 == 0 and fe2 == 0xfe and fm2 == 0x0e5202 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec8e6cd; op2val:0x7f0e5202;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:549*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 549*FLEN/8, x13, x9, x10)

inst_205:
// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44b45e and fs2 == 0 and fe2 == 0xfe and fm2 == 0x119488 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7d44b45e; op2val:0x7f119488;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:552*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 552*FLEN/8, x13, x9, x10)

inst_206:
// fs1 == 0 and fe1 == 0xfc and fm1 == 0x675fa1 and fs2 == 0 and fe2 == 0xf9 and fm2 == 0x3e8943 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7e675fa1; op2val:0x7cbe8943;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:555*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 555*FLEN/8, x13, x9, x10)

inst_207:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x19c644 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x2abc06 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f19c644; op2val:0x7eaabc06;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:558*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 558*FLEN/8, x13, x9, x10)

inst_208:
// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269d12 and fs2 == 0 and fe2 == 0xfc and fm2 == 0x710596 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7f269d12; op2val:0x7e710596;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:561*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 561*FLEN/8, x13, x9, x10)

inst_209:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x47b540 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x7740d5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec7b540; op2val:0x7ef740d5;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:564*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 564*FLEN/8, x13, x9, x10)

inst_210:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x42b2c3 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x2593da and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec2b2c3; op2val:0x7ea593da;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:567*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 567*FLEN/8, x13, x9, x10)

inst_211:
// fs1 == 0 and fe1 == 0xfd and fm1 == 0x481ce5 and fs2 == 0 and fe2 == 0xfd and fm2 == 0x5298e8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7  and rs1_sgn_prefix == 0x00000000 and rs2_sgn_prefix == 0x00000000 and rs3_sgn_prefix == 0x00000000  
/* opcode: fnmsub.s ; op1:x30; op2:x29; op3:x28; dest:x31; op1val:0x7ec81ce5; op2val:0x7ed298e8;
op3val:0x7f7fffff; valaddr_reg:x12; val_offset:570*FLEN/8; rmval:dyn;
testreg:x10; fcsr_val:0 */
TEST_FPR4_OP(fnmsub.s, x31, x30, x29, x28, dyn, 0, 0, x12, 570*FLEN/8, x13, x9, x10)
#endif


RVTEST_CODE_END
RVMODEL_HALT

RVTEST_DATA_BEGIN
.align 4
rvtest_data:
.word 0xbabecafe
.word 0xabecafeb
.word 0xbecafeba
.word 0xecafebab
test_dataset_0:
NAN_BOXED(2117517759,64,FLEN)
NAN_BOXED(2127625192,64,FLEN)
NAN_BOXED(2139095039,64,FLEN)
NAN_BOXED(2129127360,64,FLEN)
NAN_BOXED(2129675982,64,FLEN)
NAN_BOXED(2139095039,64,FLEN)
NAN_BOXED(2082590443,64,FLEN)
NAN_BOXED(2082590443,64,FLEN)
NAN_BOXED(2139095039,64,FLEN)
NAN_BOXED(2117334870,64,FLEN)
NAN_BOXED(2134845934,64,FLEN)
NAN_BOXED(2134845934,64,FLEN)
NAN_BOXED(2132842944,64,FLEN)
NAN_BOXED(2132842944,64,FLEN)
NAN_BOXED(2132842944,64,FLEN)
NAN_BOXED(2112313545,64,FLEN)
NAN_BOXED(2129906006,64,FLEN)
NAN_BOXED(2112313545,64,FLEN)
NAN_BOXED(2127095501,64,FLEN)
NAN_BOXED(2131644930,64,FLEN)
NAN_BOXED(2131644930,64,FLEN)
NAN_BOXED(2101654622,64,FLEN)
NAN_BOXED(2131858568,64,FLEN)
NAN_BOXED(2101654622,64,FLEN)
NAN_BOXED(2120703905,64,FLEN)
NAN_BOXED(2120703905,64,FLEN)
NAN_BOXED(2120703905,64,FLEN)
NAN_BOXED(2125826335,64,FLEN)
NAN_BOXED(2131362721,64,FLEN)
NAN_BOXED(2139095039,64,FLEN)
NAN_BOXED(2131303652,64,FLEN)
NAN_BOXED(2133907927,64,FLEN)
NAN_BOXED(2139095039,64,FLEN)
NAN_BOXED(2132395588,64,FLEN)
NAN_BOXED(2132395588,64,FLEN)
NAN_BOXED(2139095039,64,FLEN)
NAN_BOXED(2133376525,64,FLEN)
NAN_BOXED(2106962071,64,FLEN)
NAN_BOXED(2139095039,64,FLEN)
NAN_BOXED(2116461917,64,FLEN)
NAN_BOXED(2134466375,64,FLEN)
NAN_BOXED(2139095039,64,FLEN)
NAN_BOXED(2129699335,64,FLEN)
NAN_BOXED(2120691752,64,FLEN)
NAN_BOXED(2139095039,64,FLEN)
NAN_BOXED(2123639857,64,FLEN)
NAN_BOXED(2122760167,64,FLEN)
NAN_BOXED(2139095039,64,FLEN)
NAN_BOXED(2128632393,64,FLEN)
NAN_BOXED(2133695314,64,FLEN)
NAN_BOXED(2139095039,64,FLEN)
NAN_BOXED(2134006664,64,FLEN)
NAN_BOXED(2133093836,64,FLEN)
NAN_BOXED(2139095039,64,FLEN)
NAN_BOXED(2130764399,64,FLEN)
NAN_BOXED(2113570144,64,FLEN)
NAN_BOXED(2139095039,64,FLEN)
NAN_BOXED(2134455715,64,FLEN)
NAN_BOXED(2133701533,64,FLEN)
NAN_BOXED(2139095039,64,FLEN)
NAN_BOXED(2131299720,64,FLEN)
NAN_BOXED(2116166875,64,FLEN)
NAN_BOXED(2139095039,64,FLEN)
test_dataset_1:
NAN_BOXED(2128362629,32,FLEN)
NAN_BOXED(2119882986,32,FLEN)
NAN_BOXED(2139095039,32,FLEN)
NAN_BOXED(2133062906,32,FLEN)
NAN_BOXED(2134772465,32,FLEN)
NAN_BOXED(2139095039,32,FLEN)
NAN_BOXED(2132391644,32,FLEN)
NAN_BOXED(2124258825,32,FLEN)
NAN_BOXED(2139095039,32,FLEN)
NAN_BOXED(2120332638,32,FLEN)
NAN_BOXED(2131991464,32,FLEN)
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NAN_BOXED(2139095039,32,FLEN)
NAN_BOXED(2120610080,32,FLEN)
NAN_BOXED(2133139263,32,FLEN)
NAN_BOXED(2139095039,32,FLEN)
NAN_BOXED(2129063035,32,FLEN)
NAN_BOXED(2131463516,32,FLEN)
NAN_BOXED(2139095039,32,FLEN)
NAN_BOXED(2132012409,32,FLEN)
NAN_BOXED(2130587419,32,FLEN)
NAN_BOXED(2139095039,32,FLEN)
NAN_BOXED(2127107039,32,FLEN)
NAN_BOXED(2125518919,32,FLEN)
NAN_BOXED(2139095039,32,FLEN)
NAN_BOXED(2127255725,32,FLEN)
NAN_BOXED(2095298021,32,FLEN)
NAN_BOXED(2139095039,32,FLEN)
NAN_BOXED(2130185289,32,FLEN)
NAN_BOXED(2125108434,32,FLEN)
NAN_BOXED(2139095039,32,FLEN)
NAN_BOXED(2134385111,32,FLEN)
NAN_BOXED(2133542414,32,FLEN)
NAN_BOXED(2139095039,32,FLEN)
NAN_BOXED(2132288216,32,FLEN)
NAN_BOXED(2129614517,32,FLEN)
NAN_BOXED(2139095039,32,FLEN)
NAN_BOXED(2122986421,32,FLEN)
NAN_BOXED(2117288708,32,FLEN)
NAN_BOXED(2139095039,32,FLEN)
NAN_BOXED(2127490575,32,FLEN)
NAN_BOXED(2134017699,32,FLEN)
NAN_BOXED(2139095039,32,FLEN)
NAN_BOXED(2133271383,32,FLEN)
NAN_BOXED(2131058665,32,FLEN)
NAN_BOXED(2139095039,32,FLEN)
NAN_BOXED(2133117626,32,FLEN)
NAN_BOXED(2129057044,32,FLEN)
NAN_BOXED(2139095039,32,FLEN)
NAN_BOXED(2131326586,32,FLEN)
NAN_BOXED(2131625650,32,FLEN)
NAN_BOXED(2139095039,32,FLEN)
NAN_BOXED(2132468210,32,FLEN)
NAN_BOXED(2134041825,32,FLEN)
NAN_BOXED(2139095039,32,FLEN)
NAN_BOXED(2124927302,32,FLEN)
NAN_BOXED(2131841193,32,FLEN)
NAN_BOXED(2139095039,32,FLEN)
NAN_BOXED(2108136593,32,FLEN)
NAN_BOXED(2097360351,32,FLEN)
NAN_BOXED(2139095039,32,FLEN)
NAN_BOXED(2115622175,32,FLEN)
NAN_BOXED(2113340898,32,FLEN)
NAN_BOXED(2139095039,32,FLEN)
NAN_BOXED(2131116776,32,FLEN)
NAN_BOXED(2127454227,32,FLEN)
NAN_BOXED(2139095039,32,FLEN)
NAN_BOXED(2130267932,32,FLEN)
NAN_BOXED(2120874139,32,FLEN)
NAN_BOXED(2139095039,32,FLEN)
NAN_BOXED(2131844330,32,FLEN)
NAN_BOXED(2124032232,32,FLEN)
NAN_BOXED(2139095039,32,FLEN)
NAN_BOXED(2133635036,32,FLEN)
NAN_BOXED(2131373644,32,FLEN)
NAN_BOXED(2139095039,32,FLEN)
NAN_BOXED(2123265061,32,FLEN)
NAN_BOXED(2127250270,32,FLEN)
NAN_BOXED(2139095039,32,FLEN)
NAN_BOXED(2116807195,32,FLEN)
NAN_BOXED(2063908042,32,FLEN)
NAN_BOXED(2139095039,32,FLEN)
NAN_BOXED(2132172511,32,FLEN)
NAN_BOXED(2111594884,32,FLEN)
NAN_BOXED(2139095039,32,FLEN)
NAN_BOXED(2115370355,32,FLEN)
NAN_BOXED(2116074388,32,FLEN)
NAN_BOXED(2139095039,32,FLEN)
NAN_BOXED(2082590443,32,FLEN)
NAN_BOXED(2132855623,32,FLEN)
NAN_BOXED(2139095039,32,FLEN)
NAN_BOXED(2117334870,32,FLEN)
NAN_BOXED(2134845934,32,FLEN)
NAN_BOXED(2139095039,32,FLEN)
NAN_BOXED(2132842944,32,FLEN)
NAN_BOXED(2125917036,32,FLEN)
NAN_BOXED(2139095039,32,FLEN)
NAN_BOXED(2112313545,32,FLEN)
NAN_BOXED(2129906006,32,FLEN)
NAN_BOXED(2139095039,32,FLEN)
NAN_BOXED(2127095501,32,FLEN)
NAN_BOXED(2131644930,32,FLEN)
NAN_BOXED(2139095039,32,FLEN)
NAN_BOXED(2101654622,32,FLEN)
NAN_BOXED(2131858568,32,FLEN)
NAN_BOXED(2139095039,32,FLEN)
NAN_BOXED(2120703905,32,FLEN)
NAN_BOXED(2092861763,32,FLEN)
NAN_BOXED(2139095039,32,FLEN)
NAN_BOXED(2132395588,32,FLEN)
NAN_BOXED(2125118470,32,FLEN)
NAN_BOXED(2139095039,32,FLEN)
NAN_BOXED(2133237010,32,FLEN)
NAN_BOXED(2121336214,32,FLEN)
NAN_BOXED(2139095039,32,FLEN)
NAN_BOXED(2127017280,32,FLEN)
NAN_BOXED(2130133205,32,FLEN)
NAN_BOXED(2139095039,32,FLEN)
NAN_BOXED(2126688963,32,FLEN)
NAN_BOXED(2124780506,32,FLEN)
NAN_BOXED(2139095039,32,FLEN)
NAN_BOXED(2127043813,32,FLEN)
NAN_BOXED(2127730920,32,FLEN)
NAN_BOXED(2139095039,32,FLEN)
RVTEST_DATA_END

RVMODEL_DATA_BEGIN
rvtest_sig_begin:
sig_begin_canary:
CANARY;



signature_x1_0:
    .fill 0*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_1:
    .fill 48*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_0:
    .fill 256*((SIGALIGN)/4),4,0xdeadbeef


signature_x9_1:
    .fill 120*((SIGALIGN)/4),4,0xdeadbeef

#ifdef rvtest_mtrap_routine
tsig_begin_canary:
CANARY;

mtrap_sigptr:
    .fill 64*XLEN/32,4,0xdeadbeef

tsig_end_canary:
CANARY;
#endif

#ifdef rvtest_gpr_save

gpr_save:
    .fill 32*XLEN/32,4,0xdeadbeef

#endif


sig_end_canary:
CANARY;
rvtest_sig_end:
RVMODEL_DATA_END
