drm/vmwgfx: Update device headers (ebc9ac7c) · Commits · github.com / miet-riscv-workgroup / linux

drivers/gpu/drm/vmwgfx/device_include/includeCheck.h

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		/*
		* Intentionally empty file.
		*/

drivers/gpu/drm/vmwgfx/device_include/svga3d_caps.h

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		/* SPDX-License-Identifier: GPL-2.0 OR MIT */
		/**********************************************************
		* Copyright 2007-2015 VMware, Inc.
		*
		* Permission is hereby granted, free of charge, to any person
		* obtaining a copy of this software and associated documentation
		* files (the "Software"), to deal in the Software without
		* restriction, including without limitation the rights to use, copy,
		* modify, merge, publish, distribute, sublicense, and/or sell copies
		* of the Software, and to permit persons to whom the Software is
		* furnished to do so, subject to the following conditions:
		*
		* The above copyright notice and this permission notice shall be
		* included in all copies or substantial portions of the Software.
		*
		* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
		* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
		* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
		* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
		* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
		* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
		* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
		* SOFTWARE.
		*
		**********************************************************/

		/*
		* svga3d_caps.h --
		*
		* Definitions for SVGA3D hardware capabilities. Capabilities
		* are used to query for optional rendering features during
		* driver initialization. The capability data is stored as very
		* basic key/value dictionary within the "FIFO register" memory
		* area at the beginning of BAR2.
		*
		* Note that these definitions are only for 3D capabilities.
		* The SVGA device also has "device capabilities" and "FIFO
		* capabilities", which are non-3D-specific and are stored as
		* bitfields rather than key/value pairs.
		*/

		#ifndef _SVGA3D_CAPS_H_
		#define _SVGA3D_CAPS_H_

		#define INCLUDE_ALLOW_MODULE
		#define INCLUDE_ALLOW_USERLEVEL

		#include "includeCheck.h"

		#include "svga_reg.h"

		#define SVGA_FIFO_3D_CAPS_SIZE (SVGA_FIFO_3D_CAPS_LAST - \
		SVGA_FIFO_3D_CAPS + 1)


		/*
		* SVGA3dCapsRecordType
		*
		* Record types that can be found in the caps block.
		* Related record types are grouped together numerically so that
		* SVGA3dCaps_FindRecord() can be applied on a range of record
		* types.
		*/

		typedef enum {
		SVGA3DCAPS_RECORD_UNKNOWN = 0,
		SVGA3DCAPS_RECORD_DEVCAPS_MIN = 0x100,
		SVGA3DCAPS_RECORD_DEVCAPS = 0x100,
		SVGA3DCAPS_RECORD_DEVCAPS_MAX = 0x1ff,
		} SVGA3dCapsRecordType;


		/*
		* SVGA3dCapsRecordHeader
		*
		* Header field leading each caps block record. Contains the offset (in
		* register words, NOT bytes) to the next caps block record (or the end
		* of caps block records which will be a zero word) and the record type
		* as defined above.
		*/

		typedef
		#include "vmware_pack_begin.h"
		struct SVGA3dCapsRecordHeader {
		uint32 length;
		SVGA3dCapsRecordType type;
		}
		#include "vmware_pack_end.h"
		SVGA3dCapsRecordHeader;


		/*
		* SVGA3dCapsRecord
		*
		* Caps block record; "data" is a placeholder for the actual data structure
		* contained within the record;
		*/

		typedef
		#include "vmware_pack_begin.h"
		struct SVGA3dCapsRecord {
		SVGA3dCapsRecordHeader header;
		uint32 data[1];
		}
		#include "vmware_pack_end.h"
		SVGA3dCapsRecord;


		typedef uint32 SVGA3dCapPair[2];

		#endif

drivers/gpu/drm/vmwgfx/device_include/svga3d_cmd.h

+1459 −2221

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drivers/gpu/drm/vmwgfx/device_include/svga3d_devcaps.h

+327 −466

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		/* SPDX-License-Identifier: GPL-2.0 OR MIT */
		/**********************************************************
		* Copyright 1998-2019 VMware, Inc.
		* Copyright 1998-2021 VMware, Inc.
		* SPDX-License-Identifier: GPL-2.0 OR MIT
		*
		* Permission is hereby granted, free of charge, to any person
		* obtaining a copy of this software and associated documentation
		@@ -30,28 +30,13 @@
		* SVGA 3d caps definitions
		*/

		#ifndef _SVGA3D_DEVCAPS_H_
		#define _SVGA3D_DEVCAPS_H_

		#define INCLUDE_ALLOW_MODULE
		#define INCLUDE_ALLOW_USERLEVEL
		#define INCLUDE_ALLOW_VMCORE

		#include "includeCheck.h"
		#ifndef _SVGA3D_DEVCAPS_H_
		#define _SVGA3D_DEVCAPS_H_

		#include "svga3d_types.h"

		/*
		* 3D Hardware Version
		*
		* The hardware version is stored in the SVGA_FIFO_3D_HWVERSION fifo
		* register. Is set by the host and read by the guest. This lets
		* us make new guest drivers which are backwards-compatible with old
		* SVGA hardware revisions. It does not let us support old guest
		* drivers. Good enough for now.
		*
		*/

		#define SVGA3D_MAKE_HWVERSION(major, minor) (((major) << 16) \| ((minor)&0xFF))
		#define SVGA3D_MAJOR_HWVERSION(version) ((version) >> 16)
		#define SVGA3D_MINOR_HWVERSION(version) ((version)&0xFF)
		@@ -67,23 +52,12 @@ typedef enum {
		SVGA3D_HWVERSION_CURRENT = SVGA3D_HWVERSION_WS8_B1,
		} SVGA3dHardwareVersion;

		/*
		* DevCap indexes.
		*/

		typedef uint32 SVGA3dDevCapIndex;

		#define SVGA3D_DEVCAP_INVALID ((uint32)-1)
		#define SVGA3D_DEVCAP_3D 0
		#define SVGA3D_DEVCAP_MAX_LIGHTS 1

		/*
		* SVGA3D_DEVCAP_MAX_TEXTURES reflects the maximum number of
		* fixed-function texture units available. Each of these units
		* work in both FFP and Shader modes, and they support texture
		* transforms and texture coordinates. The host may have additional
		* texture image units that are only usable with shaders.
		*/
		#define SVGA3D_DEVCAP_MAX_TEXTURES 2
		#define SVGA3D_DEVCAP_MAX_CLIP_PLANES 3
		#define SVGA3D_DEVCAP_VERTEX_SHADER_VERSION 4
		@@ -145,20 +119,10 @@ typedef uint32 SVGA3dDevCapIndex;
		#define SVGA3D_DEVCAP_SURFACEFMT_ARGB_S10E5 60
		#define SVGA3D_DEVCAP_SURFACEFMT_ARGB_S23E8 61

		/*
		* There is a hole in our devcap definitions for
		* historical reasons.
		*
		* Define a constant just for completeness.
		*/
		#define SVGA3D_DEVCAP_MISSING62 62

		#define SVGA3D_DEVCAP_MAX_VERTEX_SHADER_TEXTURES 63

		/*
		* Note that MAX_SIMULTANEOUS_RENDER_TARGETS is a maximum count of color
		* render targets. This does not include the depth or stencil targets.
		*/
		#define SVGA3D_DEVCAP_MAX_SIMULTANEOUS_RENDER_TARGETS 64

		#define SVGA3D_DEVCAP_SURFACEFMT_V16U16 65
		@@ -167,9 +131,6 @@ typedef uint32 SVGA3dDevCapIndex;
		#define SVGA3D_DEVCAP_SURFACEFMT_UYVY 68
		#define SVGA3D_DEVCAP_SURFACEFMT_YUY2 69

		/*
		* Deprecated.
		*/
		#define SVGA3D_DEVCAP_DEAD4 70
		#define SVGA3D_DEVCAP_DEAD5 71
		#define SVGA3D_DEVCAP_DEAD7 72
		@@ -179,16 +140,8 @@ typedef uint32 SVGA3dDevCapIndex;
		#define SVGA3D_DEVCAP_SURFACEFMT_NV12 75
		#define SVGA3D_DEVCAP_DEAD10 76

		/*
		* This is the maximum number of SVGA context IDs that the guest
		* can define using SVGA_3D_CMD_CONTEXT_DEFINE.
		*/
		#define SVGA3D_DEVCAP_MAX_CONTEXT_IDS 77

		/*
		* This is the maximum number of SVGA surface IDs that the guest
		* can define using SVGA_3D_CMD_SURFACE_DEFINE*.
		*/
		#define SVGA3D_DEVCAP_MAX_SURFACE_IDS 78

		#define SVGA3D_DEVCAP_SURFACEFMT_Z_DF16 79
		@@ -198,88 +151,31 @@ typedef uint32 SVGA3dDevCapIndex;
		#define SVGA3D_DEVCAP_SURFACEFMT_ATI1 82
		#define SVGA3D_DEVCAP_SURFACEFMT_ATI2 83

		/*
		* Deprecated.
		*/
		#define SVGA3D_DEVCAP_DEAD1 84
		#define SVGA3D_DEVCAP_DEAD8 85
		#define SVGA3D_DEVCAP_DEAD9 86

		#define SVGA3D_DEVCAP_LINE_AA 87 /* boolean */
		#define SVGA3D_DEVCAP_LINE_STIPPLE 88 /* boolean */
		#define SVGA3D_DEVCAP_MAX_LINE_WIDTH 89 /* float */
		#define SVGA3D_DEVCAP_MAX_AA_LINE_WIDTH 90 /* float */
		#define SVGA3D_DEVCAP_LINE_AA 87
		#define SVGA3D_DEVCAP_LINE_STIPPLE 88
		#define SVGA3D_DEVCAP_MAX_LINE_WIDTH 89
		#define SVGA3D_DEVCAP_MAX_AA_LINE_WIDTH 90

		#define SVGA3D_DEVCAP_SURFACEFMT_YV12 91

		/*
		* Deprecated.
		*/
		#define SVGA3D_DEVCAP_DEAD3 92

		/*
		* Are TS_CONSTANT, TS_COLOR_KEY, and TS_COLOR_KEY_ENABLE supported?
		*/
		#define SVGA3D_DEVCAP_TS_COLOR_KEY 93 /* boolean */
		#define SVGA3D_DEVCAP_TS_COLOR_KEY 93

		/*
		* Deprecated.
		*/
		#define SVGA3D_DEVCAP_DEAD2 94

		/*
		* Does the device support DXContexts?
		*/
		#define SVGA3D_DEVCAP_DXCONTEXT 95

		/*
		* Deprecated.
		*/
		#define SVGA3D_DEVCAP_DEAD11 96

		/*
		* What is the maximum number of vertex buffers or vertex input registers
		* that can be expected to work correctly with a DXContext?
		*
		* The guest is allowed to set up to SVGA3D_DX_MAX_VERTEXBUFFERS, but
		* anything in excess of this cap is not guaranteed to render correctly.
		*
		* Similarly, the guest can set up to SVGA3D_DX_MAX_VERTEXINPUTREGISTERS
		* input registers without the SVGA3D_DEVCAP_SM4_1 cap, or
		* SVGA3D_DX_SM41_MAX_VERTEXINPUTREGISTERS with the SVGA3D_DEVCAP_SM4_1,
		* but only the registers up to this cap value are guaranteed to render
		* correctly.
		*
		* If guest-drivers are able to expose a lower-limit, it's recommended
		* that they clamp to this value. Otherwise, the host will make a
		* best-effort on case-by-case basis if guests exceed this.
		*/
		#define SVGA3D_DEVCAP_DX_MAX_VERTEXBUFFERS 97

		/*
		* What is the maximum number of constant buffers that can be expected to
		* work correctly with a DX context?
		*
		* The guest is allowed to set up to SVGA3D_DX_MAX_CONSTBUFFERS, but
		* anything in excess of this cap is not guaranteed to render correctly.
		*
		* If guest-drivers are able to expose a lower-limit, it's recommended
		* that they clamp to this value. Otherwise, the host will make a
		* best-effort on case-by-case basis if guests exceed this.
		*/
		#define SVGA3D_DEVCAP_DX_MAX_CONSTANT_BUFFERS 98

		/*
		* Does the device support provoking vertex control?
		*
		* If this cap is present, the provokingVertexLast field in the
		* rasterizer state is enabled. (Guests can then set it to FALSE,
		* meaning that the first vertex is the provoking vertex, or TRUE,
		* meaning that the last verteix is the provoking vertex.)
		*
		* If this cap is FALSE, then guests should set the provokingVertexLast
		* to FALSE, otherwise rendering behavior is undefined.
		*/
		#define SVGA3D_DEVCAP_DX_PROVOKING_VERTEX 99

		#define SVGA3D_DEVCAP_DXFMT_X8R8G8B8 100
		@@ -427,67 +323,32 @@ typedef uint32 SVGA3dDevCapIndex;
		#define SVGA3D_DEVCAP_DXFMT_BC4_UNORM 242
		#define SVGA3D_DEVCAP_DXFMT_BC5_UNORM 243

		/*
		* Advertises shaderModel 4.1 support, independent blend-states,
		* cube-map arrays, and a higher vertex input registers limit.
		*
		* (See documentation on SVGA3D_DEVCAP_DX_MAX_VERTEXBUFFERS.)
		*/
		#define SVGA3D_DEVCAP_SM41 244
		#define SVGA3D_DEVCAP_MULTISAMPLE_2X 245
		#define SVGA3D_DEVCAP_MULTISAMPLE_4X 246

		/*
		* Indicates that the device has rendering support for
		* the full multisample quality. If this cap is not present,
		* the host may or may not support full quality rendering.
		*
		* See also SVGA_REG_MS_HINT_RESOLVED.
		*/
		#define SVGA3D_DEVCAP_MS_FULL_QUALITY 247

		/*
		* Advertises support for the SVGA3D LogicOps commands.
		*/
		#define SVGA3D_DEVCAP_LOGICOPS 248

		/*
		* Advertises support for using logicOps in the DXBlendStates.
		*/
		#define SVGA3D_DEVCAP_LOGIC_BLENDOPS 249

		/*
		* Note DXFMT range is now non-contiguous.
		*/
		#define SVGA3D_DEVCAP_RESERVED_1 250
		#define SVGA3D_DEVCAP_DEAD12 250

		#define SVGA3D_DEVCAP_DXFMT_BC6H_TYPELESS 251
		#define SVGA3D_DEVCAP_DXFMT_BC6H_UF16 252
		#define SVGA3D_DEVCAP_DXFMT_BC6H_SF16 253
		#define SVGA3D_DEVCAP_DXFMT_BC7_TYPELESS 254
		#define SVGA3D_DEVCAP_DXFMT_BC7_UNORM 255
		#define SVGA3D_DEVCAP_DXFMT_BC7_UNORM_SRGB 256
		#define SVGA3D_DEVCAP_RESERVED_2 257

		#define SVGA3D_DEVCAP_DEAD13 257

		#define SVGA3D_DEVCAP_SM5 258
		#define SVGA3D_DEVCAP_MULTISAMPLE_8X 259

		/* This must be the last index. */
		#define SVGA3D_DEVCAP_MAX 260
		#define SVGA3D_DEVCAP_MAX 262

		/*
		* Bit definitions for DXFMT devcaps
		*
		*
		* SUPPORTED: Can the format be defined?
		* SHADER_SAMPLE: Can the format be sampled from a shader?
		* COLOR_RENDERTARGET: Can the format be a color render target?
		* DEPTH_RENDERTARGET: Can the format be a depth render target?
		* BLENDABLE: Is the format blendable?
		* MIPS: Does the format support mip levels?
		* ARRAY: Does the format support texture arrays?
		* VOLUME: Does the format support having volume?
		* MULTISAMPLE: Does the format support multisample?
		*/
		#define SVGA3D_DXFMT_SUPPORTED (1 << 0)
		#define SVGA3D_DXFMT_SHADER_SAMPLE (1 << 1)
		#define SVGA3D_DXFMT_COLOR_RENDERTARGET (1 << 2)
		@@ -507,4 +368,4 @@ typedef union {
		float f;
		} SVGA3dDevCapResult;

		#endif /* _SVGA3D_DEVCAPS_H_ */
		#endif

drivers/gpu/drm/vmwgfx/device_include/svga3d_dx.h

+1580 −1923

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