Commit aa264238 authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'stm32-dt-for-v4.18-1' of...

Merge tag 'stm32-dt-for-v4.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into next/dt

STM32 DT updates for v4.18, round 1

Highlights:
-----------
-MCU platforms updates:
 -Update pwm-cells for stm32h743
 -Add I2C support on stm32f7xx-disco boards and
  on stm32h743i-eval board
 -Add new stm32f469 dtsi file
 -Add display support on stm32f469-disco (LTDC/DSI)
  + pannel orisetech (otm8009a)

-MPU STM32MP157 platform updates:
 -Fix DTC (W=12) warnings
 -Fix IRQ type definition for usart
 -Add QSPI & NOR flash support on EV1 board
 -Add CEC support
 -Add USB host
 -Add USBPHYC support and enable it on EV1 board
 -Add LTDC and DSI support
 -Add I2C support and enable it on ED1 and EV1 boards
 -Add CRC support
 -Add RNG support
 -Add CRYP support
 -Add DAC support
 -Add LPTIMER support
 -Add VREFBUFF support
 -Add timers supports and enable timer trigger 6 on ED1 board
 -Add MDMA, DMA and DMAMUX support and enable it
 -Enable clock driver

* tag 'stm32-dt-for-v4.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32

: (42 commits)
  ARM: dts: stm32: update pwm-cells for LPTimer on stm32h743
  ARM: dts: stm32: Add I2C1 support for stm32h743i-eval Board
  ARM: dts: stm32: Add I2C support for STM32H743 SoC
  ARM: dts: stm32: Add I2C1 support for stm32f746-disco Board
  ARM: dts: stm32: Add I2C1 support for stm32f769-disco Board
  ARM: dts: stm32: Append additional I2Cs for STM32F746 SoC
  ARM: dts: stm32: Add display support on stm32f469-disco
  ARM: dts: stm32: Add new stm32f469 dtsi file with mipi dsi
  ARM: dts: stm32: Use gpio bindings in stm32f469-disco
  ARM: dts: stm32: Fix IRQ_TYPE_NONE warnings on stm32mp157c
  ARM: dts: stm32: Fix DTC warnings for stm32mp157
  ARM: dts: stm32: add flash nor support on stm32mp157c eval board
  ARM: dts: stm32: add qspi support for stm32mp157c
  ARM: dts: stm32: add cec support on stm32mp157c-ev1
  ARM: dts: stm32: add cec pins to stm32mp157c
  ARM: dts: stm32: add cec support on stm32mp157c
  ARM: dts: stm32: add USB Host (USBH) support to stm32mp157c
  ARM: dts: stm32: enable USBPHYC on stm32mp157c-ev1
  ARM: dts: stm32: add supplies to usbphyc ports on stm32mp157c-ed1
  ARM: dts: stm32: add USBPHYC support to stm32mp157c
  ...

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents edb52033 0a84a000
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+51 −2
Original line number Diff line number Diff line
@@ -46,7 +46,7 @@
 */

/dts-v1/;
#include "stm32f429.dtsi"
#include "stm32f469.dtsi"
#include "stm32f469-pinctrl.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
@@ -112,7 +112,7 @@
	vcc5v_otg: vcc5v-otg-regulator {
		compatible = "regulator-fixed";
		enable-active-high;
		gpio = <&gpiob 2 0>;
		gpio = <&gpiob 2 GPIO_ACTIVE_HIGH>;
		regulator-name = "vcc5_host1";
		regulator-always-on;
	};
@@ -126,6 +126,55 @@
	clock-frequency = <8000000>;
};

&dsi {
	#address-cells = <1>;
	#size-cells = <0>;
	status = "okay";

	ports {
		#address-cells = <1>;
		#size-cells = <0>;

		port@0 {
			reg = <0>;
			dsi_in: endpoint {
				remote-endpoint = <&ltdc_out_dsi>;
			};
		};

		port@1 {
			reg = <1>;
			dsi_out: endpoint {
				remote-endpoint = <&dsi_panel_in>;
			};
		};
	};

	panel-dsi@0 {
		compatible = "orisetech,otm8009a";
		reg = <0>; /* dsi virtual channel (0..3) */
		reset-gpios = <&gpioh 7 GPIO_ACTIVE_LOW>;
		status = "okay";

		port {
			dsi_panel_in: endpoint {
				remote-endpoint = <&dsi_out>;
			};
		};
	};
};

&ltdc {
	dma-ranges;
	status = "okay";

	port {
		ltdc_out_dsi: endpoint@0 {
			remote-endpoint = <&dsi_in>;
		};
	};
};

&rtc {
	status = "okay";
};
+19 −0
Original line number Diff line number Diff line
/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
/* Copyright (C) STMicroelectronics 2017 - All Rights Reserved */

#include "stm32f429.dtsi"

/ {
	soc {
		dsi: dsi@40016c00 {
			compatible = "st,stm32-dsi";
			reg = <0x40016c00 0x800>;
			interrupts = <92>;
			resets = <&rcc STM32F4_APB2_RESET(DSI)>;
			reset-names = "apb";
			clocks = <&rcc 1 CLK_F469_DSI>, <&clk_hse>;
			clock-names = "pclk", "ref";
			status = "disabled";
		};
	};
};
+8 −0
Original line number Diff line number Diff line
@@ -90,6 +90,14 @@
	clock-frequency = <25000000>;
};

&i2c1 {
	pinctrl-0 = <&i2c1_pins_b>;
	pinctrl-names = "default";
	i2c-scl-rising-time-ns = <185>;
	i2c-scl-falling-time-ns = <20>;
	status = "okay";
};

&sdio1 {
	status = "okay";
	vmmc-supply = <&mmc_vcard>;
+36 −0
Original line number Diff line number Diff line
@@ -345,6 +345,42 @@
			status = "disabled";
		};

		i2c2: i2c@40005800 {
			compatible = "st,stm32f7-i2c";
			reg = <0x40005800 0x400>;
			interrupts = <33>,
				     <34>;
			resets = <&rcc STM32F7_APB1_RESET(I2C2)>;
			clocks = <&rcc 1 CLK_I2C2>;
			#address-cells = <1>;
			#size-cells = <0>;
			status = "disabled";
		};

		i2c3: i2c@40005C00 {
			compatible = "st,stm32f7-i2c";
			reg = <0x40005C00 0x400>;
			interrupts = <72>,
				     <73>;
			resets = <&rcc STM32F7_APB1_RESET(I2C3)>;
			clocks = <&rcc 1 CLK_I2C3>;
			#address-cells = <1>;
			#size-cells = <0>;
			status = "disabled";
		};

		i2c4: i2c@40006000 {
			compatible = "st,stm32f7-i2c";
			reg = <0x40006000 0x400>;
			interrupts = <95>,
				     <96>;
			resets = <&rcc STM32F7_APB1_RESET(I2C4)>;
			clocks = <&rcc 1 CLK_I2C4>;
			#address-cells = <1>;
			#size-cells = <0>;
			status = "disabled";
		};

		cec: cec@40006c00 {
			compatible = "st,stm32-cec";
			reg = <0x40006C00 0x400>;
+8 −0
Original line number Diff line number Diff line
@@ -111,6 +111,14 @@
	clock-frequency = <25000000>;
};

&i2c1 {
	pinctrl-0 = <&i2c1_pins_b>;
	pinctrl-names = "default";
	i2c-scl-rising-time-ns = <185>;
	i2c-scl-falling-time-ns = <20>;
	status = "okay";
};

&rtc {
	status = "okay";
};
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