Commit 95f04048 authored by Linus Walleij's avatar Linus Walleij
Browse files

ARM: dts: ux500: Add reset lines to IP blocks 



The new reset controller makes is possible to add reset lines to a host
of IP blocks in the DB8500/U8500.

Cc: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent fa55b7dc

arch/arm/boot/dts/ste-dbx5x0.dtsi

+26 −0
Original line number Diff line number Diff line
@@ -5,6 +5,7 @@ 


#include <dt-bindings/interrupt-controller/irq.h>

#include <dt-bindings/interrupt-controller/arm-gic.h>

#include <dt-bindings/reset/stericsson,db8500-prcc-reset.h>

#include <dt-bindings/mfd/dbx500-prcmu.h>

#include <dt-bindings/arm/ux500_pm_domains.h>

#include <dt-bindings/gpio/gpio.h>
@@ -300,6 +301,10 @@ 
				#clock-cells = <2>;

			};



			prcc_reset: prcc-reset-controller {

				#reset-cells = <2>;

			};



			rtc_clk: rtc32k-clock {

				#clock-cells = <0>;

			};
@@ -662,6 +667,7 @@ 
			clocks = <&prcc_kclk 3 3>, <&prcc_pclk 3 3>;

			clock-names = "i2cclk", "apb_pclk";

			power-domains = <&pm_domains DOMAIN_VAPE>;

			resets = <&prcc_reset DB8500_PRCC_3 DB8500_PRCC_3_RESET_I2C0>;



			status = "disabled";

		};
@@ -680,6 +686,7 @@ 
			clocks = <&prcc_kclk 1 2>, <&prcc_pclk 1 2>;

			clock-names = "i2cclk", "apb_pclk";

			power-domains = <&pm_domains DOMAIN_VAPE>;

			resets = <&prcc_reset DB8500_PRCC_1 DB8500_PRCC_1_RESET_I2C1>;



			status = "disabled";

		};
@@ -698,6 +705,7 @@ 
			clocks = <&prcc_kclk 1 6>, <&prcc_pclk 1 6>;

			clock-names = "i2cclk", "apb_pclk";

			power-domains = <&pm_domains DOMAIN_VAPE>;

			resets = <&prcc_reset DB8500_PRCC_1 DB8500_PRCC_1_RESET_I2C2>;



			status = "disabled";

		};
@@ -716,6 +724,7 @@ 
			clocks = <&prcc_kclk 2 0>, <&prcc_pclk 2 0>;

			clock-names = "i2cclk", "apb_pclk";

			power-domains = <&pm_domains DOMAIN_VAPE>;

			resets = <&prcc_reset DB8500_PRCC_2 DB8500_PRCC_2_RESET_I2C3>;



			status = "disabled";

		};
@@ -734,6 +743,7 @@ 
			clocks = <&prcc_kclk 1 9>, <&prcc_pclk 1 10>;

			clock-names = "i2cclk", "apb_pclk";

			power-domains = <&pm_domains DOMAIN_VAPE>;

			resets = <&prcc_reset DB8500_PRCC_1 DB8500_PRCC_1_RESET_I2C4>;



			status = "disabled";

		};
@@ -750,6 +760,7 @@ 
			       <&dma 8 0 0x0>; /* Logical - MemToDev */

			dma-names = "rx", "tx";

			power-domains = <&pm_domains DOMAIN_VAPE>;

			resets = <&prcc_reset DB8500_PRCC_3 DB8500_PRCC_3_RESET_SSP0>;



			status = "disabled";

		};
@@ -766,6 +777,7 @@ 
			       <&dma 9 0 0x0>; /* Logical - MemToDev */

			dma-names = "rx", "tx";

			power-domains = <&pm_domains DOMAIN_VAPE>;

			resets = <&prcc_reset DB8500_PRCC_3 DB8500_PRCC_3_RESET_SSP1>;



			status = "disabled";

		};
@@ -834,6 +846,7 @@ 
			       <&dma 40 0 0x0>; /* Logical - MemToDev */

			dma-names = "rx", "tx";

			power-domains = <&pm_domains DOMAIN_VAPE>;

			resets = <&prcc_reset DB8500_PRCC_1 DB8500_PRCC_1_RESET_SPI3>;



			status = "disabled";

		};
@@ -849,6 +862,7 @@ 


			clocks = <&prcc_kclk 1 0>, <&prcc_pclk 1 0>;

			clock-names = "uart", "apb_pclk";

			resets = <&prcc_reset DB8500_PRCC_1 DB8500_PRCC_1_RESET_UART0>;



			status = "disabled";

		};
@@ -864,6 +878,7 @@ 


			clocks = <&prcc_kclk 1 1>, <&prcc_pclk 1 1>;

			clock-names = "uart", "apb_pclk";

			resets = <&prcc_reset DB8500_PRCC_1 DB8500_PRCC_1_RESET_UART1>;



			status = "disabled";

		};
@@ -879,6 +894,7 @@ 


			clocks = <&prcc_kclk 3 6>, <&prcc_pclk 3 6>;

			clock-names = "uart", "apb_pclk";

			resets = <&prcc_reset DB8500_PRCC_3 DB8500_PRCC_3_RESET_UART2>;



			status = "disabled";

		};
@@ -895,6 +911,7 @@ 
			clocks = <&prcc_kclk 1 5>, <&prcc_pclk 1 5>;

			clock-names = "sdi", "apb_pclk";

			power-domains = <&pm_domains DOMAIN_VAPE>;

			resets = <&prcc_reset DB8500_PRCC_1 DB8500_PRCC_1_RESET_SDI0>;



			status = "disabled";

		};
@@ -911,6 +928,7 @@ 
			clocks = <&prcc_kclk 2 4>, <&prcc_pclk 2 6>;

			clock-names = "sdi", "apb_pclk";

			power-domains = <&pm_domains DOMAIN_VAPE>;

			resets = <&prcc_reset DB8500_PRCC_2 DB8500_PRCC_2_RESET_SDI1>;



			status = "disabled";

		};
@@ -927,6 +945,7 @@ 
			clocks = <&prcc_kclk 3 4>, <&prcc_pclk 3 4>;

			clock-names = "sdi", "apb_pclk";

			power-domains = <&pm_domains DOMAIN_VAPE>;

			resets = <&prcc_reset DB8500_PRCC_3 DB8500_PRCC_3_RESET_SDI2>;



			status = "disabled";

		};
@@ -943,6 +962,7 @@ 
			clocks = <&prcc_kclk 2 5>, <&prcc_pclk 2 7>;

			clock-names = "sdi", "apb_pclk";

			power-domains = <&pm_domains DOMAIN_VAPE>;

			resets = <&prcc_reset DB8500_PRCC_2 DB8500_PRCC_2_RESET_SDI3>;



			status = "disabled";

		};
@@ -959,6 +979,7 @@ 
			clocks = <&prcc_kclk 2 2>, <&prcc_pclk 2 4>;

			clock-names = "sdi", "apb_pclk";

			power-domains = <&pm_domains DOMAIN_VAPE>;

			resets = <&prcc_reset DB8500_PRCC_2 DB8500_PRCC_2_RESET_SDI4>;



			status = "disabled";

		};
@@ -975,6 +996,7 @@ 
			clocks = <&prcc_kclk 3 7>, <&prcc_pclk 3 7>;

			clock-names = "sdi", "apb_pclk";

			power-domains = <&pm_domains DOMAIN_VAPE>;

			resets = <&prcc_reset DB8500_PRCC_3 DB8500_PRCC_3_RESET_SDI5>;



			status = "disabled";

		};
@@ -996,6 +1018,7 @@ 


			clocks = <&prcc_kclk 1 3>, <&prcc_pclk 1 3>;

			clock-names = "msp", "apb_pclk";

			resets = <&prcc_reset DB8500_PRCC_1 DB8500_PRCC_1_RESET_MSP0>;



			status = "disabled";

		};
@@ -1012,6 +1035,7 @@ 


			clocks = <&prcc_kclk 1 4>, <&prcc_pclk 1 4>;

			clock-names = "msp", "apb_pclk";

			resets = <&prcc_reset DB8500_PRCC_1 DB8500_PRCC_1_RESET_MSP1>;



			status = "disabled";

		};
@@ -1030,6 +1054,7 @@ 


			clocks = <&prcc_kclk 2 3>, <&prcc_pclk 2 5>;

			clock-names = "msp", "apb_pclk";

			resets = <&prcc_reset DB8500_PRCC_2 DB8500_PRCC_2_RESET_MSP2>;



			status = "disabled";

		};
@@ -1046,6 +1071,7 @@ 


			clocks = <&prcc_kclk 1 10>, <&prcc_pclk 1 11>;

			clock-names = "msp", "apb_pclk";

			resets = <&prcc_reset DB8500_PRCC_1 DB8500_PRCC_1_RESET_MSP3>;



			status = "disabled";

		};