Commit 6a1d0696 authored by Qii Wang's avatar Qii Wang Committed by Greg Kroah-Hartman
Browse files

i2c: mediatek: move dma reset before i2c reset 



[ Upstream commit aafced67 ]

The i2c driver default do dma reset after i2c reset, but sometimes
i2c reset will trigger dma tx2rx, then apdma write data to dram
which has been i2c_put_dma_safe_msg_buf(kfree). Move dma reset
before i2c reset in mtk_i2c_init_hw to fix it.

Signed-off-by: default avatarQii Wang <qii.wang@mediatek.com>
Signed-off-by: default avatarWolfram Sang <wsa@kernel.org>
Signed-off-by: default avatarSasha Levin <sashal@kernel.org>
parent fdcbd5e0

drivers/i2c/busses/i2c-mt65xx.c

+4 −4
Original line number Diff line number Diff line
@@ -475,6 +475,10 @@ static void mtk_i2c_init_hw(struct mtk_i2c *i2c) 
{

	u16 control_reg;



	writel(I2C_DMA_HARD_RST, i2c->pdmabase + OFFSET_RST);

	udelay(50);

	writel(I2C_DMA_CLR_FLAG, i2c->pdmabase + OFFSET_RST);



	mtk_i2c_writew(i2c, I2C_SOFT_RST, OFFSET_SOFTRESET);



	/* Set ioconfig */
@@ -529,10 +533,6 @@ static void mtk_i2c_init_hw(struct mtk_i2c *i2c) 


	mtk_i2c_writew(i2c, control_reg, OFFSET_CONTROL);

	mtk_i2c_writew(i2c, I2C_DELAY_LEN, OFFSET_DELAY_LEN);



	writel(I2C_DMA_HARD_RST, i2c->pdmabase + OFFSET_RST);

	udelay(50);

	writel(I2C_DMA_CLR_FLAG, i2c->pdmabase + OFFSET_RST);

}



static const struct i2c_spec_values *mtk_i2c_get_spec(unsigned int speed)