Loading arch/blackfin/kernel/time.c +2 −2 Original line number Diff line number Diff line Loading @@ -51,7 +51,7 @@ void __init setup_core_timer(void) u32 tcount; /* power up the timer, but don't enable it just yet */ bfin_write_TCNTL(1); bfin_write_TCNTL(TMPWR); CSYNC(); /* the TSCALE prescaler counter */ Loading @@ -64,7 +64,7 @@ void __init setup_core_timer(void) /* now enable the timer */ CSYNC(); bfin_write_TCNTL(7); bfin_write_TCNTL(TAUTORLD | TMREN | TMPWR); } #endif Loading Loading
arch/blackfin/kernel/time.c +2 −2 Original line number Diff line number Diff line Loading @@ -51,7 +51,7 @@ void __init setup_core_timer(void) u32 tcount; /* power up the timer, but don't enable it just yet */ bfin_write_TCNTL(1); bfin_write_TCNTL(TMPWR); CSYNC(); /* the TSCALE prescaler counter */ Loading @@ -64,7 +64,7 @@ void __init setup_core_timer(void) /* now enable the timer */ CSYNC(); bfin_write_TCNTL(7); bfin_write_TCNTL(TAUTORLD | TMREN | TMPWR); } #endif Loading