Commit ff96ddc3 authored by Lijo Lazar's avatar Lijo Lazar Committed by Alex Deucher
Browse files

drm/amdgpu: Add more fields to IP version



Include subrevision and variant fileds also to IP version.

Signed-off-by: default avatarLijo Lazar <lijo.lazar@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent f8754f58
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+13 −5
Original line number Diff line number Diff line
@@ -681,10 +681,15 @@ enum amd_hw_ip_block_type {
#define HWIP_MAX_INSTANCE	44

#define HW_ID_MAX		300
#define IP_VERSION(mj, mn, rv) (((mj) << 16) | ((mn) << 8) | (rv))
#define IP_VERSION_MAJ(ver) ((ver) >> 16)
#define IP_VERSION_MIN(ver) (((ver) >> 8) & 0xFF)
#define IP_VERSION_REV(ver) ((ver) & 0xFF)
#define IP_VERSION_FULL(mj, mn, rv, var, srev) \
	(((mj) << 24) | ((mn) << 16) | ((rv) << 8) | ((var) << 4) | (srev))
#define IP_VERSION(mj, mn, rv)		IP_VERSION_FULL(mj, mn, rv, 0, 0)
#define IP_VERSION_MAJ(ver)		((ver) >> 24)
#define IP_VERSION_MIN(ver)		(((ver) >> 16) & 0xFF)
#define IP_VERSION_REV(ver)		(((ver) >> 8) & 0xFF)
#define IP_VERSION_VARIANT(ver)		(((ver) >> 4) & 0xF)
#define IP_VERSION_SUBREV(ver)		((ver) & 0xF)
#define IP_VERSION_MAJ_MIN_REV(ver)	((ver) >> 8)

struct amdgpu_ip_map_info {
	/* Map of logical to actual dev instances/mask */
@@ -1104,7 +1109,10 @@ struct amdgpu_device {
static inline uint32_t amdgpu_ip_version(const struct amdgpu_device *adev,
					 uint8_t ip, uint8_t inst)
{
	return adev->ip_versions[ip][inst];
	/* This considers only major/minor/rev and ignores
	 * subrevision/variant fields.
	 */
	return adev->ip_versions[ip][inst] & ~0xFFU;
}

#ifdef CONFIG_DEV_COREDUMP
+17 −3
Original line number Diff line number Diff line
@@ -1191,6 +1191,7 @@ static void amdgpu_discovery_sysfs_fini(struct amdgpu_device *adev)

static int amdgpu_discovery_reg_base_init(struct amdgpu_device *adev)
{
	uint8_t num_base_address, subrev, variant;
	struct binary_header *bhdr;
	struct ip_discovery_header *ihdr;
	struct die_header *dhdr;
@@ -1199,7 +1200,6 @@ static int amdgpu_discovery_reg_base_init(struct amdgpu_device *adev)
	uint16_t ip_offset;
	uint16_t num_dies;
	uint16_t num_ips;
	uint8_t num_base_address;
	int hw_ip;
	int i, j, k;
	int r;
@@ -1337,8 +1337,22 @@ static int amdgpu_discovery_reg_base_init(struct amdgpu_device *adev)
					 * example.  On most chips there are multiple instances
					 * with the same HWID.
					 */
					adev->ip_versions[hw_ip][ip->instance_number] =
						IP_VERSION(ip->major, ip->minor, ip->revision);

					if (ihdr->version < 3) {
						subrev = 0;
						variant = 0;
					} else {
						subrev = ip->sub_revision;
						variant = ip->variant;
					}

					adev->ip_versions[hw_ip]
							 [ip->instance_number] =
						IP_VERSION_FULL(ip->major,
								ip->minor,
								ip->revision,
								variant,
								subrev);
				}
			}

+5 −5
Original line number Diff line number Diff line
@@ -540,25 +540,25 @@ static int amdgpu_hw_ip_info(struct amdgpu_device *adev,
		switch (type) {
		case AMD_IP_BLOCK_TYPE_GFX:
			result->ip_discovery_version =
				amdgpu_ip_version(adev, GC_HWIP, 0);
				IP_VERSION_MAJ_MIN_REV(amdgpu_ip_version(adev, GC_HWIP, 0));
			break;
		case AMD_IP_BLOCK_TYPE_SDMA:
			result->ip_discovery_version =
				amdgpu_ip_version(adev, SDMA0_HWIP, 0);
				IP_VERSION_MAJ_MIN_REV(amdgpu_ip_version(adev, SDMA0_HWIP, 0));
			break;
		case AMD_IP_BLOCK_TYPE_UVD:
		case AMD_IP_BLOCK_TYPE_VCN:
		case AMD_IP_BLOCK_TYPE_JPEG:
			result->ip_discovery_version =
				amdgpu_ip_version(adev, UVD_HWIP, 0);
				IP_VERSION_MAJ_MIN_REV(amdgpu_ip_version(adev, UVD_HWIP, 0));
			break;
		case AMD_IP_BLOCK_TYPE_VCE:
			result->ip_discovery_version =
				amdgpu_ip_version(adev, VCE_HWIP, 0);
				IP_VERSION_MAJ_MIN_REV(amdgpu_ip_version(adev, VCE_HWIP, 0));
			break;
		case AMD_IP_BLOCK_TYPE_VPE:
			result->ip_discovery_version =
				amdgpu_ip_version(adev, VPE_HWIP, 0);
				IP_VERSION_MAJ_MIN_REV(amdgpu_ip_version(adev, VPE_HWIP, 0));
			break;
		default:
			result->ip_discovery_version = 0;