Commit fb5d375d authored by Tomasz Figa's avatar Tomasz Figa Committed by Kukjin Kim
Browse files

ARM: S3C64XX: Add support for synchronous clock operation 



Some boards based on S3C6410 use synchronous clocking, which means that HCLKx2
and other system clocks are generated from APLL instead of MPLL.

This patch adds support for such boards, by calculating hclk2 depending on
the status of S3C_OTHERS_SYNCMUXSEL bit in S3C64XX_OTHERS regist

Signed-off-by: default avatarTomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: default avatarKukjin Kim <kgene.kim@samsung.com>
parent d9018df0

arch/arm/mach-s3c64xx/clock.c

+7 −1
Original line number Diff line number Diff line
@@ -744,7 +744,13 @@ void __init_or_cpufreq s3c6400_setup_clocks(void) 
	printk(KERN_INFO "S3C64XX: PLL settings, A=%ld, M=%ld, E=%ld\n",

	       apll, mpll, epll);



	if(__raw_readl(S3C64XX_OTHERS) & S3C64XX_OTHERS_SYNCMUXSEL)

		/* Synchronous mode */

		hclk2 = apll / GET_DIV(clkdiv0, S3C6400_CLKDIV0_HCLK2);

	else

		/* Asynchronous mode */

		hclk2 = mpll / GET_DIV(clkdiv0, S3C6400_CLKDIV0_HCLK2);



	hclk = hclk2 / GET_DIV(clkdiv0, S3C6400_CLKDIV0_HCLK);

	pclk = hclk2 / GET_DIV(clkdiv0, S3C6400_CLKDIV0_PCLK);

arch/arm/mach-s3c64xx/include/mach/regs-sys.h

+1 −0
Original line number Diff line number Diff line
@@ -26,5 +26,6 @@ 
#define S3C64XX_OTHERS		S3C_SYSREG(0x900)



#define S3C64XX_OTHERS_USBMASK	(1 << 16)

#define S3C64XX_OTHERS_SYNCMUXSEL	(1 << 6)



#endif /* _PLAT_REGS_SYS_H */