Commit faa4763f authored by Jérôme Pouiller's avatar Jérôme Pouiller Committed by Greg Kroah-Hartman
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staging: wfx: use meaningful names for CFG_BYTE_ORDER_* 



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Signed-off-by: default avatarJérôme Pouiller <jerome.pouiller@silabs.com>
Link: https://lore.kernel.org/r/20191217161318.31402-18-Jerome.Pouiller@silabs.com


Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 9e25ec9a

drivers/staging/wfx/bus_spi.c

+2 −0
Original line number Diff line number Diff line
@@ -107,6 +107,8 @@ static int wfx_spi_copy_to_io(void *priv, unsigned int addr, 


	cpu_to_le16s(&regaddr);



	// Register address and CONFIG content always use 16bit big endian

	// ("BADC" order)

	if (bus->need_swab)

		swab16s(&regaddr);

	if (bus->need_swab && addr == WFX_REG_CONFIG)

drivers/staging/wfx/fwio.c

+1 −1
Original line number Diff line number Diff line
@@ -339,7 +339,7 @@ int wfx_init_device(struct wfx_dev *wdev) 
	ktime_t now, start;

	u32 reg;



	reg = CFG_DIRECT_ACCESS_MODE | CFG_CPU_RESET | CFG_WORD_MODE2;

	reg = CFG_DIRECT_ACCESS_MODE | CFG_CPU_RESET | CFG_BYTE_ORDER_ABCD;

	if (wdev->pdata.use_rising_clk)

		reg |= CFG_CLK_RISE_EDGE;

	ret = config_reg_write(wdev, reg);

drivers/staging/wfx/hwio.h

+5 −10
Original line number Diff line number Diff line
@@ -37,16 +37,11 @@ int ahb_reg_write(struct wfx_dev *wdev, u32 addr, u32 val); 
#define CFG_ERR_HOST_NO_IN_QUEUE   0x00000040

#define CFG_ERR_HOST_CRC_MISS      0x00000080 // only with SDIO

#define CFG_SPI_IGNORE_CS          0x00000080 // only with SPI

/* Bytes ordering (only writable in SPI): */

#define CFG_WORD_MODE_MASK         0x00000300

/*

 * B1,B0,B3,B2 (In SPI, register address and

 * CONFIG data always use this mode)

 */

#define     CFG_WORD_MODE0         0x00000000

#define     CFG_WORD_MODE1         0x00000100 //   B3,B2,B1,B0

#define     CFG_WORD_MODE2         0x00000200 //   B0,B1,B2,B3 (SDIO)

#define CFG_DIRECT_ACCESS_MODE     0x00000400 // Direct or queue access mode

#define CFG_BYTE_ORDER_MASK        0x00000300 // only writable with SPI

#define     CFG_BYTE_ORDER_BADC    0x00000000

#define     CFG_BYTE_ORDER_DCBA    0x00000100

#define     CFG_BYTE_ORDER_ABCD    0x00000200 // SDIO always use this value

#define CFG_DIRECT_ACCESS_MODE     0x00000400

#define CFG_PREFETCH_AHB           0x00000800

#define CFG_DISABLE_CPU_CLK        0x00001000

#define CFG_PREFETCH_SRAM          0x00002000