Commit f5d0906b authored by Hollis Blanchard's avatar Hollis Blanchard Committed by Avi Kivity
Browse files

KVM: ppc: remove debug support broken by KVM debug rewrite 



After the rewrite of KVM's debug support, this code doesn't even build any
more.

Signed-off-by: default avatarHollis Blanchard <hollisb@us.ibm.com>
Signed-off-by: default avatarAvi Kivity <avi@redhat.com>
parent 269e05e4

arch/powerpc/include/asm/kvm_host.h

+0 −5
Original line number Diff line number Diff line
@@ -111,11 +111,6 @@ struct kvm_arch { 
struct kvm_vcpu_arch {

	u32 host_stack;

	u32 host_pid;

	u32 host_dbcr0;

	u32 host_dbcr1;

	u32 host_dbcr2;

	u32 host_iac[4];

	u32 host_msr;



	u64 fpr[32];

	ulong gpr[32];

arch/powerpc/include/asm/kvm_ppc.h

+0 −3
Original line number Diff line number Diff line
@@ -77,9 +77,6 @@ extern int kvmppc_core_vcpu_translate(struct kvm_vcpu *vcpu, 
extern void kvmppc_core_vcpu_load(struct kvm_vcpu *vcpu, int cpu);

extern void kvmppc_core_vcpu_put(struct kvm_vcpu *vcpu);



extern void kvmppc_core_load_guest_debugstate(struct kvm_vcpu *vcpu);

extern void kvmppc_core_load_host_debugstate(struct kvm_vcpu *vcpu);



extern void kvmppc_core_deliver_interrupts(struct kvm_vcpu *vcpu);

extern int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu);

extern void kvmppc_core_queue_program(struct kvm_vcpu *vcpu);

arch/powerpc/kvm/44x.c

+0 −66
Original line number Diff line number Diff line
@@ -28,72 +28,6 @@ 


#include "44x_tlb.h"



/* Note: clearing MSR[DE] just means that the debug interrupt will not be

 * delivered *immediately*. Instead, it simply sets the appropriate DBSR bits.

 * If those DBSR bits are still set when MSR[DE] is re-enabled, the interrupt

 * will be delivered as an "imprecise debug event" (which is indicated by

 * DBSR[IDE].

 */

static void kvm44x_disable_debug_interrupts(void)

{

	mtmsr(mfmsr() & ~MSR_DE);

}



void kvmppc_core_load_host_debugstate(struct kvm_vcpu *vcpu)

{

	kvm44x_disable_debug_interrupts();



	mtspr(SPRN_IAC1, vcpu->arch.host_iac[0]);

	mtspr(SPRN_IAC2, vcpu->arch.host_iac[1]);

	mtspr(SPRN_IAC3, vcpu->arch.host_iac[2]);

	mtspr(SPRN_IAC4, vcpu->arch.host_iac[3]);

	mtspr(SPRN_DBCR1, vcpu->arch.host_dbcr1);

	mtspr(SPRN_DBCR2, vcpu->arch.host_dbcr2);

	mtspr(SPRN_DBCR0, vcpu->arch.host_dbcr0);

	mtmsr(vcpu->arch.host_msr);

}



void kvmppc_core_load_guest_debugstate(struct kvm_vcpu *vcpu)

{

	struct kvm_guest_debug *dbg = &vcpu->guest_debug;

	u32 dbcr0 = 0;



	vcpu->arch.host_msr = mfmsr();

	kvm44x_disable_debug_interrupts();



	/* Save host debug register state. */

	vcpu->arch.host_iac[0] = mfspr(SPRN_IAC1);

	vcpu->arch.host_iac[1] = mfspr(SPRN_IAC2);

	vcpu->arch.host_iac[2] = mfspr(SPRN_IAC3);

	vcpu->arch.host_iac[3] = mfspr(SPRN_IAC4);

	vcpu->arch.host_dbcr0 = mfspr(SPRN_DBCR0);

	vcpu->arch.host_dbcr1 = mfspr(SPRN_DBCR1);

	vcpu->arch.host_dbcr2 = mfspr(SPRN_DBCR2);



	/* set registers up for guest */



	if (dbg->bp[0]) {

		mtspr(SPRN_IAC1, dbg->bp[0]);

		dbcr0 |= DBCR0_IAC1 | DBCR0_IDM;

	}

	if (dbg->bp[1]) {

		mtspr(SPRN_IAC2, dbg->bp[1]);

		dbcr0 |= DBCR0_IAC2 | DBCR0_IDM;

	}

	if (dbg->bp[2]) {

		mtspr(SPRN_IAC3, dbg->bp[2]);

		dbcr0 |= DBCR0_IAC3 | DBCR0_IDM;

	}

	if (dbg->bp[3]) {

		mtspr(SPRN_IAC4, dbg->bp[3]);

		dbcr0 |= DBCR0_IAC4 | DBCR0_IDM;

	}



	mtspr(SPRN_DBCR0, dbcr0);

	mtspr(SPRN_DBCR1, 0);

	mtspr(SPRN_DBCR2, 0);

}



void kvmppc_core_vcpu_load(struct kvm_vcpu *vcpu, int cpu)

{

	kvmppc_44x_tlb_load(vcpu);

arch/powerpc/kvm/powerpc.c

+2 −25
Original line number Diff line number Diff line
@@ -221,41 +221,18 @@ void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu) 


void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)

{

	if (vcpu->guest_debug.enabled)

		kvmppc_core_load_guest_debugstate(vcpu);



	kvmppc_core_vcpu_load(vcpu, cpu);

}



void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)

{

	if (vcpu->guest_debug.enabled)

		kvmppc_core_load_host_debugstate(vcpu);



	/* Don't leave guest TLB entries resident when being de-scheduled. */

	/* XXX It would be nice to differentiate between heavyweight exit and

	 * sched_out here, since we could avoid the TLB flush for heavyweight

	 * exits. */

	_tlbil_all();

	kvmppc_core_vcpu_put(vcpu);

}



int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,

                                        struct kvm_guest_debug *dbg)

{

	int i;



	vcpu->guest_debug.enabled = dbg->enabled;

	if (vcpu->guest_debug.enabled) {

		for (i=0; i < ARRAY_SIZE(vcpu->guest_debug.bp); i++) {

			if (dbg->breakpoints[i].enabled)

				vcpu->guest_debug.bp[i] = dbg->breakpoints[i].address;

			else

				vcpu->guest_debug.bp[i] = 0;

		}

	}



	return 0;

	return -EINVAL;

}



static void kvmppc_complete_dcr_load(struct kvm_vcpu *vcpu,