Commit f0d25b5d authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'x86-mm-2023-10-28' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip 

Pull x86 mm handling updates from Ingo Molnar:

 - Add new NX-stack self-test

 - Improve NUMA partial-CFMWS handling

 - Fix #VC handler bugs resulting in SEV-SNP boot failures

 - Drop the 4MB memory size restriction on minimal NUMA nodes

 - Reorganize headers a bit, in preparation to header dependency
   reduction efforts

 - Misc cleanups & fixes

* tag 'x86-mm-2023-10-28' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/mm: Drop the 4 MB restriction on minimal NUMA node memory size
  selftests/x86/lam: Zero out buffer for readlink()
  x86/sev: Drop unneeded #include
  x86/sev: Move sev_setup_arch() to mem_encrypt.c
  x86/tdx: Replace deprecated strncpy() with strtomem_pad()
  selftests/x86/mm: Add new test that userspace stack is in fact NX
  x86/sev: Make boot_ghcb_page[] static
  x86/boot: Move x86_cache_alignment initialization to correct spot
  x86/sev-es: Set x86_virt_bits to the correct value straight away, instead of a two-phase approach
  x86/sev-es: Allow copy_from_kernel_nofault() in earlier boot
  x86_64: Show CR4.PSE on auxiliaries like on BSP
  x86/iommu/docs: Update AMD IOMMU specification document URL
  x86/sev/docs: Update document URL in amd-memory-encryption.rst
  x86/mm: Move arch_memory_failure() and arch_is_platform_page() definitions from <asm/processor.h> to <asm/pgtable.h>
  ACPI/NUMA: Apply SRAT proximity domain to entire CFMWS window
  x86/numa: Introduce numa_fill_memblks()
parents 1641b9b0 a1e2b8b3

Documentation/arch/x86/amd-memory-encryption.rst

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@@ -130,4 +130,4 @@ SNP feature support. 


More details in AMD64 APM[1] Vol 2: 15.34.10 SEV_STATUS MSR



[1] https://www.amd.com/system/files/TechDocs/40332.pdf
 
[1] https://www.amd.com/content/dam/amd/en/documents/processor-tech-docs/programmer-references/24593.pdf

Documentation/arch/x86/iommu.rst

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@@ -5,7 +5,7 @@ x86 IOMMU Support 
The architecture specs can be obtained from the below locations.



- Intel: http://www.intel.com/content/dam/www/public/us/en/documents/product-specifications/vt-directed-io-spec.pdf

- AMD: https://www.amd.com/system/files/TechDocs/48882_IOMMU.pdf

- AMD: https://www.amd.com/content/dam/amd/en/documents/processor-tech-docs/specifications/48882_3_07_PUB.pdf



This guide gives a quick cheat sheet for some basic understanding.

arch/x86/boot/compressed/sev.c

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@@ -25,7 +25,7 @@ 
#include "error.h"

#include "../msr.h"



struct ghcb boot_ghcb_page __aligned(PAGE_SIZE);

static struct ghcb boot_ghcb_page __aligned(PAGE_SIZE);

struct ghcb *boot_ghcb;



/*

arch/x86/coco/tdx/tdx.c

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@@ -119,7 +119,7 @@ static void __noreturn tdx_panic(const char *msg) 
	} message;



	/* VMM assumes '\0' in byte 65, if the message took all 64 bytes */

	strncpy(message.str, msg, 64);

	strtomem_pad(message.str, msg, '\0');



	args.r8  = message.r8;

	args.r9  = message.r9;

arch/x86/include/asm/mem_encrypt.h

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@@ -19,8 +19,10 @@ 


#ifdef CONFIG_X86_MEM_ENCRYPT

void __init mem_encrypt_init(void);

void __init mem_encrypt_setup_arch(void);

#else

static inline void mem_encrypt_init(void) { }

static inline void __init mem_encrypt_setup_arch(void) { }

#endif



#ifdef CONFIG_AMD_MEM_ENCRYPT
@@ -43,7 +45,6 @@ void __init sme_map_bootdata(char *real_mode_data); 
void __init sme_unmap_bootdata(char *real_mode_data);



void __init sme_early_init(void);

void __init sev_setup_arch(void);



void __init sme_encrypt_kernel(struct boot_params *bp);

void __init sme_enable(struct boot_params *bp);
@@ -73,7 +74,6 @@ static inline void __init sme_map_bootdata(char *real_mode_data) { } 
static inline void __init sme_unmap_bootdata(char *real_mode_data) { }



static inline void __init sme_early_init(void) { }

static inline void __init sev_setup_arch(void) { }



static inline void __init sme_encrypt_kernel(struct boot_params *bp) { }

static inline void __init sme_enable(struct boot_params *bp) { }