Loading drivers/net/benet/be.h +5 −1 Original line number Diff line number Diff line Loading @@ -213,7 +213,6 @@ struct be_adapter { u8 __iomem *csr; u8 __iomem *db; /* Door Bell */ u8 __iomem *pcicfg; /* PCI config space */ int pci_func; spinlock_t mbox_lock; /* For serializing mbox cmds to BE card */ struct be_dma_mem mbox_mem; Loading Loading @@ -264,6 +263,11 @@ extern struct ethtool_ops be_ethtool_ops; #define drvr_stats(adapter) (&adapter->stats.drvr_stats) static inline unsigned int be_pci_func(struct be_adapter *adapter) { return PCI_FUNC(adapter->pdev->devfn); } #define BE_SET_NETDEV_OPS(netdev, ops) (netdev->netdev_ops = ops) #define PAGE_SHIFT_4K 12 Loading drivers/net/benet/be_cmds.c +4 −4 Original line number Diff line number Diff line Loading @@ -388,7 +388,7 @@ int be_cmd_eq_create(struct be_adapter *adapter, req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size)); AMAP_SET_BITS(struct amap_eq_context, func, req->context, adapter->pci_func); be_pci_func(adapter)); AMAP_SET_BITS(struct amap_eq_context, valid, req->context, 1); /* 4byte eqe*/ AMAP_SET_BITS(struct amap_eq_context, size, req->context, 0); Loading Loading @@ -522,7 +522,7 @@ int be_cmd_cq_create(struct be_adapter *adapter, AMAP_SET_BITS(struct amap_cq_context, eventable, ctxt, 1); AMAP_SET_BITS(struct amap_cq_context, eqid, ctxt, eq->id); AMAP_SET_BITS(struct amap_cq_context, armed, ctxt, 1); AMAP_SET_BITS(struct amap_cq_context, func, ctxt, adapter->pci_func); AMAP_SET_BITS(struct amap_cq_context, func, ctxt, be_pci_func(adapter)); be_dws_cpu_to_le(ctxt, sizeof(req->context)); be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); Loading Loading @@ -565,7 +565,7 @@ int be_cmd_mccq_create(struct be_adapter *adapter, req->num_pages = PAGES_4K_SPANNED(q_mem->va, q_mem->size); AMAP_SET_BITS(struct amap_mcc_context, fid, ctxt, adapter->pci_func); AMAP_SET_BITS(struct amap_mcc_context, fid, ctxt, be_pci_func(adapter)); AMAP_SET_BITS(struct amap_mcc_context, valid, ctxt, 1); AMAP_SET_BITS(struct amap_mcc_context, ring_size, ctxt, be_encoded_q_len(mccq->len)); Loading Loading @@ -614,7 +614,7 @@ int be_cmd_txq_create(struct be_adapter *adapter, len_encoded = 0; AMAP_SET_BITS(struct amap_tx_context, tx_ring_size, ctxt, len_encoded); AMAP_SET_BITS(struct amap_tx_context, pci_func_id, ctxt, adapter->pci_func); be_pci_func(adapter)); AMAP_SET_BITS(struct amap_tx_context, ctx_valid, ctxt, 1); AMAP_SET_BITS(struct amap_tx_context, cq_id_send, ctxt, cq->id); Loading drivers/net/benet/be_hw.h +0 −3 Original line number Diff line number Diff line Loading @@ -51,9 +51,6 @@ * with the OS. */ #define MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK (1 << 29) /* bit 29 */ /* PCI physical function number */ #define MEMBAR_CTRL_INT_CTRL_PFUNC_MASK 0x7 /* bits 26 - 28 */ #define MEMBAR_CTRL_INT_CTRL_PFUNC_SHIFT 26 /********* ISR0 Register offset **********/ #define CEV_ISR0_OFFSET 0xC18 Loading drivers/net/benet/be_main.c +2 −6 Original line number Diff line number Diff line Loading @@ -1279,7 +1279,7 @@ static irqreturn_t be_intx(int irq, void *dev) int isr; isr = ioread32(adapter->csr + CEV_ISR0_OFFSET + adapter->pci_func * CEV_ISR_SIZE); be_pci_func(adapter) * CEV_ISR_SIZE); if (!isr) return IRQ_NONE; Loading Loading @@ -1446,7 +1446,7 @@ static void be_msix_enable(struct be_adapter *adapter) static inline int be_msix_vec_get(struct be_adapter *adapter, u32 eq_id) { return adapter->msix_entries[eq_id - 8 * adapter->pci_func].vector; return adapter->msix_entries[eq_id - 8 * be_pci_func(adapter)].vector; } static int be_msix_register(struct be_adapter *adapter) Loading Loading @@ -1743,7 +1743,6 @@ static int be_ctrl_init(struct be_adapter *adapter) struct be_dma_mem *mbox_mem_alloc = &adapter->mbox_mem_alloced; struct be_dma_mem *mbox_mem_align = &adapter->mbox_mem; int status; u32 val; status = be_map_pci_bars(adapter); if (status) Loading @@ -1764,9 +1763,6 @@ static int be_ctrl_init(struct be_adapter *adapter) spin_lock_init(&adapter->mcc_lock); spin_lock_init(&adapter->mcc_cq_lock); val = ioread32(adapter->pcicfg + PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET); adapter->pci_func = (val >> MEMBAR_CTRL_INT_CTRL_PFUNC_SHIFT) & MEMBAR_CTRL_INT_CTRL_PFUNC_MASK; return 0; } Loading Loading
drivers/net/benet/be.h +5 −1 Original line number Diff line number Diff line Loading @@ -213,7 +213,6 @@ struct be_adapter { u8 __iomem *csr; u8 __iomem *db; /* Door Bell */ u8 __iomem *pcicfg; /* PCI config space */ int pci_func; spinlock_t mbox_lock; /* For serializing mbox cmds to BE card */ struct be_dma_mem mbox_mem; Loading Loading @@ -264,6 +263,11 @@ extern struct ethtool_ops be_ethtool_ops; #define drvr_stats(adapter) (&adapter->stats.drvr_stats) static inline unsigned int be_pci_func(struct be_adapter *adapter) { return PCI_FUNC(adapter->pdev->devfn); } #define BE_SET_NETDEV_OPS(netdev, ops) (netdev->netdev_ops = ops) #define PAGE_SHIFT_4K 12 Loading
drivers/net/benet/be_cmds.c +4 −4 Original line number Diff line number Diff line Loading @@ -388,7 +388,7 @@ int be_cmd_eq_create(struct be_adapter *adapter, req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size)); AMAP_SET_BITS(struct amap_eq_context, func, req->context, adapter->pci_func); be_pci_func(adapter)); AMAP_SET_BITS(struct amap_eq_context, valid, req->context, 1); /* 4byte eqe*/ AMAP_SET_BITS(struct amap_eq_context, size, req->context, 0); Loading Loading @@ -522,7 +522,7 @@ int be_cmd_cq_create(struct be_adapter *adapter, AMAP_SET_BITS(struct amap_cq_context, eventable, ctxt, 1); AMAP_SET_BITS(struct amap_cq_context, eqid, ctxt, eq->id); AMAP_SET_BITS(struct amap_cq_context, armed, ctxt, 1); AMAP_SET_BITS(struct amap_cq_context, func, ctxt, adapter->pci_func); AMAP_SET_BITS(struct amap_cq_context, func, ctxt, be_pci_func(adapter)); be_dws_cpu_to_le(ctxt, sizeof(req->context)); be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); Loading Loading @@ -565,7 +565,7 @@ int be_cmd_mccq_create(struct be_adapter *adapter, req->num_pages = PAGES_4K_SPANNED(q_mem->va, q_mem->size); AMAP_SET_BITS(struct amap_mcc_context, fid, ctxt, adapter->pci_func); AMAP_SET_BITS(struct amap_mcc_context, fid, ctxt, be_pci_func(adapter)); AMAP_SET_BITS(struct amap_mcc_context, valid, ctxt, 1); AMAP_SET_BITS(struct amap_mcc_context, ring_size, ctxt, be_encoded_q_len(mccq->len)); Loading Loading @@ -614,7 +614,7 @@ int be_cmd_txq_create(struct be_adapter *adapter, len_encoded = 0; AMAP_SET_BITS(struct amap_tx_context, tx_ring_size, ctxt, len_encoded); AMAP_SET_BITS(struct amap_tx_context, pci_func_id, ctxt, adapter->pci_func); be_pci_func(adapter)); AMAP_SET_BITS(struct amap_tx_context, ctx_valid, ctxt, 1); AMAP_SET_BITS(struct amap_tx_context, cq_id_send, ctxt, cq->id); Loading
drivers/net/benet/be_hw.h +0 −3 Original line number Diff line number Diff line Loading @@ -51,9 +51,6 @@ * with the OS. */ #define MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK (1 << 29) /* bit 29 */ /* PCI physical function number */ #define MEMBAR_CTRL_INT_CTRL_PFUNC_MASK 0x7 /* bits 26 - 28 */ #define MEMBAR_CTRL_INT_CTRL_PFUNC_SHIFT 26 /********* ISR0 Register offset **********/ #define CEV_ISR0_OFFSET 0xC18 Loading
drivers/net/benet/be_main.c +2 −6 Original line number Diff line number Diff line Loading @@ -1279,7 +1279,7 @@ static irqreturn_t be_intx(int irq, void *dev) int isr; isr = ioread32(adapter->csr + CEV_ISR0_OFFSET + adapter->pci_func * CEV_ISR_SIZE); be_pci_func(adapter) * CEV_ISR_SIZE); if (!isr) return IRQ_NONE; Loading Loading @@ -1446,7 +1446,7 @@ static void be_msix_enable(struct be_adapter *adapter) static inline int be_msix_vec_get(struct be_adapter *adapter, u32 eq_id) { return adapter->msix_entries[eq_id - 8 * adapter->pci_func].vector; return adapter->msix_entries[eq_id - 8 * be_pci_func(adapter)].vector; } static int be_msix_register(struct be_adapter *adapter) Loading Loading @@ -1743,7 +1743,6 @@ static int be_ctrl_init(struct be_adapter *adapter) struct be_dma_mem *mbox_mem_alloc = &adapter->mbox_mem_alloced; struct be_dma_mem *mbox_mem_align = &adapter->mbox_mem; int status; u32 val; status = be_map_pci_bars(adapter); if (status) Loading @@ -1764,9 +1763,6 @@ static int be_ctrl_init(struct be_adapter *adapter) spin_lock_init(&adapter->mcc_lock); spin_lock_init(&adapter->mcc_cq_lock); val = ioread32(adapter->pcicfg + PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET); adapter->pci_func = (val >> MEMBAR_CTRL_INT_CTRL_PFUNC_SHIFT) & MEMBAR_CTRL_INT_CTRL_PFUNC_MASK; return 0; } Loading