Commit eb3b214c authored by Srinivasan Shanmugam's avatar Srinivasan Shanmugam Committed by Alex Deucher
Browse files

drm/amdgpu: Use min_t to replace min 



Use min_t to replace min, min_t is a bit fast because min use
twice typeof.

And using min_t is cleaner here since the min/max macros
do a typecheck while min_t()/max_t() to an explicit type cast.

Fixes the below checkpatch warning:

WARNING: min() should probably be min_t()

Cc: Christian König <christian.koenig@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: "Pan, Xinhui" <Xinhui.Pan@amd.com>
Signed-off-by: default avatarSrinivasan Shanmugam <srinivasan.shanmugam@amd.com>
Acked-by: default avatarChristian König <christian.koenig@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 806c6b3d

drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c

+1 −1
Original line number Diff line number Diff line
@@ -1089,7 +1089,7 @@ static ssize_t amdgpu_debugfs_vcn_fwlog_read(struct file *f, char __user *buf, 


	if (write_pos > read_pos) {

		available = write_pos - read_pos;

		read_num[0] = min(size, (size_t)available);

		read_num[0] = min_t(size_t, size, available);

	} else {

		read_num[0] = AMDGPU_VCNFW_LOG_SIZE - read_pos;

		available = read_num[0] + write_pos - plog->header_size;

drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c

+1 −1
Original line number Diff line number Diff line
@@ -2059,7 +2059,7 @@ void amdgpu_vm_adjust_size(struct amdgpu_device *adev, uint32_t min_vm_size, 
	if (amdgpu_vm_block_size != -1)

		tmp >>= amdgpu_vm_block_size - 9;

	tmp = DIV_ROUND_UP(fls64(tmp) - 1, 9) - 1;

	adev->vm_manager.num_level = min(max_level, (unsigned)tmp);

	adev->vm_manager.num_level = min_t(unsigned int, max_level, tmp);

	switch (adev->vm_manager.num_level) {

	case 3:

		adev->vm_manager.root_level = AMDGPU_VM_PDB2;

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

+3 −3
Original line number Diff line number Diff line
@@ -1036,7 +1036,7 @@ static void dce_v10_0_program_watermarks(struct amdgpu_device *adev, 
					    (u32)mode->clock);

		line_time = (u32) div_u64((u64)mode->crtc_htotal * 1000000,

					  (u32)mode->clock);

		line_time = min(line_time, (u32)65535);

		line_time = min_t(u32, line_time, 65535);



		/* watermark for high clocks */

		if (adev->pm.dpm_enabled) {
@@ -1066,7 +1066,7 @@ static void dce_v10_0_program_watermarks(struct amdgpu_device *adev, 
		wm_high.num_heads = num_heads;



		/* set for high clocks */

		latency_watermark_a = min(dce_v10_0_latency_watermark(&wm_high), (u32)65535);

		latency_watermark_a = min_t(u32, dce_v10_0_latency_watermark(&wm_high), 65535);



		/* possibly force display priority to high */

		/* should really do this at mode validation time... */
@@ -1105,7 +1105,7 @@ static void dce_v10_0_program_watermarks(struct amdgpu_device *adev, 
		wm_low.num_heads = num_heads;



		/* set for low clocks */

		latency_watermark_b = min(dce_v10_0_latency_watermark(&wm_low), (u32)65535);

		latency_watermark_b = min_t(u32, dce_v10_0_latency_watermark(&wm_low), 65535);



		/* possibly force display priority to high */

		/* should really do this at mode validation time... */

drivers/gpu/drm/amd/amdgpu/dce_v11_0.c

+3 −3
Original line number Diff line number Diff line
@@ -1068,7 +1068,7 @@ static void dce_v11_0_program_watermarks(struct amdgpu_device *adev, 
					    (u32)mode->clock);

		line_time = (u32) div_u64((u64)mode->crtc_htotal * 1000000,

					  (u32)mode->clock);

		line_time = min(line_time, (u32)65535);

		line_time = min_t(u32, line_time, 65535);



		/* watermark for high clocks */

		if (adev->pm.dpm_enabled) {
@@ -1098,7 +1098,7 @@ static void dce_v11_0_program_watermarks(struct amdgpu_device *adev, 
		wm_high.num_heads = num_heads;



		/* set for high clocks */

		latency_watermark_a = min(dce_v11_0_latency_watermark(&wm_high), (u32)65535);

		latency_watermark_a = min_t(u32, dce_v11_0_latency_watermark(&wm_high), 65535);



		/* possibly force display priority to high */

		/* should really do this at mode validation time... */
@@ -1137,7 +1137,7 @@ static void dce_v11_0_program_watermarks(struct amdgpu_device *adev, 
		wm_low.num_heads = num_heads;



		/* set for low clocks */

		latency_watermark_b = min(dce_v11_0_latency_watermark(&wm_low), (u32)65535);

		latency_watermark_b = min_t(u32, dce_v11_0_latency_watermark(&wm_low), 65535);



		/* possibly force display priority to high */

		/* should really do this at mode validation time... */

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

+3 −3
Original line number Diff line number Diff line
@@ -845,7 +845,7 @@ static void dce_v6_0_program_watermarks(struct amdgpu_device *adev, 
					    (u32)mode->clock);

		line_time = (u32) div_u64((u64)mode->crtc_htotal * 1000000,

					  (u32)mode->clock);

		line_time = min(line_time, (u32)65535);

		line_time = min_t(u32, line_time, 65535);

		priority_a_cnt = 0;

		priority_b_cnt = 0;
@@ -906,9 +906,9 @@ static void dce_v6_0_program_watermarks(struct amdgpu_device *adev, 
		wm_low.num_heads = num_heads;



		/* set for high clocks */

		latency_watermark_a = min(dce_v6_0_latency_watermark(&wm_high), (u32)65535);

		latency_watermark_a = min_t(u32, dce_v6_0_latency_watermark(&wm_high), 65535);

		/* set for low clocks */

		latency_watermark_b = min(dce_v6_0_latency_watermark(&wm_low), (u32)65535);

		latency_watermark_b = min_t(u32, dce_v6_0_latency_watermark(&wm_low), 65535);



		/* possibly force display priority to high */

		/* should really do this at mode validation time... */