Commit e5e454f9 authored by Ben Skeggs's avatar Ben Skeggs
Browse files

drm/nvc0/copy: share interrupt handler with nva3 



Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent 874309a5

drivers/gpu/drm/nouveau/core/engine/copy/nva3.c

+12 −12
Original line number Diff line number Diff line
@@ -99,38 +99,38 @@ static const struct nouveau_enum nva3_copy_isr_error_name[] = { 
	{}

};



static void

void

nva3_copy_intr(struct nouveau_subdev *subdev)

{

	struct nouveau_fifo *pfifo = nouveau_fifo(subdev);

	struct nouveau_engine *engine = nv_engine(subdev);

	struct nouveau_falcon *falcon = (void *)subdev;

	struct nouveau_object *engctx;

	struct nva3_copy_priv *priv = (void *)subdev;

	u32 dispatch = nv_rd32(priv, 0x10401c);

	u32 stat = nv_rd32(priv, 0x104008) & dispatch & ~(dispatch >> 16);

	u64 inst = nv_rd32(priv, 0x104050) & 0x3fffffff;

	u32 ssta = nv_rd32(priv, 0x104040) & 0x0000ffff;

	u32 addr = nv_rd32(priv, 0x104040) >> 16;

	u32 dispatch = nv_ro32(falcon, 0x01c);

	u32 stat = nv_ro32(falcon, 0x008) & dispatch & ~(dispatch >> 16);

	u64 inst = nv_ro32(falcon, 0x050) & 0x3fffffff;

	u32 ssta = nv_ro32(falcon, 0x040) & 0x0000ffff;

	u32 addr = nv_ro32(falcon, 0x040) >> 16;

	u32 mthd = (addr & 0x07ff) << 2;

	u32 subc = (addr & 0x3800) >> 11;

	u32 data = nv_rd32(priv, 0x104044);

	u32 data = nv_ro32(falcon, 0x044);

	int chid;



	engctx = nouveau_engctx_get(engine, inst);

	chid   = pfifo->chid(pfifo, engctx);



	if (stat & 0x00000040) {

		nv_error(priv, "DISPATCH_ERROR [");

		nv_error(falcon, "DISPATCH_ERROR [");

		nouveau_enum_print(nva3_copy_isr_error_name, ssta);

		printk("] ch %d [0x%010llx] subc %d mthd 0x%04x data 0x%08x\n",

		       chid, inst << 12, subc, mthd, data);

		nv_wr32(priv, 0x104004, 0x00000040);

		nv_wo32(falcon, 0x004, 0x00000040);

		stat &= ~0x00000040;

	}



	if (stat) {

		nv_error(priv, "unhandled intr 0x%08x\n", stat);

		nv_wr32(priv, 0x104004, stat);

		nv_error(falcon, "unhandled intr 0x%08x\n", stat);

		nv_wo32(falcon, 0x004, stat);

	}



	nouveau_engctx_put(engctx);

drivers/gpu/drm/nouveau/core/engine/copy/nvc0.c

+2 −47
Original line number Diff line number Diff line
@@ -103,51 +103,6 @@ nvc0_copy1_cclass = { 
 * PCOPY engine/subdev functions

 ******************************************************************************/



static const struct nouveau_enum nvc0_copy_isr_error_name[] = {

	{ 0x0001, "ILLEGAL_MTHD" },

	{ 0x0002, "INVALID_ENUM" },

	{ 0x0003, "INVALID_BITFIELD" },

	{}

};



static void

nvc0_copy_intr(struct nouveau_subdev *subdev)

{

	struct nouveau_fifo *pfifo = nouveau_fifo(subdev);

	struct nouveau_engine *engine = nv_engine(subdev);

	struct nouveau_object *engctx;

	struct nvc0_copy_priv *priv = (void *)subdev;

	u32 disp = nv_ro32(priv, 0x01c);

	u32 intr = nv_ro32(priv, 0x008);

	u32 stat = intr & disp & ~(disp >> 16);

	u64 inst = nv_ro32(priv, 0x050) & 0x0fffffff;

	u32 ssta = nv_ro32(priv, 0x040) & 0x0000ffff;

	u32 addr = nv_ro32(priv, 0x040) >> 16;

	u32 mthd = (addr & 0x07ff) << 2;

	u32 subc = (addr & 0x3800) >> 11;

	u32 data = nv_ro32(priv, 0x044);

	int chid;



	engctx = nouveau_engctx_get(engine, inst);

	chid   = pfifo->chid(pfifo, engctx);



	if (stat & 0x00000040) {

		nv_error(priv, "DISPATCH_ERROR [");

		nouveau_enum_print(nvc0_copy_isr_error_name, ssta);

		printk("] ch %d [0x%010llx] subc %d mthd 0x%04x data 0x%08x\n",

		       chid, (u64)inst << 12, subc, mthd, data);

		nv_wo32(priv, 0x004, 0x00000040);

		stat &= ~0x00000040;

	}



	if (stat) {

		nv_error(priv, "unhandled intr 0x%08x\n", stat);

		nv_wo32(priv, 0x004, stat);

	}



	nouveau_engctx_put(engctx);

}



static int

nvc0_copy_init(struct nouveau_object *object)

{
@@ -180,7 +135,7 @@ nvc0_copy0_ctor(struct nouveau_object *parent, struct nouveau_object *engine, 
		return ret;



	nv_subdev(priv)->unit = 0x00000040;

	nv_subdev(priv)->intr = nvc0_copy_intr;

	nv_subdev(priv)->intr = nva3_copy_intr;

	nv_engine(priv)->cclass = &nvc0_copy0_cclass;

	nv_engine(priv)->sclass = nvc0_copy0_sclass;

	nv_falcon(priv)->code.data = nvc0_pcopy_code;
@@ -208,7 +163,7 @@ nvc0_copy1_ctor(struct nouveau_object *parent, struct nouveau_object *engine, 
		return ret;



	nv_subdev(priv)->unit = 0x00000080;

	nv_subdev(priv)->intr = nvc0_copy_intr;

	nv_subdev(priv)->intr = nva3_copy_intr;

	nv_engine(priv)->cclass = &nvc0_copy1_cclass;

	nv_engine(priv)->sclass = nvc0_copy1_sclass;

	nv_falcon(priv)->code.data = nvc0_pcopy_code;

drivers/gpu/drm/nouveau/core/include/engine/copy.h

+2 −0
Original line number Diff line number Diff line 
#ifndef __NOUVEAU_COPY_H__

#define __NOUVEAU_COPY_H__



void nva3_copy_intr(struct nouveau_subdev *);



extern struct nouveau_oclass nva3_copy_oclass;

extern struct nouveau_oclass nvc0_copy0_oclass;

extern struct nouveau_oclass nvc0_copy1_oclass;