Commit e5c5e4f5 authored by Ben Skeggs's avatar Ben Skeggs
Browse files

drm/nouveau/fifo: switch to subdev printk macros 



Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent 84407824

drivers/gpu/drm/nouveau/nvkm/engine/fifo/base.c

+3 −2
Original line number Diff line number Diff line
@@ -57,10 +57,11 @@ nvkm_fifo_channel_create_(struct nvkm_object *parent, 
			  int bar, u32 addr, u32 size, u32 pushbuf,

			  u64 engmask, int len, void **ptr)

{

	struct nvkm_device *device = nv_device(engine);

	struct nvkm_fifo *fifo = (void *)engine;

	struct nvkm_fifo_chan *chan;

	struct nvkm_dmaeng *dmaeng;

	struct nvkm_subdev *subdev = &fifo->engine.subdev;

	struct nvkm_device *device = subdev->device;

	unsigned long flags;

	int ret;
@@ -100,7 +101,7 @@ nvkm_fifo_channel_create_(struct nvkm_object *parent, 
	spin_unlock_irqrestore(&fifo->lock, flags);



	if (chan->chid == fifo->max) {

		nv_error(fifo, "no free channels\n");

		nvkm_error(subdev, "no free channels\n");

		return -ENOSPC;

	}

drivers/gpu/drm/nouveau/nvkm/engine/fifo/g84.c

+4 −3
Original line number Diff line number Diff line
@@ -83,7 +83,8 @@ g84_fifo_context_detach(struct nvkm_object *parent, bool suspend, 
	struct nv50_fifo *fifo = (void *)parent->engine;

	struct nv50_fifo_base *base = (void *)parent->parent;

	struct nv50_fifo_chan *chan = (void *)parent;

	struct nvkm_device *device = fifo->base.engine.subdev.device;

	struct nvkm_subdev *subdev = &fifo->base.engine.subdev;

	struct nvkm_device *device = subdev->device;

	struct nvkm_bar *bar = device->bar;

	u32 addr, save, engn;

	bool done;
@@ -112,7 +113,7 @@ g84_fifo_context_detach(struct nvkm_object *parent, bool suspend, 
	) >= 0;

	nvkm_wr32(device, 0x002520, save);

	if (!done) {

		nv_error(fifo, "channel %d [%s] unload timeout\n",

		nvkm_error(subdev, "channel %d [%s] unload timeout\n",

			   chan->base.chid, nvkm_client_name(chan));

		if (suspend)

			return -EBUSY;

drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c

+55 −59
Original line number Diff line number Diff line
@@ -76,7 +76,8 @@ struct gf100_fifo_chan { 
static void

gf100_fifo_runlist_update(struct gf100_fifo *fifo)

{

	struct nvkm_device *device = fifo->base.engine.subdev.device;

	struct nvkm_subdev *subdev = &fifo->base.engine.subdev;

	struct nvkm_device *device = subdev->device;

	struct nvkm_bar *bar = device->bar;

	struct nvkm_gpuobj *cur;

	int i, p;
@@ -101,7 +102,7 @@ gf100_fifo_runlist_update(struct gf100_fifo *fifo) 
	if (wait_event_timeout(fifo->runlist.wait,

			       !(nvkm_rd32(device, 0x00227c) & 0x00100000),

			       msecs_to_jiffies(2000)) == 0)

		nv_error(fifo, "runlist update timeout\n");

		nvkm_error(subdev, "runlist update timeout\n");

	mutex_unlock(&nv_subdev(fifo)->mutex);

}
@@ -149,7 +150,8 @@ gf100_fifo_context_detach(struct nvkm_object *parent, bool suspend, 
	struct gf100_fifo *fifo = (void *)parent->engine;

	struct gf100_fifo_base *base = (void *)parent->parent;

	struct gf100_fifo_chan *chan = (void *)parent;

	struct nvkm_device *device = fifo->base.engine.subdev.device;

	struct nvkm_subdev *subdev = &fifo->base.engine.subdev;

	struct nvkm_device *device = subdev->device;

	struct nvkm_bar *bar = device->bar;

	u32 addr;
@@ -170,7 +172,7 @@ gf100_fifo_context_detach(struct nvkm_object *parent, bool suspend, 
		if (nvkm_rd32(device, 0x002634) == chan->base.chid)

			break;

	) < 0) {

		nv_error(fifo, "channel %d [%s] kick timeout\n",

		nvkm_error(subdev, "channel %d [%s] kick timeout\n",

			   chan->base.chid, nvkm_client_name(chan));

		if (suspend)

			return -EBUSY;
@@ -446,12 +448,13 @@ static void 
gf100_fifo_recover(struct gf100_fifo *fifo, struct nvkm_engine *engine,

		   struct gf100_fifo_chan *chan)

{

	struct nvkm_device *device = fifo->base.engine.subdev.device;

	struct nvkm_subdev *subdev = &fifo->base.engine.subdev;

	struct nvkm_device *device = subdev->device;

	u32 chid = chan->base.chid;

	unsigned long flags;



	nv_error(fifo, "%s engine fault on channel %d, recovering...\n",

		       nv_subdev(engine)->name, chid);

	nvkm_error(subdev, "%s engine fault on channel %d, recovering...\n",

		   engine->subdev.name, chid);



	nvkm_mask(device, 0x003004 + (chid * 0x08), 0x00000001, 0x00000000);

	chan->state = KILLED;
@@ -524,17 +527,15 @@ gf100_fifo_intr_sched_ctxsw(struct gf100_fifo *fifo) 
static void

gf100_fifo_intr_sched(struct gf100_fifo *fifo)

{

	struct nvkm_device *device = fifo->base.engine.subdev.device;

	struct nvkm_subdev *subdev = &fifo->base.engine.subdev;

	struct nvkm_device *device = subdev->device;

	u32 intr = nvkm_rd32(device, 0x00254c);

	u32 code = intr & 0x000000ff;

	const struct nvkm_enum *en;

	char enunk[6] = "";



	en = nvkm_enum_find(gf100_fifo_sched_reason, code);

	if (!en)

		snprintf(enunk, sizeof(enunk), "UNK%02x", code);



	nv_error(fifo, "SCHED_ERROR [ %s ]\n", en ? en->name : enunk);

	nvkm_error(subdev, "SCHED_ERROR %02x [%s]\n", code, en ? en->name : "");



	switch (code) {

	case 0x0a:
@@ -607,7 +608,8 @@ gf100_fifo_fault_gpcclient[] = { 
static void

gf100_fifo_intr_fault(struct gf100_fifo *fifo, int unit)

{

	struct nvkm_device *device = fifo->base.engine.subdev.device;

	struct nvkm_subdev *subdev = &fifo->base.engine.subdev;

	struct nvkm_device *device = subdev->device;

	u32 inst = nvkm_rd32(device, 0x002800 + (unit * 0x10));

	u32 valo = nvkm_rd32(device, 0x002804 + (unit * 0x10));

	u32 vahi = nvkm_rd32(device, 0x002808 + (unit * 0x10));
@@ -620,16 +622,17 @@ gf100_fifo_intr_fault(struct gf100_fifo *fifo, int unit) 
	struct nvkm_object *engctx = NULL, *object;

	struct nvkm_engine *engine = NULL;

	const struct nvkm_enum *er, *eu, *ec;

	char erunk[6] = "";

	char euunk[6] = "";

	char ecunk[6] = "";

	char gpcid[3] = "";

	char gpcid[8] = "";



	er = nvkm_enum_find(gf100_fifo_fault_reason, reason);

	if (!er)

		snprintf(erunk, sizeof(erunk), "UNK%02X", reason);



	eu = nvkm_enum_find(gf100_fifo_fault_engine, unit);

	if (hub) {

		ec = nvkm_enum_find(gf100_fifo_fault_hubclient, client);

	} else {

		ec = nvkm_enum_find(gf100_fifo_fault_gpcclient, client);

		snprintf(gpcid, sizeof(gpcid), "GPC%d/", gpc);

	}



	if (eu) {

		switch (eu->data2) {

		case NVDEV_SUBDEV_BAR:
@@ -647,25 +650,14 @@ gf100_fifo_intr_fault(struct gf100_fifo *fifo, int unit) 
				engctx = nvkm_engctx_get(engine, inst);

			break;

		}

	} else {

		snprintf(euunk, sizeof(euunk), "UNK%02x", unit);

	}



	if (hub) {

		ec = nvkm_enum_find(gf100_fifo_fault_hubclient, client);

	} else {

		ec = nvkm_enum_find(gf100_fifo_fault_gpcclient, client);

		snprintf(gpcid, sizeof(gpcid), "%d", gpc);

	}



	if (!ec)

		snprintf(ecunk, sizeof(ecunk), "UNK%02x", client);



	nv_error(fifo, "%s fault at 0x%010llx [%s] from %s/%s%s%s%s on "

		       "channel 0x%010llx [%s]\n", write ? "write" : "read",

		 (u64)vahi << 32 | valo, er ? er->name : erunk,

		 eu ? eu->name : euunk, hub ? "" : "GPC", gpcid, hub ? "" : "/",

		 ec ? ec->name : ecunk, (u64)inst << 12,

	nvkm_error(subdev,

		   "%s fault at %010llx engine %02x [%s] client %02x [%s%s] "

		   "reason %02x [%s] on channel %d [%010llx %s]\n",

		   write ? "write" : "read", (u64)vahi << 32 | valo,

		   unit, eu ? eu->name : "", client, gpcid, ec ? ec->name : "",

		   reason, er ? er->name : "", -1, (u64)inst << 12,

		   nvkm_client_name(engctx));



	object = engctx;
@@ -692,7 +684,8 @@ gf100_fifo_pbdma_intr[] = { 
static void

gf100_fifo_intr_pbdma(struct gf100_fifo *fifo, int unit)

{

	struct nvkm_device *device = fifo->base.engine.subdev.device;

	struct nvkm_subdev *subdev = &fifo->base.engine.subdev;

	struct nvkm_device *device = subdev->device;

	u32 stat = nvkm_rd32(device, 0x040108 + (unit * 0x2000));

	u32 addr = nvkm_rd32(device, 0x0400c0 + (unit * 0x2000));

	u32 data = nvkm_rd32(device, 0x0400c4 + (unit * 0x2000));
@@ -700,6 +693,7 @@ gf100_fifo_intr_pbdma(struct gf100_fifo *fifo, int unit) 
	u32 subc = (addr & 0x00070000) >> 16;

	u32 mthd = (addr & 0x00003ffc);

	u32 show= stat;

	char msg[128];



	if (stat & 0x00800000) {

		if (!gf100_fifo_swmthd(fifo, chid, mthd, data))
@@ -707,12 +701,10 @@ gf100_fifo_intr_pbdma(struct gf100_fifo *fifo, int unit) 
	}



	if (show) {

		nv_error(fifo, "PBDMA%d:", unit);

		nvkm_bitfield_print(gf100_fifo_pbdma_intr, show);

		pr_cont("\n");

		nv_error(fifo,

			 "PBDMA%d: ch %d [%s] subc %d mthd 0x%04x data 0x%08x\n",

			 unit, chid,

		nvkm_snprintbf(msg, sizeof(msg), gf100_fifo_pbdma_intr, show);

		nvkm_error(subdev, "PBDMA%d: %08x [%s] ch %d [%s] subc %d "

				   "mthd %04x data %08x\n",

			   unit, show, msg, chid,

			   nvkm_client_name_for_fifo_chid(&fifo->base, chid),

			   subc, mthd, data);

	}
@@ -724,7 +716,8 @@ gf100_fifo_intr_pbdma(struct gf100_fifo *fifo, int unit) 
static void

gf100_fifo_intr_runlist(struct gf100_fifo *fifo)

{

	struct nvkm_device *device = fifo->base.engine.subdev.device;

	struct nvkm_subdev *subdev = &fifo->base.engine.subdev;

	struct nvkm_device *device = subdev->device;

	u32 intr = nvkm_rd32(device, 0x002a00);



	if (intr & 0x10000000) {
@@ -734,7 +727,7 @@ gf100_fifo_intr_runlist(struct gf100_fifo *fifo) 
	}



	if (intr) {

		nv_error(fifo, "RUNLIST 0x%08x\n", intr);

		nvkm_error(subdev, "RUNLIST %08x\n", intr);

		nvkm_wr32(device, 0x002a00, intr);

	}

}
@@ -742,7 +735,8 @@ gf100_fifo_intr_runlist(struct gf100_fifo *fifo) 
static void

gf100_fifo_intr_engine_unit(struct gf100_fifo *fifo, int engn)

{

	struct nvkm_device *device = fifo->base.engine.subdev.device;

	struct nvkm_subdev *subdev = &fifo->base.engine.subdev;

	struct nvkm_device *device = subdev->device;

	u32 intr = nvkm_rd32(device, 0x0025a8 + (engn * 0x04));

	u32 inte = nvkm_rd32(device, 0x002628);

	u32 unkn;
@@ -756,7 +750,8 @@ gf100_fifo_intr_engine_unit(struct gf100_fifo *fifo, int engn) 
			ints &= ~1;

		}

		if (ints) {

			nv_error(fifo, "ENGINE %d %d %01x", engn, unkn, ints);

			nvkm_error(subdev, "ENGINE %d %d %01x",

				   engn, unkn, ints);

			nvkm_mask(device, 0x002628, ints, 0);

		}

	}
@@ -784,7 +779,7 @@ gf100_fifo_intr(struct nvkm_subdev *subdev) 


	if (stat & 0x00000001) {

		u32 intr = nvkm_rd32(device, 0x00252c);

		nv_warn(fifo, "INTR 0x00000001: 0x%08x\n", intr);

		nvkm_warn(subdev, "INTR 00000001: %08x\n", intr);

		nvkm_wr32(device, 0x002100, 0x00000001);

		stat &= ~0x00000001;

	}
@@ -797,14 +792,14 @@ gf100_fifo_intr(struct nvkm_subdev *subdev) 


	if (stat & 0x00010000) {

		u32 intr = nvkm_rd32(device, 0x00256c);

		nv_warn(fifo, "INTR 0x00010000: 0x%08x\n", intr);

		nvkm_warn(subdev, "INTR 00010000: %08x\n", intr);

		nvkm_wr32(device, 0x002100, 0x00010000);

		stat &= ~0x00010000;

	}



	if (stat & 0x01000000) {

		u32 intr = nvkm_rd32(device, 0x00258c);

		nv_warn(fifo, "INTR 0x01000000: 0x%08x\n", intr);

		nvkm_warn(subdev, "INTR 01000000: %08x\n", intr);

		nvkm_wr32(device, 0x002100, 0x01000000);

		stat &= ~0x01000000;

	}
@@ -842,7 +837,7 @@ gf100_fifo_intr(struct nvkm_subdev *subdev) 
	}



	if (stat) {

		nv_error(fifo, "INTR 0x%08x\n", stat);

		nvkm_error(subdev, "INTR %08x\n", stat);

		nvkm_mask(device, 0x002140, stat, 0x00000000);

		nvkm_wr32(device, 0x002100, stat);

	}
@@ -936,7 +931,8 @@ static int 
gf100_fifo_init(struct nvkm_object *object)

{

	struct gf100_fifo *fifo = (void *)object;

	struct nvkm_device *device = fifo->base.engine.subdev.device;

	struct nvkm_subdev *subdev = &fifo->base.engine.subdev;

	struct nvkm_device *device = subdev->device;

	int ret, i;



	ret = nvkm_fifo_init(&fifo->base);
@@ -947,7 +943,7 @@ gf100_fifo_init(struct nvkm_object *object) 
	nvkm_wr32(device, 0x002204, 0xffffffff);



	fifo->spoon_nr = hweight32(nvkm_rd32(device, 0x002204));

	nv_debug(fifo, "%d PBDMA unit(s)\n", fifo->spoon_nr);

	nvkm_debug(subdev, "%d PBDMA unit(s)\n", fifo->spoon_nr);



	/* assign engines to PBDMAs */

	if (fifo->spoon_nr >= 3) {

drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c

+71 −77
Original line number Diff line number Diff line
@@ -96,7 +96,8 @@ static void 
gk104_fifo_runlist_update(struct gk104_fifo *fifo, u32 engine)

{

	struct gk104_fifo_engn *engn = &fifo->engine[engine];

	struct nvkm_device *device = fifo->base.engine.subdev.device;

	struct nvkm_subdev *subdev = &fifo->base.engine.subdev;

	struct nvkm_device *device = subdev->device;

	struct nvkm_bar *bar = device->bar;

	struct nvkm_gpuobj *cur;

	int i, p;
@@ -121,7 +122,7 @@ gk104_fifo_runlist_update(struct gk104_fifo *fifo, u32 engine) 
	if (wait_event_timeout(engn->wait, !(nvkm_rd32(device, 0x002284 +

			       (engine * 0x08)) & 0x00100000),

				msecs_to_jiffies(2000)) == 0)

		nv_error(fifo, "runlist %d update timeout\n", engine);

		nvkm_error(subdev, "runlist %d update timeout\n", engine);

	mutex_unlock(&nv_subdev(fifo)->mutex);

}
@@ -171,14 +172,15 @@ gk104_fifo_chan_kick(struct gk104_fifo_chan *chan) 
{

	struct nvkm_object *obj = (void *)chan;

	struct gk104_fifo *fifo = (void *)obj->engine;

	struct nvkm_device *device = fifo->base.engine.subdev.device;

	struct nvkm_subdev *subdev = &fifo->base.engine.subdev;

	struct nvkm_device *device = subdev->device;



	nvkm_wr32(device, 0x002634, chan->base.chid);

	if (nvkm_msec(device, 2000,

		if (!(nvkm_rd32(device, 0x002634) & 0x00100000))

			break;

	) < 0) {

		nv_error(fifo, "channel %d [%s] kick timeout\n",

		nvkm_error(subdev, "channel %d [%s] kick timeout\n",

			   chan->base.chid, nvkm_client_name(chan));

		return -EBUSY;

	}
@@ -234,6 +236,7 @@ gk104_fifo_chan_ctor(struct nvkm_object *parent, struct nvkm_object *engine, 
	struct gk104_fifo *fifo = (void *)engine;

	struct gk104_fifo_base *base = (void *)parent;

	struct gk104_fifo_chan *chan;

	struct nvkm_subdev *subdev = &fifo->base.engine.subdev;

	u64 usermem, ioffset, ilength;

	int ret, i;
@@ -256,7 +259,8 @@ gk104_fifo_chan_ctor(struct nvkm_object *parent, struct nvkm_object *engine, 
	}



	if (i == FIFO_ENGINE_NR) {

		nv_error(fifo, "unsupported engines 0x%08x\n", args->v0.engine);

		nvkm_error(subdev, "unsupported engines %08x\n",

			   args->v0.engine);

		return -ENODEV;

	}
@@ -483,11 +487,12 @@ static void 
gk104_fifo_recover(struct gk104_fifo *fifo, struct nvkm_engine *engine,

		  struct gk104_fifo_chan *chan)

{

	struct nvkm_device *device = fifo->base.engine.subdev.device;

	struct nvkm_subdev *subdev = &fifo->base.engine.subdev;

	struct nvkm_device *device = subdev->device;

	u32 chid = chan->base.chid;

	unsigned long flags;



	nv_error(fifo, "%s engine fault on channel %d, recovering...\n",

	nvkm_error(subdev, "%s engine fault on channel %d, recovering...\n",

		   nv_subdev(engine)->name, chid);



	nvkm_mask(device, 0x800004 + (chid * 0x08), 0x00000800, 0x00000800);
@@ -539,17 +544,14 @@ gk104_fifo_bind_reason[] = { 
static void

gk104_fifo_intr_bind(struct gk104_fifo *fifo)

{

	struct nvkm_device *device = fifo->base.engine.subdev.device;

	struct nvkm_subdev *subdev = &fifo->base.engine.subdev;

	struct nvkm_device *device = subdev->device;

	u32 intr = nvkm_rd32(device, 0x00252c);

	u32 code = intr & 0x000000ff;

	const struct nvkm_enum *en;

	char enunk[6] = "";

	const struct nvkm_enum *en =

		nvkm_enum_find(gk104_fifo_bind_reason, code);



	en = nvkm_enum_find(gk104_fifo_bind_reason, code);

	if (!en)

		snprintf(enunk, sizeof(enunk), "UNK%02x", code);



	nv_error(fifo, "BIND_ERROR [ %s ]\n", en ? en->name : enunk);

	nvkm_error(subdev, "BIND_ERROR %02x [%s]\n", code, en ? en->name : "");

}



static const struct nvkm_enum
@@ -590,17 +592,14 @@ gk104_fifo_intr_sched_ctxsw(struct gk104_fifo *fifo) 
static void

gk104_fifo_intr_sched(struct gk104_fifo *fifo)

{

	struct nvkm_device *device = fifo->base.engine.subdev.device;

	struct nvkm_subdev *subdev = &fifo->base.engine.subdev;

	struct nvkm_device *device = subdev->device;

	u32 intr = nvkm_rd32(device, 0x00254c);

	u32 code = intr & 0x000000ff;

	const struct nvkm_enum *en;

	char enunk[6] = "";



	en = nvkm_enum_find(gk104_fifo_sched_reason, code);

	if (!en)

		snprintf(enunk, sizeof(enunk), "UNK%02x", code);

	const struct nvkm_enum *en =

		nvkm_enum_find(gk104_fifo_sched_reason, code);



	nv_error(fifo, "SCHED_ERROR [ %s ]\n", en ? en->name : enunk);

	nvkm_error(subdev, "SCHED_ERROR %02x [%s]\n", code, en ? en->name : "");



	switch (code) {

	case 0x0a:
@@ -614,18 +613,20 @@ gk104_fifo_intr_sched(struct gk104_fifo *fifo) 
static void

gk104_fifo_intr_chsw(struct gk104_fifo *fifo)

{

	struct nvkm_device *device = fifo->base.engine.subdev.device;

	struct nvkm_subdev *subdev = &fifo->base.engine.subdev;

	struct nvkm_device *device = subdev->device;

	u32 stat = nvkm_rd32(device, 0x00256c);

	nv_error(fifo, "CHSW_ERROR 0x%08x\n", stat);

	nvkm_error(subdev, "CHSW_ERROR %08x\n", stat);

	nvkm_wr32(device, 0x00256c, stat);

}



static void

gk104_fifo_intr_dropped_fault(struct gk104_fifo *fifo)

{

	struct nvkm_device *device = fifo->base.engine.subdev.device;

	struct nvkm_subdev *subdev = &fifo->base.engine.subdev;

	struct nvkm_device *device = subdev->device;

	u32 stat = nvkm_rd32(device, 0x00259c);

	nv_error(fifo, "DROPPED_MMU_FAULT 0x%08x\n", stat);

	nvkm_error(subdev, "DROPPED_MMU_FAULT %08x\n", stat);

}



static const struct nvkm_enum
@@ -736,7 +737,8 @@ gk104_fifo_fault_gpcclient[] = { 
static void

gk104_fifo_intr_fault(struct gk104_fifo *fifo, int unit)

{

	struct nvkm_device *device = fifo->base.engine.subdev.device;

	struct nvkm_subdev *subdev = &fifo->base.engine.subdev;

	struct nvkm_device *device = subdev->device;

	u32 inst = nvkm_rd32(device, 0x002800 + (unit * 0x10));

	u32 valo = nvkm_rd32(device, 0x002804 + (unit * 0x10));

	u32 vahi = nvkm_rd32(device, 0x002808 + (unit * 0x10));
@@ -749,16 +751,17 @@ gk104_fifo_intr_fault(struct gk104_fifo *fifo, int unit) 
	struct nvkm_object *engctx = NULL, *object;

	struct nvkm_engine *engine = NULL;

	const struct nvkm_enum *er, *eu, *ec;

	char erunk[6] = "";

	char euunk[6] = "";

	char ecunk[6] = "";

	char gpcid[3] = "";

	char gpcid[8] = "";



	er = nvkm_enum_find(gk104_fifo_fault_reason, reason);

	if (!er)

		snprintf(erunk, sizeof(erunk), "UNK%02X", reason);



	eu = nvkm_enum_find(gk104_fifo_fault_engine, unit);

	if (hub) {

		ec = nvkm_enum_find(gk104_fifo_fault_hubclient, client);

	} else {

		ec = nvkm_enum_find(gk104_fifo_fault_gpcclient, client);

		snprintf(gpcid, sizeof(gpcid), "GPC%d/", gpc);

	}



	if (eu) {

		switch (eu->data2) {

		case NVDEV_SUBDEV_BAR:
@@ -776,25 +779,14 @@ gk104_fifo_intr_fault(struct gk104_fifo *fifo, int unit) 
				engctx = nvkm_engctx_get(engine, inst);

			break;

		}

	} else {

		snprintf(euunk, sizeof(euunk), "UNK%02x", unit);

	}



	if (hub) {

		ec = nvkm_enum_find(gk104_fifo_fault_hubclient, client);

	} else {

		ec = nvkm_enum_find(gk104_fifo_fault_gpcclient, client);

		snprintf(gpcid, sizeof(gpcid), "%d", gpc);

	}



	if (!ec)

		snprintf(ecunk, sizeof(ecunk), "UNK%02x", client);



	nv_error(fifo, "%s fault at 0x%010llx [%s] from %s/%s%s%s%s on "

		       "channel 0x%010llx [%s]\n", write ? "write" : "read",

		 (u64)vahi << 32 | valo, er ? er->name : erunk,

		 eu ? eu->name : euunk, hub ? "" : "GPC", gpcid, hub ? "" : "/",

		 ec ? ec->name : ecunk, (u64)inst << 12,

	nvkm_error(subdev,

		   "%s fault at %010llx engine %02x [%s] client %02x [%s%s] "

		   "reason %02x [%s] on channel %d [%010llx %s]\n",

		   write ? "write" : "read", (u64)vahi << 32 | valo,

		   unit, eu ? eu->name : "", client, gpcid, ec ? ec->name : "",

		   reason, er ? er->name : "", -1, (u64)inst << 12,

		   nvkm_client_name(engctx));



	object = engctx;
@@ -848,7 +840,8 @@ static const struct nvkm_bitfield gk104_fifo_pbdma_intr_0[] = { 
static void

gk104_fifo_intr_pbdma_0(struct gk104_fifo *fifo, int unit)

{

	struct nvkm_device *device = fifo->base.engine.subdev.device;

	struct nvkm_subdev *subdev = &fifo->base.engine.subdev;

	struct nvkm_device *device = subdev->device;

	u32 mask = nvkm_rd32(device, 0x04010c + (unit * 0x2000));

	u32 stat = nvkm_rd32(device, 0x040108 + (unit * 0x2000)) & mask;

	u32 addr = nvkm_rd32(device, 0x0400c0 + (unit * 0x2000));
@@ -857,6 +850,7 @@ gk104_fifo_intr_pbdma_0(struct gk104_fifo *fifo, int unit) 
	u32 subc = (addr & 0x00070000) >> 16;

	u32 mthd = (addr & 0x00003ffc);

	u32 show = stat;

	char msg[128];



	if (stat & 0x00800000) {

		if (!gk104_fifo_swmthd(fifo, chid, mthd, data))
@@ -865,12 +859,10 @@ gk104_fifo_intr_pbdma_0(struct gk104_fifo *fifo, int unit) 
	}



	if (show) {

		nv_error(fifo, "PBDMA%d:", unit);

		nvkm_bitfield_print(gk104_fifo_pbdma_intr_0, show);

		pr_cont("\n");

		nv_error(fifo,

			 "PBDMA%d: ch %d [%s] subc %d mthd 0x%04x data 0x%08x\n",

			 unit, chid,

		nvkm_snprintbf(msg, sizeof(msg), gk104_fifo_pbdma_intr_0, show);

		nvkm_error(subdev, "PBDMA%d: %08x [%s] ch %d [%s] subc %d "

				   "mthd %04x data %08x\n",

			   unit, show, msg, chid,

			   nvkm_client_name_for_fifo_chid(&fifo->base, chid),

			   subc, mthd, data);

	}
@@ -890,16 +882,17 @@ static const struct nvkm_bitfield gk104_fifo_pbdma_intr_1[] = { 
static void

gk104_fifo_intr_pbdma_1(struct gk104_fifo *fifo, int unit)

{

	struct nvkm_device *device = fifo->base.engine.subdev.device;

	struct nvkm_subdev *subdev = &fifo->base.engine.subdev;

	struct nvkm_device *device = subdev->device;

	u32 mask = nvkm_rd32(device, 0x04014c + (unit * 0x2000));

	u32 stat = nvkm_rd32(device, 0x040148 + (unit * 0x2000)) & mask;

	u32 chid = nvkm_rd32(device, 0x040120 + (unit * 0x2000)) & 0xfff;

	char msg[128];



	if (stat) {

		nv_error(fifo, "PBDMA%d:", unit);

		nvkm_bitfield_print(gk104_fifo_pbdma_intr_1, stat);

		pr_cont("\n");

		nv_error(fifo, "PBDMA%d: ch %d %08x %08x\n", unit, chid,

		nvkm_snprintbf(msg, sizeof(msg), gk104_fifo_pbdma_intr_1, stat);

		nvkm_error(subdev, "PBDMA%d: %08x [%s] ch %d %08x %08x\n",

			   unit, stat, msg, chid,

			   nvkm_rd32(device, 0x040150 + (unit * 0x2000)),

			   nvkm_rd32(device, 0x040154 + (unit * 0x2000)));

	}
@@ -941,7 +934,7 @@ gk104_fifo_intr(struct nvkm_subdev *subdev) 
	}



	if (stat & 0x00000010) {

		nv_error(fifo, "PIO_ERROR\n");

		nvkm_error(subdev, "PIO_ERROR\n");

		nvkm_wr32(device, 0x002100, 0x00000010);

		stat &= ~0x00000010;

	}
@@ -959,13 +952,13 @@ gk104_fifo_intr(struct nvkm_subdev *subdev) 
	}



	if (stat & 0x00800000) {

		nv_error(fifo, "FB_FLUSH_TIMEOUT\n");

		nvkm_error(subdev, "FB_FLUSH_TIMEOUT\n");

		nvkm_wr32(device, 0x002100, 0x00800000);

		stat &= ~0x00800000;

	}



	if (stat & 0x01000000) {

		nv_error(fifo, "LB_ERROR\n");

		nvkm_error(subdev, "LB_ERROR\n");

		nvkm_wr32(device, 0x002100, 0x01000000);

		stat &= ~0x01000000;

	}
@@ -1011,7 +1004,7 @@ gk104_fifo_intr(struct nvkm_subdev *subdev) 
	}



	if (stat) {

		nv_error(fifo, "INTR 0x%08x\n", stat);

		nvkm_error(subdev, "INTR %08x\n", stat);

		nvkm_mask(device, 0x002140, stat, 0x00000000);

		nvkm_wr32(device, 0x002100, stat);

	}
@@ -1060,7 +1053,8 @@ int 
gk104_fifo_init(struct nvkm_object *object)

{

	struct gk104_fifo *fifo = (void *)object;

	struct nvkm_device *device = fifo->base.engine.subdev.device;

	struct nvkm_subdev *subdev = &fifo->base.engine.subdev;

	struct nvkm_device *device = subdev->device;

	int ret, i;



	ret = nvkm_fifo_init(&fifo->base);
@@ -1070,7 +1064,7 @@ gk104_fifo_init(struct nvkm_object *object) 
	/* enable all available PBDMA units */

	nvkm_wr32(device, 0x000204, 0xffffffff);

	fifo->spoon_nr = hweight32(nvkm_rd32(device, 0x000204));

	nv_debug(fifo, "%d PBDMA unit(s)\n", fifo->spoon_nr);

	nvkm_debug(subdev, "%d PBDMA unit(s)\n", fifo->spoon_nr);



	/* PBDMA[n] */

	for (i = 0; i < fifo->spoon_nr; i++) {

drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv04.c

+25 −21
Original line number Diff line number Diff line
@@ -412,9 +412,10 @@ nv04_fifo_swmthd(struct nv04_fifo *fifo, u32 chid, u32 addr, u32 data) 
}



static void

nv04_fifo_cache_error(struct nvkm_device *device,

		      struct nv04_fifo *fifo, u32 chid, u32 get)

nv04_fifo_cache_error(struct nv04_fifo *fifo, u32 chid, u32 get)

{

	struct nvkm_subdev *subdev = &fifo->base.engine.subdev;

	struct nvkm_device *device = subdev->device;

	u32 mthd, data;

	int ptr;
@@ -436,8 +437,8 @@ nv04_fifo_cache_error(struct nvkm_device *device, 
	if (!nv04_fifo_swmthd(fifo, chid, mthd, data)) {

		const char *client_name =

			nvkm_client_name_for_fifo_chid(&fifo->base, chid);

		nv_error(fifo,

			 "CACHE_ERROR - ch %d [%s] subc %d mthd 0x%04x data 0x%08x\n",

		nvkm_error(subdev, "CACHE_ERROR - "

			   "ch %d [%s] subc %d mthd %04x data %08x\n",

			   chid, client_name, (mthd >> 13) & 7, mthd & 0x1ffc,

			   data);

	}
@@ -458,14 +459,15 @@ nv04_fifo_cache_error(struct nvkm_device *device, 
}



static void

nv04_fifo_dma_pusher(struct nvkm_device *device,

		     struct nv04_fifo *fifo, u32 chid)

nv04_fifo_dma_pusher(struct nv04_fifo *fifo, u32 chid)

{

	const char *client_name;

	struct nvkm_subdev *subdev = &fifo->base.engine.subdev;

	struct nvkm_device *device = subdev->device;

	u32 dma_get = nvkm_rd32(device, 0x003244);

	u32 dma_put = nvkm_rd32(device, 0x003240);

	u32 push = nvkm_rd32(device, 0x003220);

	u32 state = nvkm_rd32(device, 0x003228);

	const char *client_name;



	client_name = nvkm_client_name_for_fifo_chid(&fifo->base, chid);
@@ -475,10 +477,12 @@ nv04_fifo_dma_pusher(struct nvkm_device *device, 
		u32 ib_get = nvkm_rd32(device, 0x003334);

		u32 ib_put = nvkm_rd32(device, 0x003330);



		nv_error(fifo,

			 "DMA_PUSHER - ch %d [%s] get 0x%02x%08x put 0x%02x%08x ib_get 0x%08x ib_put 0x%08x state 0x%08x (err: %s) push 0x%08x\n",

		nvkm_error(subdev, "DMA_PUSHER - "

			   "ch %d [%s] get %02x%08x put %02x%08x ib_get %08x "

			   "ib_put %08x state %08x (err: %s) push %08x\n",

			   chid, client_name, ho_get, dma_get, ho_put, dma_put,

			 ib_get, ib_put, state, nv_dma_state_err(state), push);

			   ib_get, ib_put, state, nv_dma_state_err(state),

			   push);



		/* METHOD_COUNT, in DMA_STATE on earlier chipsets */

		nvkm_wr32(device, 0x003364, 0x00000000);
@@ -489,8 +493,8 @@ nv04_fifo_dma_pusher(struct nvkm_device *device, 
		if (ib_get != ib_put)

			nvkm_wr32(device, 0x003334, ib_put);

	} else {

		nv_error(fifo,

			 "DMA_PUSHER - ch %d [%s] get 0x%08x put 0x%08x state 0x%08x (err: %s) push 0x%08x\n",

		nvkm_error(subdev, "DMA_PUSHER - ch %d [%s] get %08x put %08x "

				   "state %08x (err: %s) push %08x\n",

			   chid, client_name, dma_get, dma_put, state,

			   nv_dma_state_err(state), push);
@@ -506,7 +510,7 @@ nv04_fifo_dma_pusher(struct nvkm_device *device, 
void

nv04_fifo_intr(struct nvkm_subdev *subdev)

{

	struct nvkm_device *device = nv_device(subdev);

	struct nvkm_device *device = subdev->device;

	struct nv04_fifo *fifo = (void *)subdev;

	u32 mask = nvkm_rd32(device, NV03_PFIFO_INTR_EN_0);

	u32 stat = nvkm_rd32(device, NV03_PFIFO_INTR_0) & mask;
@@ -519,12 +523,12 @@ nv04_fifo_intr(struct nvkm_subdev *subdev) 
	get  = nvkm_rd32(device, NV03_PFIFO_CACHE1_GET);



	if (stat & NV_PFIFO_INTR_CACHE_ERROR) {

		nv04_fifo_cache_error(device, fifo, chid, get);

		nv04_fifo_cache_error(fifo, chid, get);

		stat &= ~NV_PFIFO_INTR_CACHE_ERROR;

	}



	if (stat & NV_PFIFO_INTR_DMA_PUSHER) {

		nv04_fifo_dma_pusher(device, fifo, chid);

		nv04_fifo_dma_pusher(fifo, chid);

		stat &= ~NV_PFIFO_INTR_DMA_PUSHER;

	}
@@ -553,7 +557,7 @@ nv04_fifo_intr(struct nvkm_subdev *subdev) 
	}



	if (stat) {

		nv_warn(fifo, "unknown intr 0x%08x\n", stat);

		nvkm_warn(subdev, "intr %08x\n", stat);

		nvkm_mask(device, NV03_PFIFO_INTR_EN_0, stat, 0x00000000);

		nvkm_wr32(device, NV03_PFIFO_INTR_0, stat);

	}