Commit e1fa724d authored by Ofir Bitton's avatar Ofir Bitton Committed by Oded Gabbay
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habanalabs: add user available interrupt to hw_ip



In order to support completions that arrive directly to the user,
the driver needs to supply the user with the first available msix
interrupt available.

Signed-off-by: default avatarOfir Bitton <obitton@habana.ai>
Reviewed-by: default avatarOded Gabbay <ogabbay@kernel.org>
Signed-off-by: default avatarOded Gabbay <ogabbay@kernel.org>
parent 8d79ce16
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+3 −0
Original line number Diff line number Diff line
@@ -408,6 +408,8 @@ struct hl_mmu_properties {
 * @sync_stream_first_mon: first monitor available for sync stream use
 * @first_available_user_sob: first sob available for the user
 * @first_available_user_mon: first monitor available for the user
 * @first_available_user_msix_interrupt: first available msix interrupt
 *                                       reserved for the user
 * @tpc_enabled_mask: which TPCs are enabled.
 * @completion_queues_count: number of completion queues.
 * @fw_security_disabled: true if security measures are disabled in firmware,
@@ -469,6 +471,7 @@ struct asic_fixed_properties {
	u16				sync_stream_first_mon;
	u16				first_available_user_sob[HL_MAX_DCORES];
	u16				first_available_user_mon[HL_MAX_DCORES];
	u16				first_available_user_msix_interrupt;
	u8				tpc_enabled_mask;
	u8				completion_queues_count;
	u8				fw_security_disabled;
+2 −0
Original line number Diff line number Diff line
@@ -90,6 +90,8 @@ static int hw_ip_info(struct hl_device *hdev, struct hl_info_args *args)
	hw_ip.psoc_pci_pll_od = prop->psoc_pci_pll_od;
	hw_ip.psoc_pci_pll_div_factor = prop->psoc_pci_pll_div_factor;

	hw_ip.first_available_interrupt_id =
			prop->first_available_user_msix_interrupt;
	return copy_to_user(out, &hw_ip,
		min((size_t)size, sizeof(hw_ip))) ? -EFAULT : 0;
}
+2 −0
Original line number Diff line number Diff line
@@ -527,6 +527,8 @@ static int gaudi_get_fixed_properties(struct hl_device *hdev)
			prop->sync_stream_first_mon +
			(num_sync_stream_queues * HL_RSVD_MONS);

	prop->first_available_user_msix_interrupt = USHRT_MAX;

	/* disable fw security for now, set it in a later stage */
	prop->fw_security_disabled = true;
	prop->fw_security_status_valid = false;
+2 −0
Original line number Diff line number Diff line
@@ -455,6 +455,8 @@ int goya_get_fixed_properties(struct hl_device *hdev)

	prop->max_pending_cs = GOYA_MAX_PENDING_CS;

	prop->first_available_user_msix_interrupt = USHRT_MAX;

	/* disable fw security for now, set it in a later stage */
	prop->fw_security_disabled = true;
	prop->fw_security_status_valid = false;
+4 −2
Original line number Diff line number Diff line
@@ -309,7 +309,9 @@ struct hl_info_hw_ip_info {
	__u32 num_of_events;
	__u32 device_id; /* PCI Device ID */
	__u32 module_id; /* For mezzanine cards in servers (From OCP spec.) */
	__u32 reserved[2];
	__u32 reserved;
	__u16 first_available_interrupt_id;
	__u16 reserved2;
	__u32 cpld_version;
	__u32 psoc_pci_pll_nr;
	__u32 psoc_pci_pll_nf;
@@ -320,7 +322,7 @@ struct hl_info_hw_ip_info {
	__u8 pad[2];
	__u8 cpucp_version[HL_INFO_VERSION_MAX_LEN];
	__u8 card_name[HL_INFO_CARD_NAME_MAX_LEN];
	__u64 reserved2;
	__u64 reserved3;
	__u64 dram_page_size;
};