Loading drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c +28 −26 Original line number Diff line number Diff line Loading @@ -411,32 +411,34 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file return copy_to_user(out, &vram_gtt, min((size_t)size, sizeof(vram_gtt))) ? -EFAULT : 0; } case AMDGPU_INFO_VRAM_GTT_TOTAL: { struct drm_amdgpu_info_vram_gtt_total vram_gtt_total; vram_gtt_total.vram_total_size = adev->mc.real_vram_size; vram_gtt_total.vram_cpu_accessible_total_size = adev->mc.visible_vram_size; vram_gtt_total.gtt_total_size = adev->mc.gtt_size; return copy_to_user(out, &vram_gtt_total, min((size_t)size, sizeof(vram_gtt_total))) ? -EFAULT : 0; } case AMDGPU_INFO_VRAM_GTT_MAX: { struct drm_amdgpu_info_vram_gtt_max vram_gtt_max; u64 max_size; max_size = adev->mc.real_vram_size - adev->vram_pin_size; vram_gtt_max.vram_max_size = max_size * 3 / 4; max_size = adev->mc.visible_vram_size - (adev->vram_pin_size - adev->invisible_pin_size); vram_gtt_max.vram_cpu_accessible_max_size = max_size * 3 / 4; max_size = adev->mc.gtt_size - adev->gart_pin_size; vram_gtt_max.gtt_max_size = max_size * 3 / 4; return copy_to_user(out, &vram_gtt_max, min((size_t)size, sizeof(vram_gtt_max))) case AMDGPU_INFO_MEMORY: { struct drm_amdgpu_memory_info mem; memset(&mem, 0, sizeof(mem)); mem.vram.total_heap_size = adev->mc.real_vram_size; mem.vram.usable_heap_size = adev->mc.real_vram_size - adev->vram_pin_size; mem.vram.heap_usage = atomic64_read(&adev->vram_usage); mem.vram.max_allocation = mem.vram.usable_heap_size * 3 / 4; mem.cpu_accessible_vram.total_heap_size = adev->mc.visible_vram_size; mem.cpu_accessible_vram.usable_heap_size = adev->mc.visible_vram_size - (adev->vram_pin_size - adev->invisible_pin_size); mem.cpu_accessible_vram.heap_usage = atomic64_read(&adev->vram_vis_usage); mem.cpu_accessible_vram.max_allocation = mem.cpu_accessible_vram.usable_heap_size * 3 / 4; mem.gtt.total_heap_size = adev->mc.gtt_size; mem.gtt.usable_heap_size = adev->mc.gtt_size - adev->gart_pin_size; mem.gtt.heap_usage = atomic64_read(&adev->gtt_usage); mem.gtt.max_allocation = mem.gtt.usable_heap_size * 3 / 4; return copy_to_user(out, &mem, min((size_t)size, sizeof(mem))) ? -EFAULT : 0; } case AMDGPU_INFO_READ_MMR_REG: { Loading include/uapi/drm/amdgpu_drm.h +26 −12 Original line number Diff line number Diff line Loading @@ -489,10 +489,8 @@ struct drm_amdgpu_cs_chunk_data { #define AMDGPU_INFO_VIS_VRAM_USAGE 0x17 /* number of TTM buffer evictions */ #define AMDGPU_INFO_NUM_EVICTIONS 0x18 /* Query the total size of VRAM and GTT domains */ #define AMDGPU_INFO_VRAM_GTT_TOTAL 0x19 /* Query the max allocation size of VRAM and GTT domains */ #define AMDGPU_INFO_VRAM_GTT_MAX 0x1a /* Query memory about VRAM and GTT domains */ #define AMDGPU_INFO_MEMORY 0x19 #define AMDGPU_INFO_MMR_SE_INDEX_SHIFT 0 #define AMDGPU_INFO_MMR_SE_INDEX_MASK 0xff Loading Loading @@ -578,16 +576,32 @@ struct drm_amdgpu_info_vram_gtt { __u64 gtt_size; }; struct drm_amdgpu_info_vram_gtt_total { __u64 vram_total_size; __u64 vram_cpu_accessible_total_size; __u64 gtt_total_size; struct drm_amdgpu_heap_info { /** max. physical memory */ __u64 total_heap_size; /** Theoretical max. available memory in the given heap */ __u64 usable_heap_size; /** * Number of bytes allocated in the heap. This includes all processes * and private allocations in the kernel. It changes when new buffers * are allocated, freed, and moved. It cannot be larger than * heap_size. */ __u64 heap_usage; /** * Theoretical possible max. size of buffer which * could be allocated in the given heap */ __u64 max_allocation; }; struct drm_amdgpu_info_vram_gtt_max { __u64 vram_max_size; __u64 vram_cpu_accessible_max_size; __u64 gtt_max_size; struct drm_amdgpu_memory_info { struct drm_amdgpu_heap_info vram; struct drm_amdgpu_heap_info cpu_accessible_vram; struct drm_amdgpu_heap_info gtt; }; struct drm_amdgpu_info_firmware { Loading Loading
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c +28 −26 Original line number Diff line number Diff line Loading @@ -411,32 +411,34 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file return copy_to_user(out, &vram_gtt, min((size_t)size, sizeof(vram_gtt))) ? -EFAULT : 0; } case AMDGPU_INFO_VRAM_GTT_TOTAL: { struct drm_amdgpu_info_vram_gtt_total vram_gtt_total; vram_gtt_total.vram_total_size = adev->mc.real_vram_size; vram_gtt_total.vram_cpu_accessible_total_size = adev->mc.visible_vram_size; vram_gtt_total.gtt_total_size = adev->mc.gtt_size; return copy_to_user(out, &vram_gtt_total, min((size_t)size, sizeof(vram_gtt_total))) ? -EFAULT : 0; } case AMDGPU_INFO_VRAM_GTT_MAX: { struct drm_amdgpu_info_vram_gtt_max vram_gtt_max; u64 max_size; max_size = adev->mc.real_vram_size - adev->vram_pin_size; vram_gtt_max.vram_max_size = max_size * 3 / 4; max_size = adev->mc.visible_vram_size - (adev->vram_pin_size - adev->invisible_pin_size); vram_gtt_max.vram_cpu_accessible_max_size = max_size * 3 / 4; max_size = adev->mc.gtt_size - adev->gart_pin_size; vram_gtt_max.gtt_max_size = max_size * 3 / 4; return copy_to_user(out, &vram_gtt_max, min((size_t)size, sizeof(vram_gtt_max))) case AMDGPU_INFO_MEMORY: { struct drm_amdgpu_memory_info mem; memset(&mem, 0, sizeof(mem)); mem.vram.total_heap_size = adev->mc.real_vram_size; mem.vram.usable_heap_size = adev->mc.real_vram_size - adev->vram_pin_size; mem.vram.heap_usage = atomic64_read(&adev->vram_usage); mem.vram.max_allocation = mem.vram.usable_heap_size * 3 / 4; mem.cpu_accessible_vram.total_heap_size = adev->mc.visible_vram_size; mem.cpu_accessible_vram.usable_heap_size = adev->mc.visible_vram_size - (adev->vram_pin_size - adev->invisible_pin_size); mem.cpu_accessible_vram.heap_usage = atomic64_read(&adev->vram_vis_usage); mem.cpu_accessible_vram.max_allocation = mem.cpu_accessible_vram.usable_heap_size * 3 / 4; mem.gtt.total_heap_size = adev->mc.gtt_size; mem.gtt.usable_heap_size = adev->mc.gtt_size - adev->gart_pin_size; mem.gtt.heap_usage = atomic64_read(&adev->gtt_usage); mem.gtt.max_allocation = mem.gtt.usable_heap_size * 3 / 4; return copy_to_user(out, &mem, min((size_t)size, sizeof(mem))) ? -EFAULT : 0; } case AMDGPU_INFO_READ_MMR_REG: { Loading
include/uapi/drm/amdgpu_drm.h +26 −12 Original line number Diff line number Diff line Loading @@ -489,10 +489,8 @@ struct drm_amdgpu_cs_chunk_data { #define AMDGPU_INFO_VIS_VRAM_USAGE 0x17 /* number of TTM buffer evictions */ #define AMDGPU_INFO_NUM_EVICTIONS 0x18 /* Query the total size of VRAM and GTT domains */ #define AMDGPU_INFO_VRAM_GTT_TOTAL 0x19 /* Query the max allocation size of VRAM and GTT domains */ #define AMDGPU_INFO_VRAM_GTT_MAX 0x1a /* Query memory about VRAM and GTT domains */ #define AMDGPU_INFO_MEMORY 0x19 #define AMDGPU_INFO_MMR_SE_INDEX_SHIFT 0 #define AMDGPU_INFO_MMR_SE_INDEX_MASK 0xff Loading Loading @@ -578,16 +576,32 @@ struct drm_amdgpu_info_vram_gtt { __u64 gtt_size; }; struct drm_amdgpu_info_vram_gtt_total { __u64 vram_total_size; __u64 vram_cpu_accessible_total_size; __u64 gtt_total_size; struct drm_amdgpu_heap_info { /** max. physical memory */ __u64 total_heap_size; /** Theoretical max. available memory in the given heap */ __u64 usable_heap_size; /** * Number of bytes allocated in the heap. This includes all processes * and private allocations in the kernel. It changes when new buffers * are allocated, freed, and moved. It cannot be larger than * heap_size. */ __u64 heap_usage; /** * Theoretical possible max. size of buffer which * could be allocated in the given heap */ __u64 max_allocation; }; struct drm_amdgpu_info_vram_gtt_max { __u64 vram_max_size; __u64 vram_cpu_accessible_max_size; __u64 gtt_max_size; struct drm_amdgpu_memory_info { struct drm_amdgpu_heap_info vram; struct drm_amdgpu_heap_info cpu_accessible_vram; struct drm_amdgpu_heap_info gtt; }; struct drm_amdgpu_info_firmware { Loading