Commit daa89e6c authored by Rene Sapiens's avatar Rene Sapiens Committed by Greg Kroah-Hartman
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staging: ti dspbridge: Rename words with camel case 



The intention of this patch is to rename the remaining variables with camel
case. Variables will be renamed avoiding camel case and Hungarian notation.
The words to be renamed in this patch are:
========================================
phNldrObj to nldr_ovlyobj
phNldr to nldr
phNodeMgr to node_man
pHostBuf to host_buf
pHostConfig to host_config
phRmmMgr to rmm_mgr
phStrmMgr to strm_man
phStrm to strm_objct
phXlator to xlator
physicalAddr to physical_addr
pInfo to channel_info
pIOC to chan_ioc
pLib to lib_obj
pList to lst
pMemBuf to mem_buf
========================================

Signed-off-by: default avatarRene Sapiens <rene.sapiens@ti.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@suse.de>
parent e436d07d

drivers/staging/tidspbridge/core/chnl_sm.c

+25 −25
Original line number Diff line number Diff line
@@ -75,7 +75,7 @@ 
/*  ----------------------------------- Function Prototypes */

static struct lst_list *create_chirp_list(u32 uChirps);



static void free_chirp_list(struct lst_list *pList);

static void free_chirp_list(struct lst_list *lst);



static struct chnl_irp *make_new_chirp(void);
@@ -88,7 +88,7 @@ static int search_free_channel(struct chnl_mgr *chnl_mgr_obj, 
 *      The direction (mode) is specified in the channel object. Note the DSP

 *      address is specified for channels opened in direct I/O mode.

 */

int bridge_chnl_add_io_req(struct chnl_object *chnl_obj, void *pHostBuf,

int bridge_chnl_add_io_req(struct chnl_object *chnl_obj, void *host_buf,

			       u32 byte_size, u32 buf_size,

			       OPTIONAL u32 dw_dsp_addr, u32 dw_arg)

{
@@ -107,7 +107,7 @@ int bridge_chnl_add_io_req(struct chnl_object *chnl_obj, void *pHostBuf, 
	is_eos = (byte_size == 0);



	/* Validate args */

	if (!pHostBuf || !pchnl) {

	if (!host_buf || !pchnl) {

		status = -EFAULT;

	} else if (is_eos && CHNL_IS_INPUT(pchnl->chnl_mode)) {

		status = -EPERM;
@@ -137,9 +137,9 @@ int bridge_chnl_add_io_req(struct chnl_object *chnl_obj, void *pHostBuf, 
	if (DSP_FAILED(status))

		goto func_end;



	if (pchnl->chnl_type == CHNL_PCPY && pchnl->chnl_id > 1 && pHostBuf) {

		if (!(pHostBuf < (void *)USERMODE_ADDR)) {

			host_sys_buf = pHostBuf;

	if (pchnl->chnl_type == CHNL_PCPY && pchnl->chnl_id > 1 && host_buf) {

		if (!(host_buf < (void *)USERMODE_ADDR)) {

			host_sys_buf = host_buf;

			goto func_cont;

		}

		/* if addr in user mode, then copy to kernel space */
@@ -149,7 +149,7 @@ int bridge_chnl_add_io_req(struct chnl_object *chnl_obj, void *pHostBuf, 
			goto func_end;

		}

		if (CHNL_IS_OUTPUT(pchnl->chnl_mode)) {

			status = copy_from_user(host_sys_buf, pHostBuf,

			status = copy_from_user(host_sys_buf, host_buf,

						buf_size);

			if (status) {

				kfree(host_sys_buf);
@@ -188,7 +188,7 @@ int bridge_chnl_add_io_req(struct chnl_object *chnl_obj, void *pHostBuf, 
	if (DSP_SUCCEEDED(status)) {

		/* Enqueue the chirp on the chnl's IORequest queue: */

		chnl_packet_obj->host_user_buf = chnl_packet_obj->host_sys_buf =

		    pHostBuf;

		    host_buf;

		if (pchnl->chnl_type == CHNL_PCPY && pchnl->chnl_id > 1)

			chnl_packet_obj->host_sys_buf = host_sys_buf;
@@ -533,23 +533,23 @@ int bridge_chnl_flush_io(struct chnl_object *chnl_obj, u32 timeout) 
 *      Retrieve information related to a channel.

 */

int bridge_chnl_get_info(struct chnl_object *chnl_obj,

			     OUT struct chnl_info *pInfo)

			     OUT struct chnl_info *channel_info)

{

	int status = 0;

	struct chnl_object *pchnl = (struct chnl_object *)chnl_obj;

	if (pInfo != NULL) {

	if (channel_info != NULL) {

		if (pchnl) {

			/* Return the requested information: */

			pInfo->hchnl_mgr = pchnl->chnl_mgr_obj;

			pInfo->event_obj = pchnl->user_event;

			pInfo->cnhl_id = pchnl->chnl_id;

			pInfo->dw_mode = pchnl->chnl_mode;

			pInfo->bytes_tx = pchnl->bytes_moved;

			pInfo->process = pchnl->process;

			pInfo->sync_event = pchnl->sync_event;

			pInfo->cio_cs = pchnl->cio_cs;

			pInfo->cio_reqs = pchnl->cio_reqs;

			pInfo->dw_state = pchnl->dw_state;

			channel_info->hchnl_mgr = pchnl->chnl_mgr_obj;

			channel_info->event_obj = pchnl->user_event;

			channel_info->cnhl_id = pchnl->chnl_id;

			channel_info->dw_mode = pchnl->chnl_mode;

			channel_info->bytes_tx = pchnl->bytes_moved;

			channel_info->process = pchnl->process;

			channel_info->sync_event = pchnl->sync_event;

			channel_info->cio_cs = pchnl->cio_cs;

			channel_info->cio_reqs = pchnl->cio_reqs;

			channel_info->dw_state = pchnl->dw_state;

		} else {

			status = -EFAULT;

		}
@@ -567,7 +567,7 @@ int bridge_chnl_get_info(struct chnl_object *chnl_obj, 
 *      Note: Ensures Channel Invariant (see notes above).

 */

int bridge_chnl_get_ioc(struct chnl_object *chnl_obj, u32 timeout,

			    OUT struct chnl_ioc *pIOC)

			    OUT struct chnl_ioc *chan_ioc)

{

	int status = 0;

	struct chnl_object *pchnl = (struct chnl_object *)chnl_obj;
@@ -580,7 +580,7 @@ int bridge_chnl_get_ioc(struct chnl_object *chnl_obj, u32 timeout, 
	struct dev_object *dev_obj;



	/* Check args: */

	if (!pIOC || !pchnl) {

	if (!chan_ioc || !pchnl) {

		status = -EFAULT;

	} else if (timeout == CHNL_IOCNOWAIT) {

		if (LST_IS_EMPTY(pchnl->pio_completions))
@@ -623,11 +623,11 @@ int bridge_chnl_get_ioc(struct chnl_object *chnl_obj, u32 timeout, 
	spin_lock_bh(&pchnl->chnl_mgr_obj->chnl_mgr_lock);

	omap_mbox_disable_irq(dev_ctxt->mbox, IRQ_RX);

	if (dequeue_ioc) {

		/* Dequeue IOC and set pIOC; */

		/* Dequeue IOC and set chan_ioc; */

		DBC_ASSERT(!LST_IS_EMPTY(pchnl->pio_completions));

		chnl_packet_obj =

		    (struct chnl_irp *)lst_get_head(pchnl->pio_completions);

		/* Update pIOC from channel state and chirp: */

		/* Update chan_ioc from channel state and chirp: */

		if (chnl_packet_obj) {

			pchnl->cio_cs--;

			/*  If this is a zero-copy channel, then set IOC's pbuf
@@ -700,7 +700,7 @@ int bridge_chnl_get_ioc(struct chnl_object *chnl_obj, u32 timeout, 
	}

func_cont:

	/* Update User's IOC block: */

	*pIOC = ioc;

	*chan_ioc = ioc;

func_end:

	return status;

}

drivers/staging/tidspbridge/hw/hw_mmu.c

+12 −12
Original line number Diff line number Diff line
@@ -127,7 +127,7 @@ static hw_status mmu_set_cam_entry(const void __iomem *base_address, 
 *       Type	    	: const u32

 *       Description     : Base Address of instance of MMU module

 *

 *       Identifier      : physicalAddr

 *       Identifier      : physical_addr

 *       Type	    	: const u32

 *       Description     : Physical Address to which the corresponding

 *			 virtual   Address shouldpoint
@@ -158,7 +158,7 @@ static hw_status mmu_set_cam_entry(const void __iomem *base_address, 
 * METHOD:	       : Check the Input parameters and set the RAM entry.

 */

static hw_status mmu_set_ram_entry(const void __iomem *base_address,

				   const u32 physicalAddr,

				   const u32 physical_addr,

				   enum hw_endianism_t endianism,

				   enum hw_element_size_t element_size,

				   enum hw_mmu_mixed_size_t mixed_size);
@@ -332,7 +332,7 @@ hw_status hw_mmu_tlb_flush(const void __iomem *base_address, u32 virtualAddr, 
}



hw_status hw_mmu_tlb_add(const void __iomem *base_address,

			 u32 physicalAddr,

			 u32 physical_addr,

			 u32 virtualAddr,

			 u32 page_sz,

			 u32 entry_num,
@@ -385,7 +385,7 @@ hw_status hw_mmu_tlb_add(const void __iomem *base_address, 


	/* Write the different fields of the RAM Entry Register */

	/* endianism of the page,Element Size of the page (8, 16, 32, 64 bit) */

	mmu_set_ram_entry(base_address, physicalAddr, map_attrs->endianism,

	mmu_set_ram_entry(base_address, physical_addr, map_attrs->endianism,

			  map_attrs->element_size, map_attrs->mixed_size);



	/* Update the MMU Lock Register */
@@ -402,7 +402,7 @@ hw_status hw_mmu_tlb_add(const void __iomem *base_address, 
}



hw_status hw_mmu_pte_set(const u32 pg_tbl_va,

			 u32 physicalAddr,

			 u32 physical_addr,

			 u32 virtualAddr,

			 u32 page_sz, struct hw_mmu_map_attrs_t *map_attrs)

{
@@ -416,7 +416,7 @@ hw_status hw_mmu_pte_set(const u32 pg_tbl_va, 
					      virtualAddr &

					      MMU_SMALL_PAGE_MASK);

		pte_val =

		    ((physicalAddr & MMU_SMALL_PAGE_MASK) |

		    ((physical_addr & MMU_SMALL_PAGE_MASK) |

		     (map_attrs->endianism << 9) | (map_attrs->

						    element_size << 4) |

		     (map_attrs->mixed_size << 11) | 2);
@@ -428,7 +428,7 @@ hw_status hw_mmu_pte_set(const u32 pg_tbl_va, 
					      virtualAddr &

					      MMU_LARGE_PAGE_MASK);

		pte_val =

		    ((physicalAddr & MMU_LARGE_PAGE_MASK) |

		    ((physical_addr & MMU_LARGE_PAGE_MASK) |

		     (map_attrs->endianism << 9) | (map_attrs->

						    element_size << 4) |

		     (map_attrs->mixed_size << 11) | 1);
@@ -439,7 +439,7 @@ hw_status hw_mmu_pte_set(const u32 pg_tbl_va, 
					      virtualAddr &

					      MMU_SECTION_ADDR_MASK);

		pte_val =

		    ((((physicalAddr & MMU_SECTION_ADDR_MASK) |

		    ((((physical_addr & MMU_SECTION_ADDR_MASK) |

		       (map_attrs->endianism << 15) | (map_attrs->

						       element_size << 10) |

		       (map_attrs->mixed_size << 17)) & ~0x40000) | 0x2);
@@ -451,7 +451,7 @@ hw_status hw_mmu_pte_set(const u32 pg_tbl_va, 
					      virtualAddr &

					      MMU_SSECTION_ADDR_MASK);

		pte_val =

		    (((physicalAddr & MMU_SSECTION_ADDR_MASK) |

		    (((physical_addr & MMU_SSECTION_ADDR_MASK) |

		      (map_attrs->endianism << 15) | (map_attrs->

						      element_size << 10) |

		      (map_attrs->mixed_size << 17)
@@ -462,7 +462,7 @@ hw_status hw_mmu_pte_set(const u32 pg_tbl_va, 
		pte_addr = hw_mmu_pte_addr_l1(pg_tbl_va,

					      virtualAddr &

					      MMU_SECTION_ADDR_MASK);

		pte_val = (physicalAddr & MMU_PAGE_TABLE_MASK) | 1;

		pte_val = (physical_addr & MMU_PAGE_TABLE_MASK) | 1;

		break;



	default:
@@ -561,7 +561,7 @@ static hw_status mmu_set_cam_entry(const void __iomem *base_address, 


/* mmu_set_ram_entry */

static hw_status mmu_set_ram_entry(const void __iomem *base_address,

				   const u32 physicalAddr,

				   const u32 physical_addr,

				   enum hw_endianism_t endianism,

				   enum hw_element_size_t element_size,

				   enum hw_mmu_mixed_size_t mixed_size)
@@ -576,7 +576,7 @@ static hw_status mmu_set_ram_entry(const void __iomem *base_address, 
			       RET_PARAM_OUT_OF_RANGE, RES_MMU_BASE +

			       RES_INVALID_INPUT_PARAM);



	mmu_ram_reg = (physicalAddr & MMU_ADDR_MASK);

	mmu_ram_reg = (physical_addr & MMU_ADDR_MASK);

	mmu_ram_reg = (mmu_ram_reg) | ((endianism << 9) | (element_size << 7) |

				       (mixed_size << 6));

drivers/staging/tidspbridge/hw/hw_mmu.h

+2 −2
Original line number Diff line number Diff line
@@ -80,7 +80,7 @@ extern hw_status hw_mmu_tlb_flush(const void __iomem *base_address, 
				  u32 virtualAddr, u32 page_sz);



extern hw_status hw_mmu_tlb_add(const void __iomem *base_address,

				u32 physicalAddr,

				u32 physical_addr,

				u32 virtualAddr,

				u32 page_sz,

				u32 entry_num,
@@ -89,7 +89,7 @@ extern hw_status hw_mmu_tlb_add(const void __iomem *base_address, 


/* For PTEs */

extern hw_status hw_mmu_pte_set(const u32 pg_tbl_va,

				u32 physicalAddr,

				u32 physical_addr,

				u32 virtualAddr,

				u32 page_sz,

				struct hw_mmu_map_attrs_t *map_attrs);

drivers/staging/tidspbridge/include/dspbridge/cmm.h

+3 −3
Original line number Diff line number Diff line
@@ -281,7 +281,7 @@ extern void *cmm_xlator_alloc_buf(struct cmm_xlatorobject *xlator, 
 *     address translation. Node messaging and streams use this to perform

 *     inter-processor(GPP<->DSP) zero-copy data transfer.

 *  Parameters:

 *     phXlator:       Address to place handle to a new Xlator handle.

 *     xlator:         Address to place handle to a new Xlator handle.

 *     hcmm_mgr:        Handle to Cmm Mgr associated with this translator.

 *     pXlatorAttrs:   Translator attributes used for the client NODE or STREAM.

 *  Returns:
@@ -289,13 +289,13 @@ extern void *cmm_xlator_alloc_buf(struct cmm_xlatorobject *xlator, 
 *     -EINVAL:    Bad input Attrs.

 *     -ENOMEM:   Insufficient memory(local) for requested resources.

 *  Requires:

 *     phXlator != NULL

 *     xlator != NULL

 *     hcmm_mgr != NULL

 *     pXlatorAttrs != NULL

 *  Ensures:

 *

 */

extern int cmm_xlator_create(OUT struct cmm_xlatorobject **phXlator,

extern int cmm_xlator_create(OUT struct cmm_xlatorobject **xlator,

				    struct cmm_object *hcmm_mgr,

				    struct cmm_xlatorattrs *pXlatorAttrs);

drivers/staging/tidspbridge/include/dspbridge/cod.h

+2 −2
Original line number Diff line number Diff line
@@ -307,7 +307,7 @@ extern int cod_load_base(struct cod_manager *cod_mgr_obj, 
 *      pszCoffPath:    Coff file to open.

 *      flags:          COD_NOLOAD (don't load symbols) or COD_SYMB (load

 *                      symbols).

 *      pLib:           Handle returned that can be used in calls to cod_close

 *      lib_obj:        Handle returned that can be used in calls to cod_close

 *                      and cod_get_section.

 *  Returns:

 *      S_OK:                   Success.
@@ -321,7 +321,7 @@ extern int cod_load_base(struct cod_manager *cod_mgr_obj, 
 */

extern int cod_open(struct cod_manager *hmgr,

			   IN char *pszCoffPath,

			   u32 flags, OUT struct cod_libraryobj **pLib);

			   u32 flags, OUT struct cod_libraryobj **lib_obj);



/*

 *  ======== cod_open_base ========