Loading drivers/staging/ccree/ssi_aead.c +13 −13 Original line number Diff line number Diff line Loading @@ -257,7 +257,7 @@ static void cc_aead_complete(struct device *dev, void *ssi_req) cc_copy_sg_portion(dev, areq_ctx->mac_buf, areq_ctx->dst_sgl, skip, (skip + ctx->authsize), SSI_SG_FROM_BUF); CC_SG_FROM_BUF); } /* If an IV was generated, copy it back to the user provided Loading Loading @@ -739,7 +739,7 @@ static void cc_set_assoc_desc(struct aead_request *areq, unsigned int flow_mode, struct device *dev = drvdata_to_dev(ctx->drvdata); switch (assoc_dma_type) { case SSI_DMA_BUF_DLLI: case CC_DMA_BUF_DLLI: dev_dbg(dev, "ASSOC buffer type DLLI\n"); hw_desc_init(&desc[idx]); set_din_type(&desc[idx], DMA_DLLI, sg_dma_address(areq->src), Loading @@ -749,7 +749,7 @@ static void cc_set_assoc_desc(struct aead_request *areq, unsigned int flow_mode, areq_ctx->cryptlen > 0) set_din_not_last_indication(&desc[idx]); break; case SSI_DMA_BUF_MLLI: case CC_DMA_BUF_MLLI: dev_dbg(dev, "ASSOC buffer type MLLI\n"); hw_desc_init(&desc[idx]); set_din_type(&desc[idx], DMA_MLLI, areq_ctx->assoc.sram_addr, Loading @@ -759,7 +759,7 @@ static void cc_set_assoc_desc(struct aead_request *areq, unsigned int flow_mode, areq_ctx->cryptlen > 0) set_din_not_last_indication(&desc[idx]); break; case SSI_DMA_BUF_NULL: case CC_DMA_BUF_NULL: default: dev_err(dev, "Invalid ASSOC buffer type\n"); } Loading @@ -780,7 +780,7 @@ static void cc_proc_authen_desc(struct aead_request *areq, struct device *dev = drvdata_to_dev(ctx->drvdata); switch (data_dma_type) { case SSI_DMA_BUF_DLLI: case CC_DMA_BUF_DLLI: { struct scatterlist *cipher = (direct == DRV_CRYPTO_DIRECTION_ENCRYPT) ? Loading @@ -797,7 +797,7 @@ static void cc_proc_authen_desc(struct aead_request *areq, set_flow_mode(&desc[idx], flow_mode); break; } case SSI_DMA_BUF_MLLI: case CC_DMA_BUF_MLLI: { /* DOUBLE-PASS flow (as default) * assoc. + iv + data -compact in one table Loading @@ -823,7 +823,7 @@ static void cc_proc_authen_desc(struct aead_request *areq, set_flow_mode(&desc[idx], flow_mode); break; } case SSI_DMA_BUF_NULL: case CC_DMA_BUF_NULL: default: dev_err(dev, "AUTHENC: Invalid SRC/DST buffer type\n"); } Loading @@ -847,7 +847,7 @@ static void cc_proc_cipher_desc(struct aead_request *areq, return; /*null processing*/ switch (data_dma_type) { case SSI_DMA_BUF_DLLI: case CC_DMA_BUF_DLLI: dev_dbg(dev, "CIPHER: SRC/DST buffer type DLLI\n"); hw_desc_init(&desc[idx]); set_din_type(&desc[idx], DMA_DLLI, Loading @@ -860,7 +860,7 @@ static void cc_proc_cipher_desc(struct aead_request *areq, areq_ctx->cryptlen, NS_BIT, 0); set_flow_mode(&desc[idx], flow_mode); break; case SSI_DMA_BUF_MLLI: case CC_DMA_BUF_MLLI: dev_dbg(dev, "CIPHER: SRC/DST buffer type MLLI\n"); hw_desc_init(&desc[idx]); set_din_type(&desc[idx], DMA_MLLI, areq_ctx->src.sram_addr, Loading @@ -869,7 +869,7 @@ static void cc_proc_cipher_desc(struct aead_request *areq, areq_ctx->dst.mlli_nents, NS_BIT, 0); set_flow_mode(&desc[idx], flow_mode); break; case SSI_DMA_BUF_NULL: case CC_DMA_BUF_NULL: default: dev_err(dev, "CIPHER: Invalid SRC/DST buffer type\n"); } Loading Loading @@ -1171,8 +1171,8 @@ static void cc_mlli_to_sram(struct aead_request *req, struct cc_aead_ctx *ctx = crypto_aead_ctx(tfm); struct device *dev = drvdata_to_dev(ctx->drvdata); if (req_ctx->assoc_buff_type == SSI_DMA_BUF_MLLI || req_ctx->data_buff_type == SSI_DMA_BUF_MLLI || if (req_ctx->assoc_buff_type == CC_DMA_BUF_MLLI || req_ctx->data_buff_type == CC_DMA_BUF_MLLI || !req_ctx->is_single_pass) { dev_dbg(dev, "Copy-to-sram: mlli_dma=%08x, mlli_size=%u\n", (unsigned int)ctx->drvdata->mlli_sram_addr, Loading Loading @@ -2670,7 +2670,7 @@ static struct ssi_crypto_alg *cc_create_aead_alg(struct ssi_alg_template *tmpl, snprintf(alg->base.cra_driver_name, CRYPTO_MAX_ALG_NAME, "%s", tmpl->driver_name); alg->base.cra_module = THIS_MODULE; alg->base.cra_priority = SSI_CRA_PRIO; alg->base.cra_priority = CC_CRA_PRIO; alg->base.cra_ctxsize = sizeof(struct cc_aead_ctx); alg->base.cra_flags = CRYPTO_ALG_ASYNC | CRYPTO_ALG_KERN_DRIVER_ONLY | Loading drivers/staging/ccree/ssi_aead.h +3 −3 Original line number Diff line number Diff line Loading @@ -18,8 +18,8 @@ * ARM CryptoCell AEAD Crypto API */ #ifndef __SSI_AEAD_H__ #define __SSI_AEAD_H__ #ifndef __CC_AEAD_H__ #define __CC_AEAD_H__ #include <linux/kernel.h> #include <crypto/algapi.h> Loading Loading @@ -119,4 +119,4 @@ struct aead_req_ctx { int cc_aead_alloc(struct ssi_drvdata *drvdata); int cc_aead_free(struct ssi_drvdata *drvdata); #endif /*__SSI_AEAD_H__*/ #endif /*__CC_AEAD_H__*/ drivers/staging/ccree/ssi_buffer_mgr.c +39 −39 Original line number Diff line number Diff line Loading @@ -61,11 +61,11 @@ struct buffer_array { static inline char *cc_dma_buf_type(enum ssi_req_dma_buf_type type) { switch (type) { case SSI_DMA_BUF_NULL: case CC_DMA_BUF_NULL: return "BUF_NULL"; case SSI_DMA_BUF_DLLI: case CC_DMA_BUF_DLLI: return "BUF_DLLI"; case SSI_DMA_BUF_MLLI: case CC_DMA_BUF_MLLI: return "BUF_MLLI"; default: return "BUF_INVALID"; Loading Loading @@ -163,7 +163,7 @@ void cc_copy_sg_portion(struct device *dev, u8 *dest, struct scatterlist *sg, nents = cc_get_sgl_nents(dev, sg, end, &lbytes, NULL); sg_copy_buffer(sg, nents, (void *)dest, (end - to_skip + 1), to_skip, (direct == SSI_SG_TO_BUF)); (direct == CC_SG_TO_BUF)); } static int cc_render_buff_to_mlli(struct device *dev, dma_addr_t buff_dma, Loading Loading @@ -457,7 +457,7 @@ static int ssi_ahash_handle_curr_buf(struct device *dev, &sg_dma_address(areq_ctx->buff_sg), sg_page(areq_ctx->buff_sg), sg_virt(areq_ctx->buff_sg), areq_ctx->buff_sg->offset, areq_ctx->buff_sg->length); areq_ctx->data_dma_buf_type = SSI_DMA_BUF_DLLI; areq_ctx->data_dma_buf_type = CC_DMA_BUF_DLLI; areq_ctx->curr_sg = areq_ctx->buff_sg; areq_ctx->in_nents = 0; /* prepare for case of MLLI */ Loading @@ -481,7 +481,7 @@ void cc_unmap_blkcipher_request(struct device *dev, void *ctx, DMA_TO_DEVICE); } /* Release pool */ if (req_ctx->dma_buf_type == SSI_DMA_BUF_MLLI) { if (req_ctx->dma_buf_type == CC_DMA_BUF_MLLI) { dma_pool_free(req_ctx->mlli_params.curr_pool, req_ctx->mlli_params.mlli_virt_addr, req_ctx->mlli_params.mlli_dma_addr); Loading Loading @@ -510,7 +510,7 @@ int cc_map_blkcipher_request(struct ssi_drvdata *drvdata, void *ctx, int rc = 0; u32 mapped_nents = 0; req_ctx->dma_buf_type = SSI_DMA_BUF_DLLI; req_ctx->dma_buf_type = CC_DMA_BUF_DLLI; mlli_params->curr_pool = NULL; sg_data.num_of_buffers = 0; Loading Loading @@ -541,11 +541,11 @@ int cc_map_blkcipher_request(struct ssi_drvdata *drvdata, void *ctx, goto ablkcipher_exit; } if (mapped_nents > 1) req_ctx->dma_buf_type = SSI_DMA_BUF_MLLI; req_ctx->dma_buf_type = CC_DMA_BUF_MLLI; if (src == dst) { /* Handle inplace operation */ if (req_ctx->dma_buf_type == SSI_DMA_BUF_MLLI) { if (req_ctx->dma_buf_type == CC_DMA_BUF_MLLI) { req_ctx->out_nents = 0; cc_add_sg_entry(dev, &sg_data, req_ctx->in_nents, src, nbytes, 0, true, Loading @@ -560,9 +560,9 @@ int cc_map_blkcipher_request(struct ssi_drvdata *drvdata, void *ctx, goto ablkcipher_exit; } if (mapped_nents > 1) req_ctx->dma_buf_type = SSI_DMA_BUF_MLLI; req_ctx->dma_buf_type = CC_DMA_BUF_MLLI; if (req_ctx->dma_buf_type == SSI_DMA_BUF_MLLI) { if (req_ctx->dma_buf_type == CC_DMA_BUF_MLLI) { cc_add_sg_entry(dev, &sg_data, req_ctx->in_nents, src, nbytes, 0, true, &req_ctx->in_mlli_nents); Loading @@ -572,7 +572,7 @@ int cc_map_blkcipher_request(struct ssi_drvdata *drvdata, void *ctx, } } if (req_ctx->dma_buf_type == SSI_DMA_BUF_MLLI) { if (req_ctx->dma_buf_type == CC_DMA_BUF_MLLI) { mlli_params->curr_pool = buff_mgr->mlli_buffs_pool; rc = cc_generate_mlli(dev, &sg_data, mlli_params); if (rc) Loading Loading @@ -679,7 +679,7 @@ void cc_unmap_aead_request(struct device *dev, struct aead_request *req) * data memory overriding that caused by cache coherence * problem. */ cc_copy_mac(dev, req, SSI_SG_FROM_BUF); cc_copy_mac(dev, req, CC_SG_FROM_BUF); } } Loading Loading @@ -771,7 +771,7 @@ static int cc_aead_chain_iv(struct ssi_drvdata *drvdata, (areq_ctx->gen_ctx.iv_dma_addr + iv_ofs), iv_size_to_authenc, is_last, &areq_ctx->assoc.mlli_nents); areq_ctx->assoc_buff_type = SSI_DMA_BUF_MLLI; areq_ctx->assoc_buff_type = CC_DMA_BUF_MLLI; } chain_iv_exit: Loading Loading @@ -801,7 +801,7 @@ static int cc_aead_chain_assoc(struct ssi_drvdata *drvdata, } if (req->assoclen == 0) { areq_ctx->assoc_buff_type = SSI_DMA_BUF_NULL; areq_ctx->assoc_buff_type = CC_DMA_BUF_NULL; areq_ctx->assoc.nents = 0; areq_ctx->assoc.mlli_nents = 0; dev_dbg(dev, "Chain assoc of length 0: buff_type=%s nents=%u\n", Loading Loading @@ -851,18 +851,18 @@ static int cc_aead_chain_assoc(struct ssi_drvdata *drvdata, } if (mapped_nents == 1 && areq_ctx->ccm_hdr_size == ccm_header_size_null) areq_ctx->assoc_buff_type = SSI_DMA_BUF_DLLI; areq_ctx->assoc_buff_type = CC_DMA_BUF_DLLI; else areq_ctx->assoc_buff_type = SSI_DMA_BUF_MLLI; areq_ctx->assoc_buff_type = CC_DMA_BUF_MLLI; if (do_chain || areq_ctx->assoc_buff_type == SSI_DMA_BUF_MLLI) { if (do_chain || areq_ctx->assoc_buff_type == CC_DMA_BUF_MLLI) { dev_dbg(dev, "Chain assoc: buff_type=%s nents=%u\n", cc_dma_buf_type(areq_ctx->assoc_buff_type), areq_ctx->assoc.nents); cc_add_sg_entry(dev, sg_data, areq_ctx->assoc.nents, req->src, req->assoclen, 0, is_last, &areq_ctx->assoc.mlli_nents); areq_ctx->assoc_buff_type = SSI_DMA_BUF_MLLI; areq_ctx->assoc_buff_type = CC_DMA_BUF_MLLI; } chain_assoc_exit: Loading Loading @@ -939,7 +939,7 @@ static int cc_prepare_aead_data_mlli(struct ssi_drvdata *drvdata, * we must neglect this code. */ if (!drvdata->coherent) cc_copy_mac(dev, req, SSI_SG_TO_BUF); cc_copy_mac(dev, req, CC_SG_TO_BUF); areq_ctx->icv_virt_addr = areq_ctx->backup_mac; } else { Loading Loading @@ -981,7 +981,7 @@ static int cc_prepare_aead_data_mlli(struct ssi_drvdata *drvdata, * MAC verification upon request completion */ if (areq_ctx->is_icv_fragmented) { cc_copy_mac(dev, req, SSI_SG_TO_BUF); cc_copy_mac(dev, req, CC_SG_TO_BUF); areq_ctx->icv_virt_addr = areq_ctx->backup_mac; } else { /* Contig. ICV */ Loading Loading @@ -1136,12 +1136,12 @@ static int cc_aead_chain_data(struct ssi_drvdata *drvdata, if (src_mapped_nents > 1 || dst_mapped_nents > 1 || do_chain) { areq_ctx->data_buff_type = SSI_DMA_BUF_MLLI; areq_ctx->data_buff_type = CC_DMA_BUF_MLLI; rc = cc_prepare_aead_data_mlli(drvdata, req, sg_data, &src_last_bytes, &dst_last_bytes, is_last_table); } else { areq_ctx->data_buff_type = SSI_DMA_BUF_DLLI; areq_ctx->data_buff_type = CC_DMA_BUF_DLLI; cc_prepare_aead_data_dlli(req, &src_last_bytes, &dst_last_bytes); } Loading @@ -1156,13 +1156,13 @@ static void cc_update_aead_mlli_nents(struct ssi_drvdata *drvdata, struct aead_req_ctx *areq_ctx = aead_request_ctx(req); u32 curr_mlli_size = 0; if (areq_ctx->assoc_buff_type == SSI_DMA_BUF_MLLI) { if (areq_ctx->assoc_buff_type == CC_DMA_BUF_MLLI) { areq_ctx->assoc.sram_addr = drvdata->mlli_sram_addr; curr_mlli_size = areq_ctx->assoc.mlli_nents * LLI_ENTRY_BYTE_SIZE; } if (areq_ctx->data_buff_type == SSI_DMA_BUF_MLLI) { if (areq_ctx->data_buff_type == CC_DMA_BUF_MLLI) { /*Inplace case dst nents equal to src nents*/ if (req->src == req->dst) { areq_ctx->dst.mlli_nents = areq_ctx->src.mlli_nents; Loading Loading @@ -1226,7 +1226,7 @@ int cc_map_aead_request(struct ssi_drvdata *drvdata, struct aead_request *req) if (drvdata->coherent && areq_ctx->gen_ctx.op_type == DRV_CRYPTO_DIRECTION_DECRYPT && req->src == req->dst) cc_copy_mac(dev, req, SSI_SG_TO_BUF); cc_copy_mac(dev, req, CC_SG_TO_BUF); /* cacluate the size for cipher remove ICV in decrypt*/ areq_ctx->cryptlen = (areq_ctx->gen_ctx.op_type == Loading Loading @@ -1380,8 +1380,8 @@ int cc_map_aead_request(struct ssi_drvdata *drvdata, struct aead_request *req) /* Mlli support -start building the MLLI according to the above * results */ if (areq_ctx->assoc_buff_type == SSI_DMA_BUF_MLLI || areq_ctx->data_buff_type == SSI_DMA_BUF_MLLI) { if (areq_ctx->assoc_buff_type == CC_DMA_BUF_MLLI || areq_ctx->data_buff_type == CC_DMA_BUF_MLLI) { mlli_params->curr_pool = buff_mgr->mlli_buffs_pool; rc = cc_generate_mlli(dev, &sg_data, mlli_params); if (rc) Loading Loading @@ -1419,7 +1419,7 @@ int cc_map_hash_request_final(struct ssi_drvdata *drvdata, void *ctx, dev_dbg(dev, "final params : curr_buff=%pK curr_buff_cnt=0x%X nbytes = 0x%X src=%pK curr_index=%u\n", curr_buff, *curr_buff_cnt, nbytes, src, areq_ctx->buff_index); /* Init the type of the dma buffer */ areq_ctx->data_dma_buf_type = SSI_DMA_BUF_NULL; areq_ctx->data_dma_buf_type = CC_DMA_BUF_NULL; mlli_params->curr_pool = NULL; sg_data.num_of_buffers = 0; areq_ctx->in_nents = 0; Loading @@ -1445,19 +1445,19 @@ int cc_map_hash_request_final(struct ssi_drvdata *drvdata, void *ctx, goto unmap_curr_buff; } if (src && mapped_nents == 1 && areq_ctx->data_dma_buf_type == SSI_DMA_BUF_NULL) { areq_ctx->data_dma_buf_type == CC_DMA_BUF_NULL) { memcpy(areq_ctx->buff_sg, src, sizeof(struct scatterlist)); areq_ctx->buff_sg->length = nbytes; areq_ctx->curr_sg = areq_ctx->buff_sg; areq_ctx->data_dma_buf_type = SSI_DMA_BUF_DLLI; areq_ctx->data_dma_buf_type = CC_DMA_BUF_DLLI; } else { areq_ctx->data_dma_buf_type = SSI_DMA_BUF_MLLI; areq_ctx->data_dma_buf_type = CC_DMA_BUF_MLLI; } } /*build mlli */ if (areq_ctx->data_dma_buf_type == SSI_DMA_BUF_MLLI) { if (areq_ctx->data_dma_buf_type == CC_DMA_BUF_MLLI) { mlli_params->curr_pool = buff_mgr->mlli_buffs_pool; /* add the src data to the sg_data */ cc_add_sg_entry(dev, &sg_data, areq_ctx->in_nents, src, nbytes, Loading Loading @@ -1507,7 +1507,7 @@ int cc_map_hash_request_update(struct ssi_drvdata *drvdata, void *ctx, dev_dbg(dev, " update params : curr_buff=%pK curr_buff_cnt=0x%X nbytes=0x%X src=%pK curr_index=%u\n", curr_buff, *curr_buff_cnt, nbytes, src, areq_ctx->buff_index); /* Init the type of the dma buffer */ areq_ctx->data_dma_buf_type = SSI_DMA_BUF_NULL; areq_ctx->data_dma_buf_type = CC_DMA_BUF_NULL; mlli_params->curr_pool = NULL; areq_ctx->curr_sg = NULL; sg_data.num_of_buffers = 0; Loading Loading @@ -1539,7 +1539,7 @@ int cc_map_hash_request_update(struct ssi_drvdata *drvdata, void *ctx, *next_buff_cnt); cc_copy_sg_portion(dev, next_buff, src, (update_data_len - *curr_buff_cnt), nbytes, SSI_SG_TO_BUF); nbytes, CC_SG_TO_BUF); /* change the buffer index for next operation */ swap_index = 1; } Loading @@ -1561,19 +1561,19 @@ int cc_map_hash_request_update(struct ssi_drvdata *drvdata, void *ctx, goto unmap_curr_buff; } if (mapped_nents == 1 && areq_ctx->data_dma_buf_type == SSI_DMA_BUF_NULL) { areq_ctx->data_dma_buf_type == CC_DMA_BUF_NULL) { /* only one entry in the SG and no previous data */ memcpy(areq_ctx->buff_sg, src, sizeof(struct scatterlist)); areq_ctx->buff_sg->length = update_data_len; areq_ctx->data_dma_buf_type = SSI_DMA_BUF_DLLI; areq_ctx->data_dma_buf_type = CC_DMA_BUF_DLLI; areq_ctx->curr_sg = areq_ctx->buff_sg; } else { areq_ctx->data_dma_buf_type = SSI_DMA_BUF_MLLI; areq_ctx->data_dma_buf_type = CC_DMA_BUF_MLLI; } } if (areq_ctx->data_dma_buf_type == SSI_DMA_BUF_MLLI) { if (areq_ctx->data_dma_buf_type == CC_DMA_BUF_MLLI) { mlli_params->curr_pool = buff_mgr->mlli_buffs_pool; /* add the src data to the sg_data */ cc_add_sg_entry(dev, &sg_data, areq_ctx->in_nents, src, Loading drivers/staging/ccree/ssi_buffer_mgr.h +7 −7 Original line number Diff line number Diff line Loading @@ -18,8 +18,8 @@ * Buffer Manager */ #ifndef __SSI_BUFFER_MGR_H__ #define __SSI_BUFFER_MGR_H__ #ifndef __CC_BUFFER_MGR_H__ #define __CC_BUFFER_MGR_H__ #include <crypto/algapi.h> Loading @@ -27,14 +27,14 @@ #include "ssi_driver.h" enum ssi_req_dma_buf_type { SSI_DMA_BUF_NULL = 0, SSI_DMA_BUF_DLLI, SSI_DMA_BUF_MLLI CC_DMA_BUF_NULL = 0, CC_DMA_BUF_DLLI, CC_DMA_BUF_MLLI }; enum ssi_sg_cpy_direct { SSI_SG_TO_BUF = 0, SSI_SG_FROM_BUF = 1 CC_SG_TO_BUF = 0, CC_SG_FROM_BUF = 1 }; struct ssi_mlli { Loading drivers/staging/ccree/ssi_cipher.c +2 −2 Original line number Diff line number Diff line Loading @@ -541,7 +541,7 @@ static void cc_setup_cipher_data(struct crypto_tfm *tfm, return; } /* Process */ if (req_ctx->dma_buf_type == SSI_DMA_BUF_DLLI) { if (req_ctx->dma_buf_type == CC_DMA_BUF_DLLI) { dev_dbg(dev, " data params addr %pad length 0x%X\n", &sg_dma_address(src), nbytes); dev_dbg(dev, " data params addr %pad length 0x%X\n", Loading Loading @@ -1091,7 +1091,7 @@ struct ssi_crypto_alg *cc_cipher_create_alg(struct ssi_alg_template *template, snprintf(alg->cra_driver_name, CRYPTO_MAX_ALG_NAME, "%s", template->driver_name); alg->cra_module = THIS_MODULE; alg->cra_priority = SSI_CRA_PRIO; alg->cra_priority = CC_CRA_PRIO; alg->cra_blocksize = template->blocksize; alg->cra_alignmask = 0; alg->cra_ctxsize = sizeof(struct cc_cipher_ctx); Loading Loading
drivers/staging/ccree/ssi_aead.c +13 −13 Original line number Diff line number Diff line Loading @@ -257,7 +257,7 @@ static void cc_aead_complete(struct device *dev, void *ssi_req) cc_copy_sg_portion(dev, areq_ctx->mac_buf, areq_ctx->dst_sgl, skip, (skip + ctx->authsize), SSI_SG_FROM_BUF); CC_SG_FROM_BUF); } /* If an IV was generated, copy it back to the user provided Loading Loading @@ -739,7 +739,7 @@ static void cc_set_assoc_desc(struct aead_request *areq, unsigned int flow_mode, struct device *dev = drvdata_to_dev(ctx->drvdata); switch (assoc_dma_type) { case SSI_DMA_BUF_DLLI: case CC_DMA_BUF_DLLI: dev_dbg(dev, "ASSOC buffer type DLLI\n"); hw_desc_init(&desc[idx]); set_din_type(&desc[idx], DMA_DLLI, sg_dma_address(areq->src), Loading @@ -749,7 +749,7 @@ static void cc_set_assoc_desc(struct aead_request *areq, unsigned int flow_mode, areq_ctx->cryptlen > 0) set_din_not_last_indication(&desc[idx]); break; case SSI_DMA_BUF_MLLI: case CC_DMA_BUF_MLLI: dev_dbg(dev, "ASSOC buffer type MLLI\n"); hw_desc_init(&desc[idx]); set_din_type(&desc[idx], DMA_MLLI, areq_ctx->assoc.sram_addr, Loading @@ -759,7 +759,7 @@ static void cc_set_assoc_desc(struct aead_request *areq, unsigned int flow_mode, areq_ctx->cryptlen > 0) set_din_not_last_indication(&desc[idx]); break; case SSI_DMA_BUF_NULL: case CC_DMA_BUF_NULL: default: dev_err(dev, "Invalid ASSOC buffer type\n"); } Loading @@ -780,7 +780,7 @@ static void cc_proc_authen_desc(struct aead_request *areq, struct device *dev = drvdata_to_dev(ctx->drvdata); switch (data_dma_type) { case SSI_DMA_BUF_DLLI: case CC_DMA_BUF_DLLI: { struct scatterlist *cipher = (direct == DRV_CRYPTO_DIRECTION_ENCRYPT) ? Loading @@ -797,7 +797,7 @@ static void cc_proc_authen_desc(struct aead_request *areq, set_flow_mode(&desc[idx], flow_mode); break; } case SSI_DMA_BUF_MLLI: case CC_DMA_BUF_MLLI: { /* DOUBLE-PASS flow (as default) * assoc. + iv + data -compact in one table Loading @@ -823,7 +823,7 @@ static void cc_proc_authen_desc(struct aead_request *areq, set_flow_mode(&desc[idx], flow_mode); break; } case SSI_DMA_BUF_NULL: case CC_DMA_BUF_NULL: default: dev_err(dev, "AUTHENC: Invalid SRC/DST buffer type\n"); } Loading @@ -847,7 +847,7 @@ static void cc_proc_cipher_desc(struct aead_request *areq, return; /*null processing*/ switch (data_dma_type) { case SSI_DMA_BUF_DLLI: case CC_DMA_BUF_DLLI: dev_dbg(dev, "CIPHER: SRC/DST buffer type DLLI\n"); hw_desc_init(&desc[idx]); set_din_type(&desc[idx], DMA_DLLI, Loading @@ -860,7 +860,7 @@ static void cc_proc_cipher_desc(struct aead_request *areq, areq_ctx->cryptlen, NS_BIT, 0); set_flow_mode(&desc[idx], flow_mode); break; case SSI_DMA_BUF_MLLI: case CC_DMA_BUF_MLLI: dev_dbg(dev, "CIPHER: SRC/DST buffer type MLLI\n"); hw_desc_init(&desc[idx]); set_din_type(&desc[idx], DMA_MLLI, areq_ctx->src.sram_addr, Loading @@ -869,7 +869,7 @@ static void cc_proc_cipher_desc(struct aead_request *areq, areq_ctx->dst.mlli_nents, NS_BIT, 0); set_flow_mode(&desc[idx], flow_mode); break; case SSI_DMA_BUF_NULL: case CC_DMA_BUF_NULL: default: dev_err(dev, "CIPHER: Invalid SRC/DST buffer type\n"); } Loading Loading @@ -1171,8 +1171,8 @@ static void cc_mlli_to_sram(struct aead_request *req, struct cc_aead_ctx *ctx = crypto_aead_ctx(tfm); struct device *dev = drvdata_to_dev(ctx->drvdata); if (req_ctx->assoc_buff_type == SSI_DMA_BUF_MLLI || req_ctx->data_buff_type == SSI_DMA_BUF_MLLI || if (req_ctx->assoc_buff_type == CC_DMA_BUF_MLLI || req_ctx->data_buff_type == CC_DMA_BUF_MLLI || !req_ctx->is_single_pass) { dev_dbg(dev, "Copy-to-sram: mlli_dma=%08x, mlli_size=%u\n", (unsigned int)ctx->drvdata->mlli_sram_addr, Loading Loading @@ -2670,7 +2670,7 @@ static struct ssi_crypto_alg *cc_create_aead_alg(struct ssi_alg_template *tmpl, snprintf(alg->base.cra_driver_name, CRYPTO_MAX_ALG_NAME, "%s", tmpl->driver_name); alg->base.cra_module = THIS_MODULE; alg->base.cra_priority = SSI_CRA_PRIO; alg->base.cra_priority = CC_CRA_PRIO; alg->base.cra_ctxsize = sizeof(struct cc_aead_ctx); alg->base.cra_flags = CRYPTO_ALG_ASYNC | CRYPTO_ALG_KERN_DRIVER_ONLY | Loading
drivers/staging/ccree/ssi_aead.h +3 −3 Original line number Diff line number Diff line Loading @@ -18,8 +18,8 @@ * ARM CryptoCell AEAD Crypto API */ #ifndef __SSI_AEAD_H__ #define __SSI_AEAD_H__ #ifndef __CC_AEAD_H__ #define __CC_AEAD_H__ #include <linux/kernel.h> #include <crypto/algapi.h> Loading Loading @@ -119,4 +119,4 @@ struct aead_req_ctx { int cc_aead_alloc(struct ssi_drvdata *drvdata); int cc_aead_free(struct ssi_drvdata *drvdata); #endif /*__SSI_AEAD_H__*/ #endif /*__CC_AEAD_H__*/
drivers/staging/ccree/ssi_buffer_mgr.c +39 −39 Original line number Diff line number Diff line Loading @@ -61,11 +61,11 @@ struct buffer_array { static inline char *cc_dma_buf_type(enum ssi_req_dma_buf_type type) { switch (type) { case SSI_DMA_BUF_NULL: case CC_DMA_BUF_NULL: return "BUF_NULL"; case SSI_DMA_BUF_DLLI: case CC_DMA_BUF_DLLI: return "BUF_DLLI"; case SSI_DMA_BUF_MLLI: case CC_DMA_BUF_MLLI: return "BUF_MLLI"; default: return "BUF_INVALID"; Loading Loading @@ -163,7 +163,7 @@ void cc_copy_sg_portion(struct device *dev, u8 *dest, struct scatterlist *sg, nents = cc_get_sgl_nents(dev, sg, end, &lbytes, NULL); sg_copy_buffer(sg, nents, (void *)dest, (end - to_skip + 1), to_skip, (direct == SSI_SG_TO_BUF)); (direct == CC_SG_TO_BUF)); } static int cc_render_buff_to_mlli(struct device *dev, dma_addr_t buff_dma, Loading Loading @@ -457,7 +457,7 @@ static int ssi_ahash_handle_curr_buf(struct device *dev, &sg_dma_address(areq_ctx->buff_sg), sg_page(areq_ctx->buff_sg), sg_virt(areq_ctx->buff_sg), areq_ctx->buff_sg->offset, areq_ctx->buff_sg->length); areq_ctx->data_dma_buf_type = SSI_DMA_BUF_DLLI; areq_ctx->data_dma_buf_type = CC_DMA_BUF_DLLI; areq_ctx->curr_sg = areq_ctx->buff_sg; areq_ctx->in_nents = 0; /* prepare for case of MLLI */ Loading @@ -481,7 +481,7 @@ void cc_unmap_blkcipher_request(struct device *dev, void *ctx, DMA_TO_DEVICE); } /* Release pool */ if (req_ctx->dma_buf_type == SSI_DMA_BUF_MLLI) { if (req_ctx->dma_buf_type == CC_DMA_BUF_MLLI) { dma_pool_free(req_ctx->mlli_params.curr_pool, req_ctx->mlli_params.mlli_virt_addr, req_ctx->mlli_params.mlli_dma_addr); Loading Loading @@ -510,7 +510,7 @@ int cc_map_blkcipher_request(struct ssi_drvdata *drvdata, void *ctx, int rc = 0; u32 mapped_nents = 0; req_ctx->dma_buf_type = SSI_DMA_BUF_DLLI; req_ctx->dma_buf_type = CC_DMA_BUF_DLLI; mlli_params->curr_pool = NULL; sg_data.num_of_buffers = 0; Loading Loading @@ -541,11 +541,11 @@ int cc_map_blkcipher_request(struct ssi_drvdata *drvdata, void *ctx, goto ablkcipher_exit; } if (mapped_nents > 1) req_ctx->dma_buf_type = SSI_DMA_BUF_MLLI; req_ctx->dma_buf_type = CC_DMA_BUF_MLLI; if (src == dst) { /* Handle inplace operation */ if (req_ctx->dma_buf_type == SSI_DMA_BUF_MLLI) { if (req_ctx->dma_buf_type == CC_DMA_BUF_MLLI) { req_ctx->out_nents = 0; cc_add_sg_entry(dev, &sg_data, req_ctx->in_nents, src, nbytes, 0, true, Loading @@ -560,9 +560,9 @@ int cc_map_blkcipher_request(struct ssi_drvdata *drvdata, void *ctx, goto ablkcipher_exit; } if (mapped_nents > 1) req_ctx->dma_buf_type = SSI_DMA_BUF_MLLI; req_ctx->dma_buf_type = CC_DMA_BUF_MLLI; if (req_ctx->dma_buf_type == SSI_DMA_BUF_MLLI) { if (req_ctx->dma_buf_type == CC_DMA_BUF_MLLI) { cc_add_sg_entry(dev, &sg_data, req_ctx->in_nents, src, nbytes, 0, true, &req_ctx->in_mlli_nents); Loading @@ -572,7 +572,7 @@ int cc_map_blkcipher_request(struct ssi_drvdata *drvdata, void *ctx, } } if (req_ctx->dma_buf_type == SSI_DMA_BUF_MLLI) { if (req_ctx->dma_buf_type == CC_DMA_BUF_MLLI) { mlli_params->curr_pool = buff_mgr->mlli_buffs_pool; rc = cc_generate_mlli(dev, &sg_data, mlli_params); if (rc) Loading Loading @@ -679,7 +679,7 @@ void cc_unmap_aead_request(struct device *dev, struct aead_request *req) * data memory overriding that caused by cache coherence * problem. */ cc_copy_mac(dev, req, SSI_SG_FROM_BUF); cc_copy_mac(dev, req, CC_SG_FROM_BUF); } } Loading Loading @@ -771,7 +771,7 @@ static int cc_aead_chain_iv(struct ssi_drvdata *drvdata, (areq_ctx->gen_ctx.iv_dma_addr + iv_ofs), iv_size_to_authenc, is_last, &areq_ctx->assoc.mlli_nents); areq_ctx->assoc_buff_type = SSI_DMA_BUF_MLLI; areq_ctx->assoc_buff_type = CC_DMA_BUF_MLLI; } chain_iv_exit: Loading Loading @@ -801,7 +801,7 @@ static int cc_aead_chain_assoc(struct ssi_drvdata *drvdata, } if (req->assoclen == 0) { areq_ctx->assoc_buff_type = SSI_DMA_BUF_NULL; areq_ctx->assoc_buff_type = CC_DMA_BUF_NULL; areq_ctx->assoc.nents = 0; areq_ctx->assoc.mlli_nents = 0; dev_dbg(dev, "Chain assoc of length 0: buff_type=%s nents=%u\n", Loading Loading @@ -851,18 +851,18 @@ static int cc_aead_chain_assoc(struct ssi_drvdata *drvdata, } if (mapped_nents == 1 && areq_ctx->ccm_hdr_size == ccm_header_size_null) areq_ctx->assoc_buff_type = SSI_DMA_BUF_DLLI; areq_ctx->assoc_buff_type = CC_DMA_BUF_DLLI; else areq_ctx->assoc_buff_type = SSI_DMA_BUF_MLLI; areq_ctx->assoc_buff_type = CC_DMA_BUF_MLLI; if (do_chain || areq_ctx->assoc_buff_type == SSI_DMA_BUF_MLLI) { if (do_chain || areq_ctx->assoc_buff_type == CC_DMA_BUF_MLLI) { dev_dbg(dev, "Chain assoc: buff_type=%s nents=%u\n", cc_dma_buf_type(areq_ctx->assoc_buff_type), areq_ctx->assoc.nents); cc_add_sg_entry(dev, sg_data, areq_ctx->assoc.nents, req->src, req->assoclen, 0, is_last, &areq_ctx->assoc.mlli_nents); areq_ctx->assoc_buff_type = SSI_DMA_BUF_MLLI; areq_ctx->assoc_buff_type = CC_DMA_BUF_MLLI; } chain_assoc_exit: Loading Loading @@ -939,7 +939,7 @@ static int cc_prepare_aead_data_mlli(struct ssi_drvdata *drvdata, * we must neglect this code. */ if (!drvdata->coherent) cc_copy_mac(dev, req, SSI_SG_TO_BUF); cc_copy_mac(dev, req, CC_SG_TO_BUF); areq_ctx->icv_virt_addr = areq_ctx->backup_mac; } else { Loading Loading @@ -981,7 +981,7 @@ static int cc_prepare_aead_data_mlli(struct ssi_drvdata *drvdata, * MAC verification upon request completion */ if (areq_ctx->is_icv_fragmented) { cc_copy_mac(dev, req, SSI_SG_TO_BUF); cc_copy_mac(dev, req, CC_SG_TO_BUF); areq_ctx->icv_virt_addr = areq_ctx->backup_mac; } else { /* Contig. ICV */ Loading Loading @@ -1136,12 +1136,12 @@ static int cc_aead_chain_data(struct ssi_drvdata *drvdata, if (src_mapped_nents > 1 || dst_mapped_nents > 1 || do_chain) { areq_ctx->data_buff_type = SSI_DMA_BUF_MLLI; areq_ctx->data_buff_type = CC_DMA_BUF_MLLI; rc = cc_prepare_aead_data_mlli(drvdata, req, sg_data, &src_last_bytes, &dst_last_bytes, is_last_table); } else { areq_ctx->data_buff_type = SSI_DMA_BUF_DLLI; areq_ctx->data_buff_type = CC_DMA_BUF_DLLI; cc_prepare_aead_data_dlli(req, &src_last_bytes, &dst_last_bytes); } Loading @@ -1156,13 +1156,13 @@ static void cc_update_aead_mlli_nents(struct ssi_drvdata *drvdata, struct aead_req_ctx *areq_ctx = aead_request_ctx(req); u32 curr_mlli_size = 0; if (areq_ctx->assoc_buff_type == SSI_DMA_BUF_MLLI) { if (areq_ctx->assoc_buff_type == CC_DMA_BUF_MLLI) { areq_ctx->assoc.sram_addr = drvdata->mlli_sram_addr; curr_mlli_size = areq_ctx->assoc.mlli_nents * LLI_ENTRY_BYTE_SIZE; } if (areq_ctx->data_buff_type == SSI_DMA_BUF_MLLI) { if (areq_ctx->data_buff_type == CC_DMA_BUF_MLLI) { /*Inplace case dst nents equal to src nents*/ if (req->src == req->dst) { areq_ctx->dst.mlli_nents = areq_ctx->src.mlli_nents; Loading Loading @@ -1226,7 +1226,7 @@ int cc_map_aead_request(struct ssi_drvdata *drvdata, struct aead_request *req) if (drvdata->coherent && areq_ctx->gen_ctx.op_type == DRV_CRYPTO_DIRECTION_DECRYPT && req->src == req->dst) cc_copy_mac(dev, req, SSI_SG_TO_BUF); cc_copy_mac(dev, req, CC_SG_TO_BUF); /* cacluate the size for cipher remove ICV in decrypt*/ areq_ctx->cryptlen = (areq_ctx->gen_ctx.op_type == Loading Loading @@ -1380,8 +1380,8 @@ int cc_map_aead_request(struct ssi_drvdata *drvdata, struct aead_request *req) /* Mlli support -start building the MLLI according to the above * results */ if (areq_ctx->assoc_buff_type == SSI_DMA_BUF_MLLI || areq_ctx->data_buff_type == SSI_DMA_BUF_MLLI) { if (areq_ctx->assoc_buff_type == CC_DMA_BUF_MLLI || areq_ctx->data_buff_type == CC_DMA_BUF_MLLI) { mlli_params->curr_pool = buff_mgr->mlli_buffs_pool; rc = cc_generate_mlli(dev, &sg_data, mlli_params); if (rc) Loading Loading @@ -1419,7 +1419,7 @@ int cc_map_hash_request_final(struct ssi_drvdata *drvdata, void *ctx, dev_dbg(dev, "final params : curr_buff=%pK curr_buff_cnt=0x%X nbytes = 0x%X src=%pK curr_index=%u\n", curr_buff, *curr_buff_cnt, nbytes, src, areq_ctx->buff_index); /* Init the type of the dma buffer */ areq_ctx->data_dma_buf_type = SSI_DMA_BUF_NULL; areq_ctx->data_dma_buf_type = CC_DMA_BUF_NULL; mlli_params->curr_pool = NULL; sg_data.num_of_buffers = 0; areq_ctx->in_nents = 0; Loading @@ -1445,19 +1445,19 @@ int cc_map_hash_request_final(struct ssi_drvdata *drvdata, void *ctx, goto unmap_curr_buff; } if (src && mapped_nents == 1 && areq_ctx->data_dma_buf_type == SSI_DMA_BUF_NULL) { areq_ctx->data_dma_buf_type == CC_DMA_BUF_NULL) { memcpy(areq_ctx->buff_sg, src, sizeof(struct scatterlist)); areq_ctx->buff_sg->length = nbytes; areq_ctx->curr_sg = areq_ctx->buff_sg; areq_ctx->data_dma_buf_type = SSI_DMA_BUF_DLLI; areq_ctx->data_dma_buf_type = CC_DMA_BUF_DLLI; } else { areq_ctx->data_dma_buf_type = SSI_DMA_BUF_MLLI; areq_ctx->data_dma_buf_type = CC_DMA_BUF_MLLI; } } /*build mlli */ if (areq_ctx->data_dma_buf_type == SSI_DMA_BUF_MLLI) { if (areq_ctx->data_dma_buf_type == CC_DMA_BUF_MLLI) { mlli_params->curr_pool = buff_mgr->mlli_buffs_pool; /* add the src data to the sg_data */ cc_add_sg_entry(dev, &sg_data, areq_ctx->in_nents, src, nbytes, Loading Loading @@ -1507,7 +1507,7 @@ int cc_map_hash_request_update(struct ssi_drvdata *drvdata, void *ctx, dev_dbg(dev, " update params : curr_buff=%pK curr_buff_cnt=0x%X nbytes=0x%X src=%pK curr_index=%u\n", curr_buff, *curr_buff_cnt, nbytes, src, areq_ctx->buff_index); /* Init the type of the dma buffer */ areq_ctx->data_dma_buf_type = SSI_DMA_BUF_NULL; areq_ctx->data_dma_buf_type = CC_DMA_BUF_NULL; mlli_params->curr_pool = NULL; areq_ctx->curr_sg = NULL; sg_data.num_of_buffers = 0; Loading Loading @@ -1539,7 +1539,7 @@ int cc_map_hash_request_update(struct ssi_drvdata *drvdata, void *ctx, *next_buff_cnt); cc_copy_sg_portion(dev, next_buff, src, (update_data_len - *curr_buff_cnt), nbytes, SSI_SG_TO_BUF); nbytes, CC_SG_TO_BUF); /* change the buffer index for next operation */ swap_index = 1; } Loading @@ -1561,19 +1561,19 @@ int cc_map_hash_request_update(struct ssi_drvdata *drvdata, void *ctx, goto unmap_curr_buff; } if (mapped_nents == 1 && areq_ctx->data_dma_buf_type == SSI_DMA_BUF_NULL) { areq_ctx->data_dma_buf_type == CC_DMA_BUF_NULL) { /* only one entry in the SG and no previous data */ memcpy(areq_ctx->buff_sg, src, sizeof(struct scatterlist)); areq_ctx->buff_sg->length = update_data_len; areq_ctx->data_dma_buf_type = SSI_DMA_BUF_DLLI; areq_ctx->data_dma_buf_type = CC_DMA_BUF_DLLI; areq_ctx->curr_sg = areq_ctx->buff_sg; } else { areq_ctx->data_dma_buf_type = SSI_DMA_BUF_MLLI; areq_ctx->data_dma_buf_type = CC_DMA_BUF_MLLI; } } if (areq_ctx->data_dma_buf_type == SSI_DMA_BUF_MLLI) { if (areq_ctx->data_dma_buf_type == CC_DMA_BUF_MLLI) { mlli_params->curr_pool = buff_mgr->mlli_buffs_pool; /* add the src data to the sg_data */ cc_add_sg_entry(dev, &sg_data, areq_ctx->in_nents, src, Loading
drivers/staging/ccree/ssi_buffer_mgr.h +7 −7 Original line number Diff line number Diff line Loading @@ -18,8 +18,8 @@ * Buffer Manager */ #ifndef __SSI_BUFFER_MGR_H__ #define __SSI_BUFFER_MGR_H__ #ifndef __CC_BUFFER_MGR_H__ #define __CC_BUFFER_MGR_H__ #include <crypto/algapi.h> Loading @@ -27,14 +27,14 @@ #include "ssi_driver.h" enum ssi_req_dma_buf_type { SSI_DMA_BUF_NULL = 0, SSI_DMA_BUF_DLLI, SSI_DMA_BUF_MLLI CC_DMA_BUF_NULL = 0, CC_DMA_BUF_DLLI, CC_DMA_BUF_MLLI }; enum ssi_sg_cpy_direct { SSI_SG_TO_BUF = 0, SSI_SG_FROM_BUF = 1 CC_SG_TO_BUF = 0, CC_SG_FROM_BUF = 1 }; struct ssi_mlli { Loading
drivers/staging/ccree/ssi_cipher.c +2 −2 Original line number Diff line number Diff line Loading @@ -541,7 +541,7 @@ static void cc_setup_cipher_data(struct crypto_tfm *tfm, return; } /* Process */ if (req_ctx->dma_buf_type == SSI_DMA_BUF_DLLI) { if (req_ctx->dma_buf_type == CC_DMA_BUF_DLLI) { dev_dbg(dev, " data params addr %pad length 0x%X\n", &sg_dma_address(src), nbytes); dev_dbg(dev, " data params addr %pad length 0x%X\n", Loading Loading @@ -1091,7 +1091,7 @@ struct ssi_crypto_alg *cc_cipher_create_alg(struct ssi_alg_template *template, snprintf(alg->cra_driver_name, CRYPTO_MAX_ALG_NAME, "%s", template->driver_name); alg->cra_module = THIS_MODULE; alg->cra_priority = SSI_CRA_PRIO; alg->cra_priority = CC_CRA_PRIO; alg->cra_blocksize = template->blocksize; alg->cra_alignmask = 0; alg->cra_ctxsize = sizeof(struct cc_cipher_ctx); Loading