Commit d2daa2f7 authored by Shawn Guo's avatar Shawn Guo
Browse files

ARM: dts: imx: add initial imx6sx-sdb board support 



Add initial imx6sx-sdb board support with limited devices enabled.

Signed-off-by: default avatarAnson Huang <b20788@freescale.com>
Signed-off-by: default avatarShawn Guo <shawn.guo@freescale.com>
parent b1d17f68

arch/arm/boot/dts/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -216,6 +216,7 @@ dtb-$(CONFIG_ARCH_MXC) += \ 
	imx6q-udoo.dtb \

	imx6q-wandboard.dtb \

	imx6sl-evk.dtb \

	imx6sx-sdb.dtb \

	vf610-colibri.dtb \

	vf610-cosmic.dtb \

	vf610-twr.dtb

arch/arm/boot/dts/imx6sx-sdb.dts

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+210 −0
Original line number Diff line number Diff line 
/*

 * Copyright (C) 2014 Freescale Semiconductor, Inc.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 as

 * published by the Free Software Foundation.

 */



/dts-v1/;



#include "imx6sx.dtsi"



/ {

	model = "Freescale i.MX6 SoloX SDB Board";

	compatible = "fsl,imx6sx-sdb", "fsl,imx6sx";



	chosen {

		stdout-path = &uart1;

	};



	memory {

		reg = <0x80000000 0x40000000>;

	};



	regulators {

		compatible = "simple-bus";

		#address-cells = <1>;

		#size-cells = <0>;



		vcc_sd3: regulator@0 {

			compatible = "regulator-fixed";

			reg = <0>;

			pinctrl-names = "default";

			pinctrl-0 = <&pinctrl_vcc_sd3>;

			regulator-name = "VCC_SD3";

			regulator-min-microvolt = <3000000>;

			regulator-max-microvolt = <3000000>;

			gpio = <&gpio2 11 GPIO_ACTIVE_HIGH>;

			enable-active-high;

		};

	};

};



&fec1 {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_enet1>;

	phy-mode = "rgmii";

	status = "okay";

};



&uart1 {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_uart1>;

	status = "okay";

};



&uart5 { /* for bluetooth */

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_uart5>;

	fsl,uart-has-rtscts;

	status = "okay";

};



&usdhc2 {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_usdhc2>;

	non-removable;

	no-1-8-v;

	keep-power-in-suspend;

	enable-sdio-wakeup;

	status = "okay";

};



&usdhc3 {

	pinctrl-names = "default", "state_100mhz", "state_200mhz";

	pinctrl-0 = <&pinctrl_usdhc3>;

	pinctrl-1 = <&pinctrl_usdhc3_100mhz>;

	pinctrl-2 = <&pinctrl_usdhc3_200mhz>;

	bus-width = <8>;

	cd-gpios = <&gpio2 10 GPIO_ACTIVE_HIGH>;

	wp-gpios = <&gpio2 15 GPIO_ACTIVE_HIGH>;

	keep-power-in-suspend;

	enable-sdio-wakeup;

	vmmc-supply = <&vcc_sd3>;

	status = "okay";

};



&usdhc4 {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_usdhc4>;

	cd-gpios = <&gpio6 21 GPIO_ACTIVE_HIGH>;

	wp-gpios = <&gpio6 20 GPIO_ACTIVE_HIGH>;

	status = "okay";

};



&iomuxc {

	imx6x-sdb {

		pinctrl_enet1: enet1grp {

			fsl,pins = <

				MX6SX_PAD_ENET1_MDIO__ENET1_MDIO	0xa0b1

				MX6SX_PAD_ENET1_MDC__ENET1_MDC		0xa0b1

				MX6SX_PAD_RGMII1_TXC__ENET1_RGMII_TXC	0xa0b1

				MX6SX_PAD_RGMII1_TD0__ENET1_TX_DATA_0	0xa0b1

				MX6SX_PAD_RGMII1_TD1__ENET1_TX_DATA_1	0xa0b1

				MX6SX_PAD_RGMII1_TD2__ENET1_TX_DATA_2	0xa0b1

				MX6SX_PAD_RGMII1_TD3__ENET1_TX_DATA_3	0xa0b1

				MX6SX_PAD_RGMII1_TX_CTL__ENET1_TX_EN	0xa0b1

				MX6SX_PAD_RGMII1_RXC__ENET1_RX_CLK	0x3081

				MX6SX_PAD_RGMII1_RD0__ENET1_RX_DATA_0	0x3081

				MX6SX_PAD_RGMII1_RD1__ENET1_RX_DATA_1	0x3081

				MX6SX_PAD_RGMII1_RD2__ENET1_RX_DATA_2	0x3081

				MX6SX_PAD_RGMII1_RD3__ENET1_RX_DATA_3	0x3081

				MX6SX_PAD_RGMII1_RX_CTL__ENET1_RX_EN	0x3081

			>;

		};



		pinctrl_vcc_sd3: vccsd3grp {

			fsl,pins = <

				MX6SX_PAD_KEY_COL1__GPIO2_IO_11		0x17059

			>;

		};



		pinctrl_uart1: uart1grp {

			fsl,pins = <

				MX6SX_PAD_GPIO1_IO04__UART1_TX		0x1b0b1

				MX6SX_PAD_GPIO1_IO05__UART1_RX		0x1b0b1

			>;

		};



		pinctrl_uart5: uart5grp {

			fsl,pins = <

				MX6SX_PAD_KEY_ROW3__UART5_RX		0x1b0b1

				MX6SX_PAD_KEY_COL3__UART5_TX		0x1b0b1

				MX6SX_PAD_KEY_ROW2__UART5_CTS_B		0x1b0b1

				MX6SX_PAD_KEY_COL2__UART5_RTS_B		0x1b0b1

			>;

		};



		pinctrl_usdhc2: usdhc2grp {

			fsl,pins = <

				MX6SX_PAD_SD2_CMD__USDHC2_CMD		0x17059

				MX6SX_PAD_SD2_CLK__USDHC2_CLK		0x10059

				MX6SX_PAD_SD2_DATA0__USDHC2_DATA0	0x17059

				MX6SX_PAD_SD2_DATA1__USDHC2_DATA1	0x17059

				MX6SX_PAD_SD2_DATA2__USDHC2_DATA2	0x17059

				MX6SX_PAD_SD2_DATA3__USDHC2_DATA3	0x17059

			>;

		};



		pinctrl_usdhc3: usdhc3grp {

			fsl,pins = <

				MX6SX_PAD_SD3_CMD__USDHC3_CMD		0x17059

				MX6SX_PAD_SD3_CLK__USDHC3_CLK		0x10059

				MX6SX_PAD_SD3_DATA0__USDHC3_DATA0	0x17059

				MX6SX_PAD_SD3_DATA1__USDHC3_DATA1	0x17059

				MX6SX_PAD_SD3_DATA2__USDHC3_DATA2	0x17059

				MX6SX_PAD_SD3_DATA3__USDHC3_DATA3	0x17059

				MX6SX_PAD_SD3_DATA4__USDHC3_DATA4	0x17059

				MX6SX_PAD_SD3_DATA5__USDHC3_DATA5	0x17059

				MX6SX_PAD_SD3_DATA6__USDHC3_DATA6	0x17059

				MX6SX_PAD_SD3_DATA7__USDHC3_DATA7	0x17059

				MX6SX_PAD_KEY_COL0__GPIO2_IO_10		0x17059 /* CD */

				MX6SX_PAD_KEY_ROW0__GPIO2_IO_15		0x17059 /* WP */

			>;

		};



		pinctrl_usdhc3_100mhz: usdhc3grp-100mhz {

			fsl,pins = <

				MX6SX_PAD_SD3_CMD__USDHC3_CMD		0x170b9

				MX6SX_PAD_SD3_CLK__USDHC3_CLK		0x100b9

				MX6SX_PAD_SD3_DATA0__USDHC3_DATA0	0x170b9

				MX6SX_PAD_SD3_DATA1__USDHC3_DATA1	0x170b9

				MX6SX_PAD_SD3_DATA2__USDHC3_DATA2	0x170b9

				MX6SX_PAD_SD3_DATA3__USDHC3_DATA3	0x170b9

				MX6SX_PAD_SD3_DATA4__USDHC3_DATA4	0x170b9

				MX6SX_PAD_SD3_DATA5__USDHC3_DATA5	0x170b9

				MX6SX_PAD_SD3_DATA6__USDHC3_DATA6	0x170b9

				MX6SX_PAD_SD3_DATA7__USDHC3_DATA7	0x170b9

			>;

		};



		pinctrl_usdhc3_200mhz: usdhc3grp-200mhz {

			fsl,pins = <

				MX6SX_PAD_SD3_CMD__USDHC3_CMD		0x170f9

				MX6SX_PAD_SD3_CLK__USDHC3_CLK		0x100f9

				MX6SX_PAD_SD3_DATA0__USDHC3_DATA0	0x170f9

				MX6SX_PAD_SD3_DATA1__USDHC3_DATA1	0x170f9

				MX6SX_PAD_SD3_DATA2__USDHC3_DATA2	0x170f9

				MX6SX_PAD_SD3_DATA3__USDHC3_DATA3	0x170f9

				MX6SX_PAD_SD3_DATA4__USDHC3_DATA4	0x170f9

				MX6SX_PAD_SD3_DATA5__USDHC3_DATA5	0x170f9

				MX6SX_PAD_SD3_DATA6__USDHC3_DATA6	0x170f9

				MX6SX_PAD_SD3_DATA7__USDHC3_DATA7	0x170f9

			>;

		};



		pinctrl_usdhc4: usdhc4grp {

			fsl,pins = <

				MX6SX_PAD_SD4_CMD__USDHC4_CMD		0x17059

				MX6SX_PAD_SD4_CLK__USDHC4_CLK		0x10059

				MX6SX_PAD_SD4_DATA0__USDHC4_DATA0	0x17059

				MX6SX_PAD_SD4_DATA1__USDHC4_DATA1	0x17059

				MX6SX_PAD_SD4_DATA2__USDHC4_DATA2	0x17059

				MX6SX_PAD_SD4_DATA3__USDHC4_DATA3	0x17059

				MX6SX_PAD_SD4_DATA7__GPIO6_IO_21	0x17059 /* CD */

				MX6SX_PAD_SD4_DATA6__GPIO6_IO_20	0x17059 /* WP */

			>;

		};

	};

};