Commit d11dfbec authored by Alvin Lee's avatar Alvin Lee Committed by Alex Deucher
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drm/amd/display: Only consider DISPCLK when using optimized boot path 



[Description]
- Previous bug fix for audio issue included dtbclk and p-state
  on the optimized boot path which is incorarect
- We only care about DISPCLK in the optimized vs. non-optimized
  boot path to avoid audio issues

Reviewed-by: default avatarSaaem Rizvi <syedsaaem.rizvi@amd.com>
Acked-by: default avatarQingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: default avatarAlvin Lee <Alvin.Lee2@amd.com>
Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 3cfd03b7

drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c

+3 −3
Original line number Diff line number Diff line
@@ -721,6 +721,9 @@ static void dcn32_initialize_min_clocks(struct dc *dc) 
	clocks->socclk_khz = dc->clk_mgr->bw_params->clk_table.entries[0].socclk_mhz * 1000;

	clocks->dramclk_khz = dc->clk_mgr->bw_params->clk_table.entries[0].memclk_mhz * 1000;

	clocks->dppclk_khz = dc->clk_mgr->bw_params->clk_table.entries[0].dppclk_mhz * 1000;

	clocks->ref_dtbclk_khz = dc->clk_mgr->bw_params->clk_table.entries[0].dtbclk_mhz * 1000;

	clocks->fclk_p_state_change_support = true;

	clocks->p_state_change_support = true;

	if (dc->debug.disable_boot_optimizations) {

		clocks->dispclk_khz = dc->clk_mgr->bw_params->clk_table.entries[0].dispclk_mhz * 1000;

	} else {
@@ -730,9 +733,6 @@ static void dcn32_initialize_min_clocks(struct dc *dc) 
		 * freq to ensure that the timing is valid and unchanged.

		 */

		clocks->dispclk_khz = dc->clk_mgr->funcs->get_dispclk_from_dentist(dc->clk_mgr);

		clocks->ref_dtbclk_khz = dc->clk_mgr->bw_params->clk_table.entries[0].dtbclk_mhz * 1000;

		clocks->fclk_p_state_change_support = true;

		clocks->p_state_change_support = true;

	}



	dc->clk_mgr->funcs->update_clocks(