Loading include/asm-x86/apic_32.h +23 −26 Original line number Diff line number Diff line Loading @@ -17,8 +17,6 @@ #define APIC_VERBOSE 1 #define APIC_DEBUG 2 extern int apic_verbosity; /* * Define the default level of output to be very little * This can be turned up by using apic=verbose for more Loading @@ -35,6 +33,11 @@ extern void generic_apic_probe(void); #ifdef CONFIG_X86_LOCAL_APIC extern int apic_verbosity; extern int timer_over_8254; extern int local_apic_timer_c2_ok; extern int local_apic_timer_disabled; /* * Basic functions accessing APICs. */ Loading Loading @@ -65,9 +68,9 @@ static __inline fastcall unsigned long native_apic_read(unsigned long reg) return *((volatile unsigned long *)(APIC_BASE+reg)); } void apic_wait_icr_idle(void); unsigned long safe_apic_wait_icr_idle(void); int get_physical_broadcast(void); extern void apic_wait_icr_idle(void); extern unsigned long safe_apic_wait_icr_idle(void); extern int get_physical_broadcast(void); #ifdef CONFIG_X86_GOOD_APIC # define FORCE_READ_AROUND_WRITE 0 Loading Loading @@ -108,16 +111,10 @@ extern void smp_local_timer_interrupt (void); extern void setup_boot_APIC_clock(void); extern void setup_secondary_APIC_clock(void); extern int APIC_init_uniprocessor(void); extern void enable_NMI_through_LVT0(void *dummy); #define ARCH_APICTIMER_STOPS_ON_C3 1 extern int timer_over_8254; extern int local_apic_timer_c2_ok; extern int local_apic_timer_disabled; #else /* !CONFIG_X86_LOCAL_APIC */ static inline void lapic_shutdown(void) { } #define local_apic_timer_c2_ok 1 Loading include/asm-x86/apic_64.h +16 −23 Original line number Diff line number Diff line Loading @@ -87,13 +87,6 @@ extern void setup_APIC_extended_lvt(unsigned char lvt_off, unsigned char vector, extern int apic_is_clustered_box(void); #define K8_APIC_EXT_LVT_BASE 0x500 #define K8_APIC_EXT_INT_MSG_FIX 0x0 #define K8_APIC_EXT_INT_MSG_SMI 0x2 #define K8_APIC_EXT_INT_MSG_NMI 0x4 #define K8_APIC_EXT_INT_MSG_EXT 0x7 #define K8_APIC_EXT_LVT_ENTRY_THRESHOLD 0 #define ARCH_APICTIMER_STOPS_ON_C3 1 extern unsigned boot_cpu_id; Loading include/asm-x86/apicdef.h +9 −1 Original line number Diff line number Diff line Loading @@ -116,6 +116,14 @@ #define APIC_TDR_DIV_32 0x8 #define APIC_TDR_DIV_64 0x9 #define APIC_TDR_DIV_128 0xA #define K8_APIC_EXT_LVT_BASE 0x500 #define K8_APIC_EXT_INT_MSG_FIX 0x0 #define K8_APIC_EXT_INT_MSG_SMI 0x2 #define K8_APIC_EXT_INT_MSG_NMI 0x4 #define K8_APIC_EXT_INT_MSG_EXT 0x7 #define K8_APIC_EXT_LVT_ENTRY_THRESHOLD 0 #define APIC_BASE (fix_to_virt(FIX_APIC_BASE)) #ifdef CONFIG_X86_32 Loading Loading
include/asm-x86/apic_32.h +23 −26 Original line number Diff line number Diff line Loading @@ -17,8 +17,6 @@ #define APIC_VERBOSE 1 #define APIC_DEBUG 2 extern int apic_verbosity; /* * Define the default level of output to be very little * This can be turned up by using apic=verbose for more Loading @@ -35,6 +33,11 @@ extern void generic_apic_probe(void); #ifdef CONFIG_X86_LOCAL_APIC extern int apic_verbosity; extern int timer_over_8254; extern int local_apic_timer_c2_ok; extern int local_apic_timer_disabled; /* * Basic functions accessing APICs. */ Loading Loading @@ -65,9 +68,9 @@ static __inline fastcall unsigned long native_apic_read(unsigned long reg) return *((volatile unsigned long *)(APIC_BASE+reg)); } void apic_wait_icr_idle(void); unsigned long safe_apic_wait_icr_idle(void); int get_physical_broadcast(void); extern void apic_wait_icr_idle(void); extern unsigned long safe_apic_wait_icr_idle(void); extern int get_physical_broadcast(void); #ifdef CONFIG_X86_GOOD_APIC # define FORCE_READ_AROUND_WRITE 0 Loading Loading @@ -108,16 +111,10 @@ extern void smp_local_timer_interrupt (void); extern void setup_boot_APIC_clock(void); extern void setup_secondary_APIC_clock(void); extern int APIC_init_uniprocessor(void); extern void enable_NMI_through_LVT0(void *dummy); #define ARCH_APICTIMER_STOPS_ON_C3 1 extern int timer_over_8254; extern int local_apic_timer_c2_ok; extern int local_apic_timer_disabled; #else /* !CONFIG_X86_LOCAL_APIC */ static inline void lapic_shutdown(void) { } #define local_apic_timer_c2_ok 1 Loading
include/asm-x86/apic_64.h +16 −23 Original line number Diff line number Diff line Loading @@ -87,13 +87,6 @@ extern void setup_APIC_extended_lvt(unsigned char lvt_off, unsigned char vector, extern int apic_is_clustered_box(void); #define K8_APIC_EXT_LVT_BASE 0x500 #define K8_APIC_EXT_INT_MSG_FIX 0x0 #define K8_APIC_EXT_INT_MSG_SMI 0x2 #define K8_APIC_EXT_INT_MSG_NMI 0x4 #define K8_APIC_EXT_INT_MSG_EXT 0x7 #define K8_APIC_EXT_LVT_ENTRY_THRESHOLD 0 #define ARCH_APICTIMER_STOPS_ON_C3 1 extern unsigned boot_cpu_id; Loading
include/asm-x86/apicdef.h +9 −1 Original line number Diff line number Diff line Loading @@ -116,6 +116,14 @@ #define APIC_TDR_DIV_32 0x8 #define APIC_TDR_DIV_64 0x9 #define APIC_TDR_DIV_128 0xA #define K8_APIC_EXT_LVT_BASE 0x500 #define K8_APIC_EXT_INT_MSG_FIX 0x0 #define K8_APIC_EXT_INT_MSG_SMI 0x2 #define K8_APIC_EXT_INT_MSG_NMI 0x4 #define K8_APIC_EXT_INT_MSG_EXT 0x7 #define K8_APIC_EXT_LVT_ENTRY_THRESHOLD 0 #define APIC_BASE (fix_to_virt(FIX_APIC_BASE)) #ifdef CONFIG_X86_32 Loading