Commit ceac3099 authored by Ben Skeggs's avatar Ben Skeggs Committed by Francisco Jerez
Browse files

drm/nouveau: implicitly insert non-DMA objects into RAMHT 



Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent d908175c

drivers/gpu/drm/nouveau/nouveau_dma.c

+2 −8
Original line number Diff line number Diff line
@@ -59,17 +59,11 @@ nouveau_dma_init(struct nouveau_channel *chan) 
{

	struct drm_device *dev = chan->dev;

	struct drm_nouveau_private *dev_priv = dev->dev_private;

	struct nouveau_gpuobj *obj = NULL;

	int ret, i;



	/* Create NV_MEMORY_TO_MEMORY_FORMAT for buffer moves */

	ret = nouveau_gpuobj_gr_new(chan, dev_priv->card_type < NV_50 ?

				    0x0039 : 0x5039, &obj);

	if (ret)

		return ret;



	ret = nouveau_ramht_insert(chan, NvM2MF, obj);

	nouveau_gpuobj_ref(NULL, &obj);

	ret = nouveau_gpuobj_gr_new(chan, NvM2MF, dev_priv->card_type < NV_50 ?

				    0x0039 : 0x5039);

	if (ret)

		return ret;

drivers/gpu/drm/nouveau/nouveau_drv.h

+1 −2
Original line number Diff line number Diff line
@@ -887,8 +887,7 @@ extern int nouveau_gpuobj_new_fake(struct drm_device *, u32 pinst, u64 vinst, 
extern int nouveau_gpuobj_dma_new(struct nouveau_channel *, int class,

				  uint64_t offset, uint64_t size, int access,

				  int target, struct nouveau_gpuobj **);

extern int nouveau_gpuobj_gr_new(struct nouveau_channel *, int class,

				 struct nouveau_gpuobj **);

extern int nouveau_gpuobj_gr_new(struct nouveau_channel *, u32 handle, int class);

extern int nv50_gpuobj_dma_new(struct nouveau_channel *, int class, u64 base,

			       u64 size, int target, int access, u32 type,

			       u32 comp, struct nouveau_gpuobj **pobj);

drivers/gpu/drm/nouveau/nouveau_fence.c

+1 −6
Original line number Diff line number Diff line
@@ -438,12 +438,7 @@ nouveau_fence_channel_init(struct nouveau_channel *chan) 
	int ret;



	/* Create an NV_SW object for various sync purposes */

	ret = nouveau_gpuobj_gr_new(chan, NV_SW, &obj);

	if (ret)

		return ret;



	ret = nouveau_ramht_insert(chan, NvSw, obj);

	nouveau_gpuobj_ref(NULL, &obj);

	ret = nouveau_gpuobj_gr_new(chan, NvSw, NV_SW);

	if (ret)

		return ret;

drivers/gpu/drm/nouveau/nouveau_object.c

+27 −32
Original line number Diff line number Diff line
@@ -608,13 +608,9 @@ static int 
nouveau_gpuobj_sw_new(struct nouveau_channel *chan, int class,

		      struct nouveau_gpuobj **gpuobj_ret)

{

	struct drm_nouveau_private *dev_priv;

	struct drm_nouveau_private *dev_priv = chan->dev->dev_private;

	struct nouveau_gpuobj *gpuobj;



	if (!chan || !gpuobj_ret || *gpuobj_ret != NULL)

		return -EINVAL;

	dev_priv = chan->dev->dev_private;



	gpuobj = kzalloc(sizeof(*gpuobj), GFP_KERNEL);

	if (!gpuobj)

		return -ENOMEM;
@@ -632,12 +628,12 @@ nouveau_gpuobj_sw_new(struct nouveau_channel *chan, int class, 
}



int

nouveau_gpuobj_gr_new(struct nouveau_channel *chan, int class,

		      struct nouveau_gpuobj **gpuobj)

nouveau_gpuobj_gr_new(struct nouveau_channel *chan, u32 handle, int class)

{

	struct drm_nouveau_private *dev_priv = chan->dev->dev_private;

	struct drm_device *dev = chan->dev;

	struct nouveau_gpuobj_class *oc;

	struct nouveau_gpuobj *gpuobj;

	int ret;



	NV_DEBUG(dev, "ch%d class=0x%04x\n", chan->id, class);
@@ -651,10 +647,12 @@ nouveau_gpuobj_gr_new(struct nouveau_channel *chan, int class, 
	return -EINVAL;



found:

	if (oc->engine == NVOBJ_ENGINE_SW)

		return nouveau_gpuobj_sw_new(chan, class, gpuobj);



	switch (oc->engine) {

	case NVOBJ_ENGINE_SW:

		ret = nouveau_gpuobj_sw_new(chan, class, &gpuobj);

		if (ret)

			return ret;

		goto insert;

	case NVOBJ_ENGINE_GR:

		if (dev_priv->card_type >= NV_50 && !chan->ramin_grctx) {

			struct nouveau_pgraph_engine *pgraph =
@@ -681,41 +679,47 @@ nouveau_gpuobj_gr_new(struct nouveau_channel *chan, int class, 
				 nouveau_gpuobj_class_instmem_size(dev, class),

				 16,

				 NVOBJ_FLAG_ZERO_ALLOC | NVOBJ_FLAG_ZERO_FREE,

				 gpuobj);

				 &gpuobj);

	if (ret) {

		NV_ERROR(dev, "error creating gpuobj: %d\n", ret);

		return ret;

	}



	if (dev_priv->card_type >= NV_50) {

		nv_wo32(*gpuobj,  0, class);

		nv_wo32(*gpuobj, 20, 0x00010000);

		nv_wo32(gpuobj,  0, class);

		nv_wo32(gpuobj, 20, 0x00010000);

	} else {

		switch (class) {

		case NV_CLASS_NULL:

			nv_wo32(*gpuobj, 0, 0x00001030);

			nv_wo32(*gpuobj, 4, 0xFFFFFFFF);

			nv_wo32(gpuobj, 0, 0x00001030);

			nv_wo32(gpuobj, 4, 0xFFFFFFFF);

			break;

		default:

			if (dev_priv->card_type >= NV_40) {

				nv_wo32(*gpuobj, 0, class);

				nv_wo32(gpuobj, 0, class);

#ifdef __BIG_ENDIAN

				nv_wo32(*gpuobj, 8, 0x01000000);

				nv_wo32(gpuobj, 8, 0x01000000);

#endif

			} else {

#ifdef __BIG_ENDIAN

				nv_wo32(*gpuobj, 0, class | 0x00080000);

				nv_wo32(gpuobj, 0, class | 0x00080000);

#else

				nv_wo32(*gpuobj, 0, class);

				nv_wo32(gpuobj, 0, class);

#endif

			}

		}

	}

	dev_priv->engine.instmem.flush(dev);



	(*gpuobj)->engine = oc->engine;

	(*gpuobj)->class  = oc->id;

	return 0;

	gpuobj->engine = oc->engine;

	gpuobj->class  = oc->id;



insert:

	ret = nouveau_ramht_insert(chan, handle, gpuobj);

	if (ret)

		NV_ERROR(dev, "error adding gpuobj to RAMHT: %d\n", ret);

	nouveau_gpuobj_ref(NULL, &gpuobj);

	return ret;

}



static int
@@ -971,7 +975,6 @@ int nouveau_ioctl_grobj_alloc(struct drm_device *dev, void *data, 
			      struct drm_file *file_priv)

{

	struct drm_nouveau_grobj_alloc *init = data;

	struct nouveau_gpuobj *gr = NULL;

	struct nouveau_channel *chan;

	int ret;
@@ -987,18 +990,10 @@ int nouveau_ioctl_grobj_alloc(struct drm_device *dev, void *data, 
		goto out;

	}



	ret = nouveau_gpuobj_gr_new(chan, init->class, &gr);

	ret = nouveau_gpuobj_gr_new(chan, init->handle, init->class);

	if (ret) {

		NV_ERROR(dev, "Error creating object: %d (%d/0x%08x)\n",

			 ret, init->channel, init->handle);

		goto out;

	}



	ret = nouveau_ramht_insert(chan, init->handle, gr);

	nouveau_gpuobj_ref(NULL, &gr);

	if (ret) {

		NV_ERROR(dev, "Error referencing object: %d (%d/0x%08x)\n",

			 ret, init->channel, init->handle);

	}



out:

drivers/gpu/drm/nouveau/nv04_fbcon.c

+10 −24
Original line number Diff line number Diff line
@@ -137,22 +137,6 @@ nv04_fbcon_imageblit(struct fb_info *info, const struct fb_image *image) 
	return 0;

}



static int

nv04_fbcon_grobj_new(struct drm_device *dev, int class, uint32_t handle)

{

	struct drm_nouveau_private *dev_priv = dev->dev_private;

	struct nouveau_gpuobj *obj = NULL;

	int ret;



	ret = nouveau_gpuobj_gr_new(dev_priv->channel, class, &obj);

	if (ret)

		return ret;



	ret = nouveau_ramht_insert(dev_priv->channel, handle, obj);

	nouveau_gpuobj_ref(NULL, &obj);

	return ret;

}



int

nv04_fbcon_accel_init(struct fb_info *info)

{
@@ -192,29 +176,31 @@ nv04_fbcon_accel_init(struct fb_info *info) 
		return -EINVAL;

	}



	ret = nv04_fbcon_grobj_new(dev, dev_priv->card_type >= NV_10 ?

				   0x0062 : 0x0042, NvCtxSurf2D);

	ret = nouveau_gpuobj_gr_new(chan, NvCtxSurf2D,

				    dev_priv->card_type >= NV_10 ?

				    0x0062 : 0x0042);

	if (ret)

		return ret;



	ret = nv04_fbcon_grobj_new(dev, 0x0019, NvClipRect);

	ret = nouveau_gpuobj_gr_new(chan, NvClipRect, 0x0019);

	if (ret)

		return ret;



	ret = nv04_fbcon_grobj_new(dev, 0x0043, NvRop);

	ret = nouveau_gpuobj_gr_new(chan, NvRop, 0x0043);

	if (ret)

		return ret;



	ret = nv04_fbcon_grobj_new(dev, 0x0044, NvImagePatt);

	ret = nouveau_gpuobj_gr_new(chan, NvImagePatt, 0x0044);

	if (ret)

		return ret;



	ret = nv04_fbcon_grobj_new(dev, 0x004a, NvGdiRect);

	ret = nouveau_gpuobj_gr_new(chan, NvGdiRect, 0x004a);

	if (ret)

		return ret;



	ret = nv04_fbcon_grobj_new(dev, dev_priv->chipset >= 0x11 ?

				   0x009f : 0x005f, NvImageBlit);

	ret = nouveau_gpuobj_gr_new(chan, NvImageBlit,

				    dev_priv->chipset >= 0x11 ?

				    0x009f : 0x005f);

	if (ret)

		return ret;