Commit cbd06cde authored by Dmitry Baryshkov's avatar Dmitry Baryshkov Committed by Vinod Koul
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phy: qcom-qmp-ufs: split UFS-specific v2 PCS registers to a separate header 



Follow other QMP headers, split and rename UFS-specific PCS registers to
ease comparing regs differences.

Signed-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20221110192248.873973-7-dmitry.baryshkov@linaro.org


Signed-off-by: default avatarVinod Koul <vkoul@kernel.org>
parent 61f21e0e

drivers/phy/qualcomm/phy-qcom-qmp-pcs-ufs-v2.h

0 → 100644
+20 −0
Original line number Diff line number Diff line 
/* SPDX-License-Identifier: GPL-2.0 */

/*

 * Copyright (c) 2017, The Linux Foundation. All rights reserved.

 */



#ifndef QCOM_PHY_QMP_PCS_UFS_V2_H_

#define QCOM_PHY_QMP_PCS_UFS_V2_H_



#define QPHY_V2_PCS_UFS_TX_LARGE_AMP_DRV_LVL		0x034

#define QPHY_V2_PCS_UFS_TX_LARGE_AMP_POST_EMP_LVL	0x038

#define QPHY_V2_PCS_UFS_TX_SMALL_AMP_DRV_LVL		0x03c

#define QPHY_V2_PCS_UFS_TX_SMALL_AMP_POST_EMP_LVL	0x040



#define QPHY_V2_PCS_UFS_RX_MIN_STALL_NOCONFIG_TIME_CAP	0x0cc

#define QPHY_V2_PCS_UFS_RX_SYM_RESYNC_CTRL			0x13c

#define QPHY_V2_PCS_UFS_RX_MIN_HIBERN8_TIME			0x140

#define QPHY_V2_PCS_UFS_RX_SIGDET_CTRL2			0x148

#define QPHY_V2_PCS_UFS_RX_PWM_GEAR_BAND			0x154



#endif

drivers/phy/qualcomm/phy-qcom-qmp-pcs-v2.h

+0 −11
Original line number Diff line number Diff line
@@ -12,10 +12,6 @@ 
#define QPHY_V2_PCS_START_CONTROL			0x008

#define QPHY_V2_PCS_TXDEEMPH_M6DB_V0			0x024

#define QPHY_V2_PCS_TXDEEMPH_M3P5DB_V0			0x028

#define QPHY_V2_PCS_TX_LARGE_AMP_DRV_LVL		0x034

#define QPHY_V2_PCS_TX_LARGE_AMP_POST_EMP_LVL		0x038

#define QPHY_V2_PCS_TX_SMALL_AMP_DRV_LVL		0x03c

#define QPHY_V2_PCS_TX_SMALL_AMP_POST_EMP_LVL		0x040

#define QPHY_V2_PCS_ENDPOINT_REFCLK_DRIVE		0x054

#define QPHY_V2_PCS_RX_IDLE_DTCT_CNTRL			0x058

#define QPHY_V2_PCS_POWER_STATE_CONFIG1			0x060
@@ -32,13 +28,6 @@ 
#define QPHY_V2_PCS_FLL_CNT_VAL_L			0x0c8

#define QPHY_V2_PCS_FLL_CNT_VAL_H_TOL			0x0cc

#define QPHY_V2_PCS_FLL_MAN_CODE			0x0d0



/* UFS only ? */

#define QPHY_V2_PCS_RX_MIN_STALL_NOCONFIG_TIME_CAP	0x0cc

#define QPHY_V2_PCS_RX_SYM_RESYNC_CTRL			0x13c

#define QPHY_V2_PCS_RX_MIN_HIBERN8_TIME			0x140

#define QPHY_V2_PCS_RX_SIGDET_CTRL2			0x148

#define QPHY_V2_PCS_RX_PWM_GEAR_BAND			0x154

#define QPHY_V2_PCS_PLL_LOCK_CHK_DLY_TIME_AUXCLK_LSB	0x1a8

#define QPHY_V2_PCS_OSC_DTCT_ACTIONS			0x1ac

#define QPHY_V2_PCS_RX_SIGDET_LVL			0x1d8

drivers/phy/qualcomm/phy-qcom-qmp-ufs.c

+9 −9
Original line number Diff line number Diff line
@@ -242,15 +242,15 @@ static const struct qmp_phy_init_tbl sm6115_ufsphy_rx_tbl[] = { 
};



static const struct qmp_phy_init_tbl sm6115_ufsphy_pcs_tbl[] = {

	QMP_PHY_INIT_CFG(QPHY_V2_PCS_RX_PWM_GEAR_BAND, 0x15),

	QMP_PHY_INIT_CFG(QPHY_V2_PCS_RX_SIGDET_CTRL2, 0x6d),

	QMP_PHY_INIT_CFG(QPHY_V2_PCS_TX_LARGE_AMP_DRV_LVL, 0x0f),

	QMP_PHY_INIT_CFG(QPHY_V2_PCS_TX_SMALL_AMP_DRV_LVL, 0x02),

	QMP_PHY_INIT_CFG(QPHY_V2_PCS_RX_MIN_STALL_NOCONFIG_TIME_CAP, 0x28),

	QMP_PHY_INIT_CFG(QPHY_V2_PCS_RX_SYM_RESYNC_CTRL, 0x03),

	QMP_PHY_INIT_CFG(QPHY_V2_PCS_TX_LARGE_AMP_POST_EMP_LVL, 0x12),

	QMP_PHY_INIT_CFG(QPHY_V2_PCS_TX_SMALL_AMP_POST_EMP_LVL, 0x0f),

	QMP_PHY_INIT_CFG(QPHY_V2_PCS_RX_MIN_HIBERN8_TIME, 0x9a), /* 8 us */

	QMP_PHY_INIT_CFG(QPHY_V2_PCS_UFS_RX_PWM_GEAR_BAND, 0x15),

	QMP_PHY_INIT_CFG(QPHY_V2_PCS_UFS_RX_SIGDET_CTRL2, 0x6d),

	QMP_PHY_INIT_CFG(QPHY_V2_PCS_UFS_TX_LARGE_AMP_DRV_LVL, 0x0f),

	QMP_PHY_INIT_CFG(QPHY_V2_PCS_UFS_TX_SMALL_AMP_DRV_LVL, 0x02),

	QMP_PHY_INIT_CFG(QPHY_V2_PCS_UFS_RX_MIN_STALL_NOCONFIG_TIME_CAP, 0x28),

	QMP_PHY_INIT_CFG(QPHY_V2_PCS_UFS_RX_SYM_RESYNC_CTRL, 0x03),

	QMP_PHY_INIT_CFG(QPHY_V2_PCS_UFS_TX_LARGE_AMP_POST_EMP_LVL, 0x12),

	QMP_PHY_INIT_CFG(QPHY_V2_PCS_UFS_TX_SMALL_AMP_POST_EMP_LVL, 0x0f),

	QMP_PHY_INIT_CFG(QPHY_V2_PCS_UFS_RX_MIN_HIBERN8_TIME, 0x9a), /* 8 us */

};



static const struct qmp_phy_init_tbl sdm845_ufsphy_serdes_tbl[] = {

drivers/phy/qualcomm/phy-qcom-qmp.h

+1 −0
Original line number Diff line number Diff line
@@ -24,6 +24,7 @@ 
#include "phy-qcom-qmp-qserdes-pll.h"



#include "phy-qcom-qmp-pcs-v2.h"

#include "phy-qcom-qmp-pcs-ufs-v2.h"



#include "phy-qcom-qmp-pcs-v3.h"

#include "phy-qcom-qmp-pcs-misc-v3.h"