Unverified Commit c4af5169 authored by Paul Kocialkowski's avatar Paul Kocialkowski Committed by Maxime Ripard
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ARM: dts: sun8i: v3s: Move the csi1 block to follow address order 



The csi1 block node was mistakenly added before the gic node, although
its address comes after the gic's. Move the node to its correct
position.

Fixes: 90e04810 ("ARM: dts: sun8i: V3/V3s/S3/S3L: add CSI1 device node")
Signed-off-by: default avatarPaul Kocialkowski <paul.kocialkowski@bootlin.com>
Signed-off-by: default avatarMaxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20220205185429.2278860-2-paul.kocialkowski@bootlin.com
parent e4bae63f

arch/arm/boot/dts/sun8i-v3s.dtsi

+11 −11
Original line number Diff line number Diff line
@@ -593,6 +593,17 @@ spi0: spi@1c68000 { 
			#size-cells = <0>;

		};



		gic: interrupt-controller@1c81000 {

			compatible = "arm,gic-400";

			reg = <0x01c81000 0x1000>,

			      <0x01c82000 0x2000>,

			      <0x01c84000 0x2000>,

			      <0x01c86000 0x2000>;

			interrupt-controller;

			#interrupt-cells = <3>;

			interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;

		};



		csi1: camera@1cb4000 {

			compatible = "allwinner,sun8i-v3s-csi";

			reg = <0x01cb4000 0x3000>;
@@ -604,16 +615,5 @@ csi1: camera@1cb4000 { 
			resets = <&ccu RST_BUS_CSI>;

			status = "disabled";

		};



		gic: interrupt-controller@1c81000 {

			compatible = "arm,gic-400";

			reg = <0x01c81000 0x1000>,

			      <0x01c82000 0x2000>,

			      <0x01c84000 0x2000>,

			      <0x01c86000 0x2000>;

			interrupt-controller;

			#interrupt-cells = <3>;

			interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;

		};

	};

};