Commit c349ae38 authored by Heiko Stuebner's avatar Heiko Stuebner
Browse files

arm64: dts: rockchip: add isp1 node on rk3399



ISP1 is supplied by the tx1rx1 dphy, that is controlled from
inside the dsi1 controller, so include the necessary phy-link
for it.

Signed-off-by: default avatarHeiko Stuebner <heiko.stuebner@theobroma-systems.com>
Tested-by: default avatarSebastian Fricke <sebastian.fricke@posteo.net>
Acked-by: default avatarHelen Koike <helen.koike@collabora.com>
Link: https://lore.kernel.org/r/20210210111020.2476369-7-heiko@sntech.de


Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
parent f1400702
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+26 −0
Original line number Diff line number Diff line
@@ -1762,6 +1762,32 @@ isp0_mmu: iommu@ff914000 {
		rockchip,disable-mmu-reset;
	};

	isp1: isp1@ff920000 {
		compatible = "rockchip,rk3399-cif-isp";
		reg = <0x0 0xff920000 0x0 0x4000>;
		interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH 0>;
		clocks = <&cru SCLK_ISP1>,
			 <&cru ACLK_ISP1_WRAPPER>,
			 <&cru HCLK_ISP1_WRAPPER>;
		clock-names = "isp", "aclk", "hclk";
		iommus = <&isp1_mmu>;
		phys = <&mipi_dsi1>;
		phy-names = "dphy";
		power-domains = <&power RK3399_PD_ISP1>;
		status = "disabled";

		ports {
			#address-cells = <1>;
			#size-cells = <0>;

			port@0 {
				reg = <0>;
				#address-cells = <1>;
				#size-cells = <0>;
			};
		};
	};

	isp1_mmu: iommu@ff924000 {
		compatible = "rockchip,iommu";
		reg = <0x0 0xff924000 0x0 0x100>, <0x0 0xff925000 0x0 0x100>;