Commit c1c7178c authored by Bart Van Assche's avatar Bart Van Assche Committed by Martin K. Petersen
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scsi: qla2xxx: Improve Linux kernel coding style conformance



Insert a space where required, surround complex expressions in macros with
parentheses, use the UL suffix instead of the (unsigned long) cast, do not
use line continuations when not necessary and do not explicitly initialize
static variables to zero.

Cc: Himanshu Madhani <hmadhani@marvell.com>
Signed-off-by: default avatarBart Van Assche <bvanassche@acm.org>
Tested-by: default avatarHimanshu Madhani <hmadhani@marvell.com>
Reviewed-by: default avatarHimanshu Madhani <hmadhani@marvell.com>
Signed-off-by: default avatarMartin K. Petersen <martin.petersen@oracle.com>
parent 8dd9593c
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+5 −5
Original line number Diff line number Diff line
@@ -3851,7 +3851,7 @@ struct qla_hw_data {

	/* NVRAM configuration data */
#define MAX_NVRAM_SIZE  4096
#define VPD_OFFSET      MAX_NVRAM_SIZE / 2
#define VPD_OFFSET      (MAX_NVRAM_SIZE / 2)
	uint16_t	nvram_size;
	uint16_t	nvram_base;
	void		*nvram;
+1 −0
Original line number Diff line number Diff line
@@ -1364,6 +1364,7 @@ qla24xx_walk_and_build_prot_sglist(struct qla_hw_data *ha, srb_t *sp,
	cur_dsd++;
	return 0;
}

/**
 * qla24xx_build_scsi_crc_2_iocbs() - Build IOCB command utilizing Command
 *							Type 6 IOCB types.
+0 −1
Original line number Diff line number Diff line
@@ -267,7 +267,6 @@ static void qla_nvme_ls_abort(struct nvme_fc_local_port *lport,
	schedule_work(&priv->abort_work);
}


static int qla_nvme_ls_req(struct nvme_fc_local_port *lport,
    struct nvme_fc_remote_port *rport, struct nvmefc_ls_req *fd)
{
+5 −5
Original line number Diff line number Diff line
@@ -1985,7 +1985,7 @@ qla82xx_check_rcvpeg_state(struct qla_hw_data *ha)
}

/* ISR related functions */
static struct qla82xx_legacy_intr_set legacy_intr[] = \
static struct qla82xx_legacy_intr_set legacy_intr[] =
	QLA82XX_LEGACY_INTR_CONFIG;

/*
@@ -3286,7 +3286,7 @@ qla82xx_device_state_handler(scsi_qla_host_t *vha)
		case QLA8XXX_DEV_NEED_QUIESCENT:
			qla82xx_need_qsnt_handler(vha);
			/* Reset timeout value after quiescence handler */
			dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout\
			dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout
							 * HZ);
			break;
		case QLA8XXX_DEV_QUIESCENT:
@@ -3301,7 +3301,7 @@ qla82xx_device_state_handler(scsi_qla_host_t *vha)
			qla82xx_idc_lock(ha);

			/* Reset timeout value after quiescence handler */
			dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout\
			dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout
							 * HZ);
			break;
		case QLA8XXX_DEV_FAILED:
@@ -4232,7 +4232,7 @@ qla82xx_md_collect(scsi_qla_host_t *vha)
		goto md_failed;
	}

	entry_hdr = (qla82xx_md_entry_hdr_t *) \
	entry_hdr = (qla82xx_md_entry_hdr_t *)
	    (((uint8_t *)ha->md_tmplt_hdr) + tmplt_hdr->first_entry_offset);

	/* Walk through the entry headers */
@@ -4339,7 +4339,7 @@ qla82xx_md_collect(scsi_qla_host_t *vha)
		data_collected = (uint8_t *)data_ptr -
		    (uint8_t *)ha->md_dump;
skip_nxt_entry:
		entry_hdr = (qla82xx_md_entry_hdr_t *) \
		entry_hdr = (qla82xx_md_entry_hdr_t *)
		    (((uint8_t *)entry_hdr) + entry_hdr->entry_size);
	}

+7 −7
Original line number Diff line number Diff line
@@ -486,13 +486,13 @@
#define QLA82XX_ADDR_QDR_NET		(0x0000000300000000ULL)
#define QLA82XX_P3_ADDR_QDR_NET_MAX	(0x0000000303ffffffULL)

#define QLA82XX_PCI_CRBSPACE		(unsigned long)0x06000000
#define QLA82XX_PCI_DIRECT_CRB		(unsigned long)0x04400000
#define QLA82XX_PCI_CAMQM		(unsigned long)0x04800000
#define QLA82XX_PCI_CAMQM_MAX		(unsigned long)0x04ffffff
#define QLA82XX_PCI_DDR_NET		(unsigned long)0x00000000
#define QLA82XX_PCI_QDR_NET		(unsigned long)0x04000000
#define QLA82XX_PCI_QDR_NET_MAX		(unsigned long)0x043fffff
#define QLA82XX_PCI_CRBSPACE		0x06000000UL
#define QLA82XX_PCI_DIRECT_CRB		0x04400000UL
#define QLA82XX_PCI_CAMQM		0x04800000UL
#define QLA82XX_PCI_CAMQM_MAX		0x04ffffffUL
#define QLA82XX_PCI_DDR_NET		0x00000000UL
#define QLA82XX_PCI_QDR_NET		0x04000000UL
#define QLA82XX_PCI_QDR_NET_MAX		0x043fffffUL

/*
 *   Register offsets for MN
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