Commit c1b353b7 authored by Evan Quan's avatar Evan Quan Committed by Alex Deucher
Browse files

drm/amd/powerplay: update the tables init related



To avoid cross calling and maintain clear code layer.

Signed-off-by: default avatarEvan Quan <evan.quan@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent caad2613
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+18 −5
Original line number Diff line number Diff line
@@ -207,9 +207,10 @@ static const struct cmn2asic_mapping arcturus_workload_map[PP_SMC_POWER_PROFILE_
	WORKLOAD_MAP(PP_SMC_POWER_PROFILE_CUSTOM,		WORKLOAD_PPLIB_CUSTOM_BIT),
};

static int arcturus_tables_init(struct smu_context *smu, struct smu_table *tables)
static int arcturus_tables_init(struct smu_context *smu)
{
	struct smu_table_context *smu_table = &smu->smu_table;
	struct smu_table *tables = smu_table->tables;

	SMU_TABLE_INIT(tables, SMU_TABLE_PPTABLE, sizeof(PPTable_t),
		       PAGE_SIZE, AMDGPU_GEM_DOMAIN_VRAM);
@@ -258,6 +259,21 @@ static int arcturus_allocate_dpm_context(struct smu_context *smu)
	return 0;
}

static int arcturus_init_smc_tables(struct smu_context *smu)
{
	int ret = 0;

	ret = arcturus_tables_init(smu);
	if (ret)
		return ret;

	ret = arcturus_allocate_dpm_context(smu);
	if (ret)
		return ret;

	return smu_v11_0_init_smc_tables(smu);
}

static int
arcturus_get_allowed_feature_mask(struct smu_context *smu,
				  uint32_t *feature_mask, uint32_t num)
@@ -2237,9 +2253,6 @@ static void arcturus_log_thermal_throttling_event(struct smu_context *smu)
}

static const struct pptable_funcs arcturus_ppt_funcs = {
	/* internal structurs allocations */
	.tables_init = arcturus_tables_init,
	.alloc_dpm_context = arcturus_allocate_dpm_context,
	/* init dpm */
	.get_allowed_feature_mask = arcturus_get_allowed_feature_mask,
	/* btc */
@@ -2267,7 +2280,7 @@ static const struct pptable_funcs arcturus_ppt_funcs = {
	.init_microcode = smu_v11_0_init_microcode,
	.load_microcode = smu_v11_0_load_microcode,
	.fini_microcode = smu_v11_0_fini_microcode,
	.init_smc_tables = smu_v11_0_init_smc_tables,
	.init_smc_tables = arcturus_init_smc_tables,
	.fini_smc_tables = smu_v11_0_fini_smc_tables,
	.init_power = smu_v11_0_init_power,
	.fini_power = smu_v11_0_fini_power,
+1 −3
Original line number Diff line number Diff line
@@ -259,7 +259,7 @@ struct smu_table_context
	void				*max_sustainable_clocks;
	struct smu_bios_boot_up_values	boot_values;
	void                            *driver_pptable;
	struct smu_table		*tables;
	struct smu_table		tables[SMU_TABLE_COUNT];
	/*
	 * The driver table is just a staging buffer for
	 * uploading/downloading content from the SMU.
@@ -451,7 +451,6 @@ struct smu_context
struct i2c_adapter;

struct pptable_funcs {
	int (*alloc_dpm_context)(struct smu_context *smu);
	int (*run_btc)(struct smu_context *smu);
	int (*get_allowed_feature_mask)(struct smu_context *smu, uint32_t *feature_mask, uint32_t num);
	enum amd_pm_state_type (*get_current_power_state)(struct smu_context *smu);
@@ -490,7 +489,6 @@ struct pptable_funcs {
	int (*notify_smc_display_config)(struct smu_context *smu);
	int (*set_cpu_power_state)(struct smu_context *smu);
	bool (*is_dpm_running)(struct smu_context *smu);
	int (*tables_init)(struct smu_context *smu, struct smu_table *tables);
	int (*get_fan_speed_percent)(struct smu_context *smu, uint32_t *speed);
	int (*get_fan_speed_rpm)(struct smu_context *smu, uint32_t *speed);
	int (*set_watermarks_table)(struct smu_context *smu,
+0 −2
Original line number Diff line number Diff line
@@ -58,8 +58,6 @@ uint32_t smu_v12_0_get_gfxoff_status(struct smu_context *smu);

int smu_v12_0_gfx_off_control(struct smu_context *smu, bool enable);

int smu_v12_0_init_smc_tables(struct smu_context *smu);

int smu_v12_0_fini_smc_tables(struct smu_context *smu);

int smu_v12_0_set_default_dpm_tables(struct smu_context *smu);
+18 −7
Original line number Diff line number Diff line
@@ -448,9 +448,10 @@ static int navi10_setup_pptable(struct smu_context *smu)
	return ret;
}

static int navi10_tables_init(struct smu_context *smu, struct smu_table *tables)
static int navi10_tables_init(struct smu_context *smu)
{
	struct smu_table_context *smu_table = &smu->smu_table;
	struct smu_table *tables = smu_table->tables;

	SMU_TABLE_INIT(tables, SMU_TABLE_PPTABLE, sizeof(PPTable_t),
		       PAGE_SIZE, AMDGPU_GEM_DOMAIN_VRAM);
@@ -579,9 +580,6 @@ static int navi10_allocate_dpm_context(struct smu_context *smu)
{
	struct smu_dpm_context *smu_dpm = &smu->smu_dpm;

	if (smu_dpm->dpm_context)
		return -EINVAL;

	smu_dpm->dpm_context = kzalloc(sizeof(struct smu_11_0_dpm_context),
				       GFP_KERNEL);
	if (!smu_dpm->dpm_context)
@@ -592,6 +590,21 @@ static int navi10_allocate_dpm_context(struct smu_context *smu)
	return 0;
}

static int navi10_init_smc_tables(struct smu_context *smu)
{
	int ret = 0;

	ret = navi10_tables_init(smu);
	if (ret)
		return ret;

	ret = navi10_allocate_dpm_context(smu);
	if (ret)
		return ret;

	return smu_v11_0_init_smc_tables(smu);
}

static int navi10_set_default_dpm_table(struct smu_context *smu)
{
	struct smu_11_0_dpm_context *dpm_context = smu->smu_dpm.dpm_context;
@@ -2252,8 +2265,6 @@ static int navi10_disable_umc_cdr_12gbps_workaround(struct smu_context *smu)
}

static const struct pptable_funcs navi10_ppt_funcs = {
	.tables_init = navi10_tables_init,
	.alloc_dpm_context = navi10_allocate_dpm_context,
	.get_allowed_feature_mask = navi10_get_allowed_feature_mask,
	.set_default_dpm_table = navi10_set_default_dpm_table,
	.dpm_set_vcn_enable = navi10_dpm_set_vcn_enable,
@@ -2281,7 +2292,7 @@ static const struct pptable_funcs navi10_ppt_funcs = {
	.init_microcode = smu_v11_0_init_microcode,
	.load_microcode = smu_v11_0_load_microcode,
	.fini_microcode = smu_v11_0_fini_microcode,
	.init_smc_tables = smu_v11_0_init_smc_tables,
	.init_smc_tables = navi10_init_smc_tables,
	.fini_smc_tables = smu_v11_0_fini_smc_tables,
	.init_power = smu_v11_0_init_power,
	.fini_power = smu_v11_0_fini_power,
+3 −3
Original line number Diff line number Diff line
@@ -151,9 +151,10 @@ static int renoir_get_metrics_table(struct smu_context *smu,
	return ret;
}

static int renoir_tables_init(struct smu_context *smu, struct smu_table *tables)
static int renoir_init_smc_tables(struct smu_context *smu)
{
	struct smu_table_context *smu_table = &smu->smu_table;
	struct smu_table *tables = smu_table->tables;

	SMU_TABLE_INIT(tables, SMU_TABLE_WATERMARKS, sizeof(Watermarks_t),
		PAGE_SIZE, AMDGPU_GEM_DOMAIN_VRAM);
@@ -994,7 +995,6 @@ static bool renoir_is_dpm_running(struct smu_context *smu)
}

static const struct pptable_funcs renoir_ppt_funcs = {
	.tables_init = renoir_tables_init,
	.set_power_state = NULL,
	.print_clk_levels = renoir_print_clk_levels,
	.get_current_power_state = renoir_get_current_power_state,
@@ -1014,7 +1014,7 @@ static const struct pptable_funcs renoir_ppt_funcs = {
	.set_gfx_cgpg = smu_v12_0_set_gfx_cgpg,
	.gfx_off_control = smu_v12_0_gfx_off_control,
	.get_gfx_off_status = smu_v12_0_get_gfxoff_status,
	.init_smc_tables = smu_v12_0_init_smc_tables,
	.init_smc_tables = renoir_init_smc_tables,
	.fini_smc_tables = smu_v12_0_fini_smc_tables,
	.set_default_dpm_table = smu_v12_0_set_default_dpm_tables,
	.get_enabled_mask = smu_cmn_get_enabled_mask,
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