Commit bf5f07e7 authored by Alexandre Torgue's avatar Alexandre Torgue
Browse files

ARM: dts: stm32: Correct masks for GIC PPI interrupts on stm32mp13 



Using GIC_CPU_MASK_SIMPLE(x), x should reflect the number of CPUs.
STM32MP13 is a single core A7.

Signed-off-by: default avatarAlexandre Torgue <alexandre.torgue@foss.st.com>
Acked-by: default avatarMarc Zyngier <maz@kernel.org>
parent b814f754

arch/arm/boot/dts/stm32mp131.dtsi

+4 −4
Original line number Diff line number Diff line
@@ -92,10 +92,10 @@ psci { 


	timer {

		compatible = "arm,armv7-timer";

		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,

			     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,

			     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,

			     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;

		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,

			     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,

			     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,

			     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>;

		interrupt-parent = <&intc>;

		always-on;

	};