Commit bed5712e authored by Monk Liu's avatar Monk Liu Committed by Alex Deucher
Browse files

drm/amdgpu:add MEC_STORAGE ucode id for sriov



for sriov, SMC need MEC_STORAGE reserved in fw bo.

Signed-off-by: default avatarMonk Liu <Monk.Liu@amd.com>
Signed-off-by: default avatarFrank Min <frank.min@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent ac00bbf3
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+3 −0
Original line number Diff line number Diff line
@@ -696,6 +696,9 @@ static uint32_t fw_type_convert(struct cgs_device *cgs_device, uint32_t fw_type)
	case CGS_UCODE_ID_RLC_G:
		result = AMDGPU_UCODE_ID_RLC_G;
		break;
	case CGS_UCODE_ID_STORAGE:
		result = AMDGPU_UCODE_ID_STORAGE;
		break;
	default:
		DRM_ERROR("Firmware type not supported\n");
	}
+3 −0
Original line number Diff line number Diff line
@@ -228,6 +228,9 @@ static int amdgpu_ucode_init_single_fw(struct amdgpu_firmware_info *ucode,
	ucode->mc_addr = mc_addr;
	ucode->kaddr = kptr;

	if (ucode->ucode_id == AMDGPU_UCODE_ID_STORAGE)
		return 0;

	header = (const struct common_firmware_header *)ucode->fw->data;
	memcpy(ucode->kaddr, (void *)((uint8_t *)ucode->fw->data +
		le32_to_cpu(header->ucode_array_offset_bytes)),
+1 −0
Original line number Diff line number Diff line
@@ -130,6 +130,7 @@ enum AMDGPU_UCODE_ID {
	AMDGPU_UCODE_ID_CP_MEC1,
	AMDGPU_UCODE_ID_CP_MEC2,
	AMDGPU_UCODE_ID_RLC_G,
	AMDGPU_UCODE_ID_STORAGE,
	AMDGPU_UCODE_ID_MAXIMUM,
};

+8 −0
Original line number Diff line number Diff line
@@ -1058,6 +1058,14 @@ static int gfx_v8_0_init_microcode(struct amdgpu_device *adev)
		adev->firmware.fw_size +=
			ALIGN(le32_to_cpu(header->ucode_size_bytes), PAGE_SIZE);

		if (amdgpu_sriov_vf(adev)) {
			info = &adev->firmware.ucode[AMDGPU_UCODE_ID_STORAGE];
			info->ucode_id = AMDGPU_UCODE_ID_STORAGE;
			info->fw = adev->gfx.mec_fw;
			adev->firmware.fw_size +=
				ALIGN(le32_to_cpu(64 * PAGE_SIZE), PAGE_SIZE);
		}

		if (adev->gfx.mec2_fw) {
			info = &adev->firmware.ucode[AMDGPU_UCODE_ID_CP_MEC2];
			info->ucode_id = AMDGPU_UCODE_ID_CP_MEC2;
+1 −0
Original line number Diff line number Diff line
@@ -106,6 +106,7 @@ enum cgs_ucode_id {
	CGS_UCODE_ID_CP_MEC_JT2,
	CGS_UCODE_ID_GMCON_RENG,
	CGS_UCODE_ID_RLC_G,
	CGS_UCODE_ID_STORAGE,
	CGS_UCODE_ID_MAXIMUM,
};

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